Patents by Inventor Akira Takashima

Akira Takashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080271990
    Abstract: A method of fabricating by co-sputtering deposition a lanthanoid aluminate film with enhanced electrical insulativity owing to suppression of deviation in composition of the film is disclosed. Firstly within a vacuum chamber, hold two separate targets, one of which is made of lanthanoid aluminate (LnAlO3) and the other of which is made of aluminum oxide (Al2O3). Then, transport and load a substrate into the vacuum chamber. Next, introduce a chosen sputtering gas into this chamber. Thereafter, perform sputtering of both the targets at a time to thereby form a lanthanoid aluminate film on the substrate surface. This film is well adaptable for use as ultra-thin high dielectric constant (high-k) gate dielectrics in highly miniaturized metal oxide semiconductor (MOS) transistors.
    Type: Application
    Filed: December 28, 2007
    Publication date: November 6, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsunehiro Ino, Akira Takashima
  • Publication number: 20080211011
    Abstract: It is made possible to provide a nonvolatile semiconductor memory element that can be miniaturized and can store multi-level data. A nonvolatile semiconductor memory element includes a semiconductor substrate; a source region and a drain region formed at a distance from each other in the semiconductor substrate; and a gate structure formed on a portion of the semiconductor substrate, the portion being located between the source region and the drain region. The gate structure includes a tunnel insulating layer, a resistance variable layer formed above the tunnel insulating layer and made of a metal oxide, and a first electrode formed on the resistance variable layer.
    Type: Application
    Filed: February 1, 2008
    Publication date: September 4, 2008
    Inventors: Akira TAKASHIMA, Kouichi Muraoka
  • Publication number: 20080153752
    Abstract: The present invention provides peptide derivatives with a specific affinity for glycosaminoglycan molecules. These peptide derivatives include multimers as well as chemically modified peptides and may be prepared by a variety of methods. The peptides of the invention have numerous functions, including but not limited to use as inhibitors of glycosaminoglycan-mediated signaling events and targeting agents. Peptides of the invention may be directed against any glycosaminoglycan, including hyaluronic acid, chondroitin sulfate A, chondroitin sulfate C, dermatan sulfate, heparin, keratan sulfate, keratosulfate, chitin, chitosan 1, and chitosan 2. The peptide derivatives of the invention also have therapeutic uses in the treatment and prevention of diseases involving inflammatory diseases, cancer, and cancer metastasis, autoimmune diseases, etc.
    Type: Application
    Filed: December 6, 2007
    Publication date: June 26, 2008
    Inventors: Akira Takashima, Mark E. Mummert
  • Publication number: 20080121979
    Abstract: A nonvolatile semiconductor memory device includes: a tunneling insulating film; a floating gate electrode; an inter-electrode insulating film, in which an interface facing the floating gate electrode and an interface facing a control gate electrode are defined as the first interface and the second interface, respectively; and a control gate electrode. The inter-electrode insulating film includes one or more first elements selected from rare earth elements, one or more second elements selected from Al, Ti, Zr, Hf, Ta, Mg, Ca, Sr and Ba, and oxygen. A composition ratio of the first element, which is defined as the number of atoms of the first element divided by that of the second element, is changed between the first interface and the second interface, and the composition ratio in the vicinity of the first interface is lower than that in the vicinity of the second interface.
    Type: Application
    Filed: August 28, 2007
    Publication date: May 29, 2008
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yukie NISHIKAWA, Akira Takashima, Koichi Muraoka
  • Patent number: 7348644
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: March 25, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama
  • Patent number: 7300838
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: November 27, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama
  • Publication number: 20070215924
    Abstract: A memory cell in a nonvolatile semiconductor memory device includes a tunneling insulating film, a floating gate electrode made of a Si containing conductive material, an inter-electrode insulating film made of rare-earth oxide, rare-earth nitride or rare-earth oxynitride, a control gate electrode, and a metal silicide film formed between the floating gate electrode and the inter-electrode insulating film.
    Type: Application
    Filed: March 12, 2007
    Publication date: September 20, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yukie Nishikawa, Akira Takashima, Tatsuo Shimizu
  • Publication number: 20070132003
    Abstract: A semiconductor memory device includes a semiconductor substrate, a first insulating film which is formed on the semiconductor substrate, a floating gate electrode which is formed on the first insulating film and made of a conductive metal oxide, a second insulating film which is formed on the floating gate electrode, has a relative dielectric constant of not less than 7.8, and is made of an insulating metal oxide of a paraelectric material, and a control gate electrode which is formed on the second insulating film and made of one of a metal and a conductive metal oxide.
    Type: Application
    Filed: September 14, 2006
    Publication date: June 14, 2007
    Inventors: Akira Takashima, Hiroshi Watanabe, Tatsuo Shimizu, Takeshi Yamaguchi
  • Publication number: 20060289972
    Abstract: A semiconductor device includes a semiconductor element having a main surface where an outside connection terminal pad is provided. The semiconductor element is connected to a conductive layer on a supporting board via a plurality of convex-shaped outside connection terminals provided on the outside connection terminal pad and a connection member; and the connection member commonly covers the convex-shaped outside connection terminals.
    Type: Application
    Filed: June 26, 2006
    Publication date: December 28, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Takao Nishimura, Yoshikazu Kumagaya, Akira Takashima, Kouichi Nakamura, Kazuyuki Aiba
  • Patent number: 7138723
    Abstract: A semiconductor chip is secured in a state deformed into a substantially cylinder shape by a coating material formed on its surface. The deformed semiconductor chip is flip-chip connected to an interposer and sealed with sealing resin onto the interposer. Solder balls are provided, as external terminals, on the other side of the interposer.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: November 21, 2006
    Assignee: Fujitsu Limited
    Inventors: Kazuyuki Aiba, Akira Takashima, Kaname Ozawa, Tetsuya Hiraoka, Takaaki Suzuki, Yasurou Matsuzaki
  • Patent number: 7129039
    Abstract: Novel genes expressed selectively by long-term dendritic cell (DC) lines (XS series) from murine epidermis which retain important features of resident epidermal Langerhans cells (LC) are provided. These genes encode distinct type II membrane-integrated polypeptides, each consisting of a cytoplasmic domain, a transmembrane domain, an extracellular connecting domain, and a C-terminal extracellular domain that exhibits significant homology to the carbohydrate recognition domains (CRD) of C-type lectins. Expression of both genes is highly restricted to cells of DC lineage (including epidermal LC). Thus, these genes encode new, DC-specific members of the C-type lectin family, now termed “DC-associated C-type lectin-1 and -2” (dectin-1 and dectin-2). Two isoforms of the dectin-1 molecule and five isoforms of the dectin-2 molecule have also been identified. The invention further provides His-tagged fusion proteins comprising 6× histidine and the extracellular domain of dectin-1 or dectin-2.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: October 31, 2006
    Assignee: Board of Regents The University of Texas System
    Inventors: Kiyoshi Ariizumi, Akira Takashima
  • Publication number: 20060226529
    Abstract: The present invention relates to a semiconductor device having an MCP (Multi Chip Package) structure in which a plurality of semiconductor chips are mounted in the same package, a manufacturing method therefor and a semiconductor substrate used therein. Atop a first semiconductor chip that is a memory chip is mounted a second semiconductor chip that is a logic chip, with a first functional chip and a second functional chip that together form the first semiconductor chip being joined together via an unsliced scribe line. Additionally, a first functional chip and a second functional chip are given the same chip composition (32-bit memory) and respectively rotated 180 degrees relative to each other. These configurations are intended to improve performance, reduce costs and improve yield.
    Type: Application
    Filed: June 8, 2006
    Publication date: October 12, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiharu Kato, Satoru Kawamoto, Fumihiko Taniguchi, Tetsuya Hiraoka, Akira Takashima
  • Publication number: 20060214217
    Abstract: A nonvolatile semiconductor storage device includes a semiconductor substrate; a plurality of isolation regions formed in the semiconductor substrate; an element-forming region formed between adjacent isolation regions; a first gate insulating film provided on the element-forming region; a floating gate electrode which is provided on the first gate insulating film and in which a width of a lower hem facing the element-forming region is narrower than a width of the element-forming region in a section taken in a direction perpendicular to a direction in which the isolation regions extend; a second gate insulating film provided on the floating gate electrode; and a control gate electrode provided on the second gate insulating film.
    Type: Application
    Filed: September 13, 2005
    Publication date: September 28, 2006
    Inventors: Hiroshi Watanabe, Atsuhiro Kinoshita, Akira Takashima, Daisuke Hagishima
  • Publication number: 20060186489
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Application
    Filed: April 20, 2006
    Publication date: August 24, 2006
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama
  • Publication number: 20060186488
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Application
    Filed: April 20, 2006
    Publication date: August 24, 2006
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama
  • Patent number: 7071171
    Abstract: Novel genes expressed selectively by long-term dendritic cell (DC) lines (XS series) from murine epidermis which retain important features of resident epidermal Langerhans cells (LC) are provided. These genes encode distinct type II membrane-integrated polypeptides, each consisting of a cytoplasmic domain, a transmembrane domain, an extracellular connecting domain, and a C-terminal extracellular domain that exhibits significant homology to the carbohydrate recognition domains (CRD)) of C-type lectins. Expression of both genes is highly restricted to cells of DC lineage (including epidermal LC). Thus, these genes encode new, DC-specific members of the C-type lectin family, now termed “DC-associated C-type lectin-1 and -2” (dectin-1 and dectin-2). Two isoforms of the dectin-1 molecule and five isoforms of the dectin-2 molecule have also been identified. The invention further provides His-tagged fusion proteins comprising 6x histidine and the extracellular domain of dectin-1 or dectin-2.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: July 4, 2006
    Assignee: Board of Regents the University of Texas System
    Inventors: Kiyoshi Ariizumi, Akira Takashima
  • Patent number: 7067254
    Abstract: Ecto-NTPDase function on Langerhans cells is demonstrated to counteract the nucleotide inflammatory response caused by certain types of chemical irritants. The present invention takes advantage of this observation by, first, providing methods for screening of chemicals for irritant potential based on their ability to induce nucleotide release from keratinocytes. Second, methods are provided for the prevention and treatment of inflammation using NTPDase protein or gene therapy. And third, there also are provided methods for screening candidate compounds for NTPDase modulatory activity, thereby identifying possible pro- and anti-inflammatory agents. Additionally, the role of NTPDases and P2 receptors in hyperactive immune conditions such as autoimmune diseases and allergic reactions such as allergic contact dermatitis has been demonstrated. Therefore, the invention also provides methods for the prevention and treatment of hyperactive immune conditions by using NTPDase inhibitors and/or P2 receptor inhibitors.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: June 27, 2006
    Assignee: Board of Regents, The University of Texas System
    Inventors: Tadashi Kumamoto, Norikatsu Mizumoto, Akira Takashima
  • Patent number: 7053455
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: May 30, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama
  • Patent number: 7049692
    Abstract: A stacked semiconductor device is disclosed that has a three-dimensional structure using general-purpose semiconductor device units (semiconductor devices) that are stacked with an interposer substrate being provided between an upper device unit and a lower device unit. The upper device unit includes a semiconductor device, a first wiring substrate, and an external connection terminal. The lower device unit includes a semiconductor device, a second wiring substrate, and a connection electrode that is prepared on the upper surface of the second wiring substrate. The interposer substrate includes a circuit board, a first conductive material connecting to the connection electrode, a second conductive material formed in a form position of the external connection terminal that is electrically connected to the second conductive material, and a third conductive material for electrically connecting the first conductive material and the second conductive material.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: May 23, 2006
    Assignee: Fujitsu Limited
    Inventors: Takao Nishimura, Kazuyuki Aiba, Akira Takashima
  • Publication number: 20060074007
    Abstract: Novel genes expressed selectively by long-term dendritic cell (DC) lines (XS series) from murine epidermis which retain important features of resident epidermal Langerhans cells (LC) are provided. These genes encode distinct type II membrane-integrated polypeptides, each consisting of a cytoplasmic domain, a transmembrane domain, an extracellular connecting domain, and a C-terminal extracellular domain that exhibits significant homology to the carbohydrate recognition domains (CRD) of C-type lectins. Expression of both genes is highly restricted to cells of DC lineage (including epidermal LC). Thus, these genes encode new, DC-specific members of the C-type lectin family, now termed “DC-associated C-type lectin-1 and -2” (dectin-1 and dectin-2). Two isoforms of the dectin-1 molecule and five isoforms of the dectin-2 molecule have also been identified. The invention further provides His-tagged fusion proteins comprising 6× histidine and the extracellular domain of dectin-1 or dectin-2.
    Type: Application
    Filed: July 23, 2002
    Publication date: April 6, 2006
    Inventors: Kiyoshi Ariizumi, Akira Takashima