Patents by Inventor Akira Yajima

Akira Yajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11395629
    Abstract: A device for placement in contact with an eye of a user. The device includes at least one detector for measuring at least one property, and a signal processor for determining, based on the at least one property, whether the eye of the user is closed.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: July 26, 2022
    Assignee: Sony Corporation
    Inventors: Masanori Iwasaki, Ken Hayakawa, Tsukasa Yoshimura, Masakazu Yajima, Naoto Yamaguchi, Akira Tange
  • Patent number: 11374189
    Abstract: A quantum dot includes an inorganic particle, and an organic ligand and an inorganic ligand on a surface of the inorganic particle, and the molar percentage of the inorganic ligand relative to the total amount of the inorganic ligand and the organic ligand is 25% or more and 99.8% or less.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: June 28, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takahiro Yajima, Youichi Fukaya, Akira Shimazu, Takayuki Sumida
  • Publication number: 20220198512
    Abstract: An image processing unit (110) acquires a position of an advertisement and a position of a product by analyzing an image in which the product and the advertisement are disposed on a shelf rack are captured. A determination unit (120) determines whether or not a relation between the position of the product and the position of the advertisement satisfies a criterion. An output unit (130) outputs information indicating a determination result obtained by the determination unit (120).
    Type: Application
    Filed: March 14, 2022
    Publication date: June 23, 2022
    Applicant: NEC Corporation
    Inventors: Yaeko Yonezawa, Kaito Horita, Akira Yajima, Mizuto Sekine, Yoshinori Ehara
  • Patent number: 11308516
    Abstract: An image processing unit (110) acquires a position of an advertisement and a position of a product by analyzing an image in which the product and the advertisement are disposed on a shelf rack are captured. A determination unit (120) determines whether or not a relation between the position of the product and the position of the advertisement satisfies a criterion. An output unit (130) outputs information indicating a determination result obtained by the determination unit (120).
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: April 19, 2022
    Assignee: NEC CORPORATION
    Inventors: Yaeko Yonezawa, Kaito Horita, Akira Yajima, Mizuto Sekine, Yoshinori Ehara
  • Patent number: 10910617
    Abstract: According to one embodiment, a nonaqueous electrolyte secondary battery is provided. The nonaqueous electrolyte secondary battery includes a container member, a negative electrode, a positive electrode, and a nonaqueous electrolyte. The container member is provided with a gas relief structure. The negative electrode includes a negative electrode mixture layer. The negative electrode mixture layer contains a titanium-containing oxide and Mn. Abundance ratios RTi, RMn, RA and RB obtained according to an X-ray photoelectron spectroscopy spectrum of the negative electrode mixture layer satisfy the following relational expressions: 0.01?RMn/RTi?0.2??(1); 3?RA/RMn?50??(2); and 0.5?RA/RB?5??(3).
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: February 2, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, Toshiba Infrastructure Systems & Solutions Corporation
    Inventors: Kazuhiro Namba, Dai Yamamoto, Akira Yajima
  • Publication number: 20200411853
    Abstract: According to a first embodiment, there is provided a positive electrode including a positive electrode active material-containing layer containing a first active material having a spinel type crystal structure. The positive electrode satisfies the formulas (1) to (3) when combined with a negative electrode including a negative electrode active material-containing layer containing a first active material having a spinel type crystal structure: 0.5?a1/b1?1.5 (1); 0.4?a2/b2?1.4 (2); and 0.5?a3/b3?2.3 (3), where a1 and b1 are a pore volume per 1 g weight, a2 and b2 are a pore specific surface area, and a3 and b3 are a median diameter in pore distribution, for the positive and negative electrode active material-containing layers, respectively.
    Type: Application
    Filed: September 14, 2020
    Publication date: December 31, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hikaru YOSHIKAWA, Akira YAJIMA, Yasuaki MURASHI, Naoki NISHIO, Kazuhiro NAMBA, Natsuki NAKAMURA
  • Patent number: 10840909
    Abstract: A signal outputting circuit including: an input line to which an input signal is inputted; a first current generating circuit connected to the input line, the first current generating circuit generating a first current having a magnitude corresponding to a level of a supplied power supply voltage; a second current generating circuit connected to the input line, the second current generating circuit generating a second current that turns ON and OFF in accordance with switching of a level of an output signal; a resistor element provided at the input line; and an outputting circuit that switches a logic level of the output signal in accordance with a level of voltage generated at the input line.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: November 17, 2020
    Assignee: KABUSHIKI KAISHA TOKAI-RIKA-DENKI-SEISAKUSHO
    Inventors: Akira Yajima, Tomoki Narita
  • Patent number: 10818620
    Abstract: In a method of manufacturing a semiconductor device, a semiconductor chip has first and second pads, a passivation film formed such that respective parts of the first and second pads are exposed, a first surface-metal-layer provided on the part of the first pad and a part of the passivation film, and a second surface-metal-layer provided on the part of the second pad and another part of the passivation film. Respective wires are electrically connected to the first and second surface-metal-layers. The semiconductor chip and the respective wires are then sealed with a resin.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: October 27, 2020
    Assignee: Renesas Electronics Corporation
    Inventors: Hiromi Shigihara, Hiroshi Tsukamoto, Akira Yajima
  • Publication number: 20200311659
    Abstract: An information processing apparatus (10) includes a product information acquisition unit (110) that acquires the position of a product by analyzing an image in which the product and a shelf label are imaged, a shelf label information acquisition unit (120) that acquires the position of a shelf label by analyzing the image, a first determination unit (130) that determines consistency in a correspondence relation between the product and the shelf label on the basis of a relation between the acquired position of the product and the acquired position of the shelf label, and an output unit (140) that outputs a determination result of the consistency in the correspondence relation between the product and the shelf label.
    Type: Application
    Filed: August 3, 2018
    Publication date: October 1, 2020
    Applicant: NEC CORPORATION
    Inventors: Yaeko YONEZAWA, Kaito HORITA, Akira YAJIMA, Mizuto SEKINE, Yoshinori EHARA
  • Patent number: 10760664
    Abstract: A circular spline is secured to a housing. An output member is positioned relative to the circular spline, an outer race of a bearing is secured to the housing, and an inner race of the bearing is secured to the output member. A flex spline is positioned relative to the circular spline and secured to the output member. A wave generator is positioned relative to the circular spline, and a support member, by which the wave generator is rotatably supported, is secured to the housing.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: September 1, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Akira Yajima
  • Publication number: 20200273066
    Abstract: An image processing unit (110) acquires a position of an advertisement and a position of a product by analyzing an image in which the product and the advertisement are disposed on a shelf rack are captured. A determination unit (120) determines whether or not a relation between the position of the product and the position of the advertisement satisfies a criterion. An output unit (130) outputs information indicating a determination result obtained by the determination unit (120).
    Type: Application
    Filed: August 3, 2018
    Publication date: August 27, 2020
    Applicant: NEC CORPORATION
    Inventors: Yaeko YONEZAWA, Kaito HORITA, Akira YAJIMA, Mizuto SEKINE, Yoshinori EHARA
  • Publication number: 20200258033
    Abstract: An information processing apparatus (2000) acquires a shelf rack image (12) in which a product shelf rack on which a product is displayed is imaged. The information processing apparatus (2000) performs image analysis on the shelf rack image (12), and generates information (actual display information) relevant to a display situation of the product on a product shelf rack (20). The information processing apparatus (2000) acquires reference display information representing a reference for display of the product on the product shelf rack (20). The information processing apparatus (2000) compares the actual display information generated by performing the image analysis on the shelf rack image (12) with the acquired reference display information, and generates comparison information representing a result.
    Type: Application
    Filed: September 11, 2018
    Publication date: August 13, 2020
    Applicant: NEC CORPORATION
    Inventors: Yaeko YONEZAWA, Kaito HORITA, Akira YAJIMA, Mizuto SEKINE, Yoshinori EHARA
  • Publication number: 20200145004
    Abstract: A signal outputting circuit including: an input line to which an input signal is inputted; a first current generating circuit connected to the input line, the first current generating circuit generating a first current having a magnitude corresponding to a level of a supplied power supply voltage; a second current generating circuit connected to the input line, the second current generating circuit generating a second current that turns ON and OFF in accordance with switching of a level of an output signal; a resistor element provided at the input line; and an outputting circuit that switches a logic level of the output signal in accordance with a level of voltage generated at the input line.
    Type: Application
    Filed: October 30, 2019
    Publication date: May 7, 2020
    Inventors: Akira YAJIMA, Tomoki NARITA
  • Patent number: 10486878
    Abstract: A package bag made by a packaging laminate film and provided midway between both side portions with a back-lined portion and a filling space of a liquid packing material, wherein the back-lined portion is sealed on its peripheral edge with an outer edge seal part, an inner edge seal part, an upper edge seal part and a lower edge seal part, while an internal side of these seal parts is defined by a partition wall of these seal parts into a self-supporting stable portion and a pouring path communicating to a pouring port disposed in the outer edge seal part; and the inner edge seal part is provided with a first easy-peelable portion separating the self-supporting stable portion and the filling space and a second easy-peelable portion separating the pouring path and the filling space, and the first easy-peelable portion is preferentially peeled by pushing the filling space.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: November 26, 2019
    Assignee: TAISEI LAMICK CO., LTD.
    Inventors: Akira Yajima, Mitsumasa Sekino
  • Patent number: 10381279
    Abstract: To enhance reliability of a test by suppressing defective bonding of a solder in the test of a semiconductor device, a method of manufacturing the semiconductor device includes: preparing a semiconductor wafer that includes a first pad electrode provided with a first cap film and a second pad electrode provided with a second cap film. Further, a polyimide layer that includes a first opening on the first pad electrode and a second opening on the second pad electrode is formed, and then, a rearrangement wiring that is connected to the second pad electrode via the second opening is formed. Next, an opening is formed in the polyimide layer such that an organic reaction layer remains on each of the first pad electrode and a bump land of the rearrangement wiring, then heat processing is performed on the semiconductor wafer, and then, a bump is formed on the rearrangement wiring.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: August 13, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Akira Yajima
  • Publication number: 20190245173
    Abstract: According to one embodiment, a nonaqueous electrolyte secondary battery is provided. The nonaqueous electrolyte secondary battery includes a container member, a negative electrode, a positive electrode, and a nonaqueous electrolyte. The container member is provided with a gas relief structure. The negative electrode includes a negative electrode mixture layer. The negative electrode mixture layer contains a titanium-containing oxide and Mn. Abundance ratios RTi, RMn, RA and RB obtained according to an X-ray photoelectron spectroscopy spectrum of the negative electrode mixture layer satisfy the following relational expressions: 0.01?RMn/RTi?0.2 (1); 3?RA/RMn?50 (2); and 0.5?RA/RB?5 (3).
    Type: Application
    Filed: April 18, 2019
    Publication date: August 8, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Infrastructure Systems & Solutions Corporation
    Inventors: Kazuhiro NAMBA, Dai YAMAMOTO, Akira YAJIMA
  • Patent number: 10363660
    Abstract: A method of controlling a robot system including an articulated robot and a control device is provided. The articulated robot includes links connected by joints, motors configured to drive the joints respectively, and detection devices configured to detect rotation amounts of the joints respectively. The control device controls the motors. The method includes the steps of, by the control device, recording movement information of the joints based on outputs of the detection devices; when detecting an abnormality in the operation of the articulated robot, determining presence or absence of a failure in the articulated robot based on the movement information recorded in at least a period from before detection of the abnormality until detection of the abnormality; and specifying a failure portion of the articulated robot if it is determined that there is a failure in the articulated robot in the step of determining.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: July 30, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Yajima, Takayuki Ogawara, Hidetada Asano
  • Patent number: 10249589
    Abstract: The semiconductor device includes: a semiconductor substrate; a conductor layer formed over the semiconductor substrate and having an upper surface and a lower surface; a conductive pillar formed on the upper surface of the conductor layer and having an upper surface, a lower surface, and a sidewall; a protection film covering the upper surface of the conductor layer and having an opening which exposes the upper surface and the sidewall of the conductive pillar; and a protection film covering the sidewall of the conductive pillar. Then, in plan view, the opening of the protection film is wider than the upper surface of the conductive pillar and exposes an entire region of an upper surface of the conductive pillar.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: April 2, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Akira Yajima, Yoshiaki Yamada
  • Patent number: 10204853
    Abstract: A bonding pad of a semiconductor chip in a QFP includes, in its exposed portion, a via disposition area comprising: a first segment that connects a corner and a first point; a second segment that connects the corner and a second point; and an arc that connects the first point and the second point and forms a convex shape toward the corner. Further, in a plan view of the bonding pad, at least a part of a via is disposed so as to overlap with the via disposition area.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: February 12, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Masahiro Matsumoto, Akira Yajima, Kazuyoshi Maekawa
  • Publication number: 20190001582
    Abstract: A package bag made by a packaging laminate film and provided midway between both side portions with a back-lined portion and a filling space of a liquid packing material, wherein the back-lined portion is sealed on its peripheral edge with an outer edge seal part, an inner edge seal part, an upper edge seal part and a lower edge seal part, while an internal side of these seal parts is defined by a partition wall of these seal parts into a self-supporting stable portion and a pouring path communicating to a pouring port disposed in the outer edge seal part; and the inner edge seal part is provided with a first easy-peelable portion separating the self-supporting stable portion and the filling space and a second easy-peelable portion separating the pouring path and the filling space, and the first easy-peelable portion is preferentially peeled by pushing the filling space.
    Type: Application
    Filed: February 14, 2017
    Publication date: January 3, 2019
    Applicant: TAISEI LAMICK CO., LTD.
    Inventors: Akira YAJIMA, Mitsumasa SEKINO