Abstract: An image processing unit (110) acquires a position of an advertisement and a position of a product by analyzing an image in which the product and the advertisement are disposed on a shelf rack are captured. A determination unit (120) determines whether or not a relation between the position of the product and the position of the advertisement satisfies a criterion. An output unit (130) outputs information indicating a determination result obtained by the determination unit (120).

Abstract: An information processing apparatus (2000) acquires a shelf rack image (12) in which a product shelf rack on which a product is displayed is imaged. The information processing apparatus (2000) performs image analysis on the shelf rack image (12), and generates information (actual display information) relevant to a display situation of the product on a product shelf rack (20). The information processing apparatus (2000) acquires reference display information representing a reference for display of the product on the product shelf rack (20). The information processing apparatus (2000) compares the actual display information generated by performing the image analysis on the shelf rack image (12) with the acquired reference display information, and generates comparison information representing a result.

Abstract: A signal outputting circuit including: an input line to which an input signal is inputted; a first current generating circuit connected to the input line, the first current generating circuit generating a first current having a magnitude corresponding to a level of a supplied power supply voltage; a second current generating circuit connected to the input line, the second current generating circuit generating a second current that turns ON and OFF in accordance with switching of a level of an output signal; a resistor element provided at the input line; and an outputting circuit that switches a logic level of the output signal in accordance with a level of voltage generated at the input line.

Abstract: A package bag made by a packaging laminate film and provided midway between both side portions with a back-lined portion and a filling space of a liquid packing material, wherein the back-lined portion is sealed on its peripheral edge with an outer edge seal part, an inner edge seal part, an upper edge seal part and a lower edge seal part, while an internal side of these seal parts is defined by a partition wall of these seal parts into a self-supporting stable portion and a pouring path communicating to a pouring port disposed in the outer edge seal part; and the inner edge seal part is provided with a first easy-peelable portion separating the self-supporting stable portion and the filling space and a second easy-peelable portion separating the pouring path and the filling space, and the first easy-peelable portion is preferentially peeled by pushing the filling space.

Abstract: To enhance reliability of a test by suppressing defective bonding of a solder in the test of a semiconductor device, a method of manufacturing the semiconductor device includes: preparing a semiconductor wafer that includes a first pad electrode provided with a first cap film and a second pad electrode provided with a second cap film. Further, a polyimide layer that includes a first opening on the first pad electrode and a second opening on the second pad electrode is formed, and then, a rearrangement wiring that is connected to the second pad electrode via the second opening is formed. Next, an opening is formed in the polyimide layer such that an organic reaction layer remains on each of the first pad electrode and a bump land of the rearrangement wiring, then heat processing is performed on the semiconductor wafer, and then, a bump is formed on the rearrangement wiring.

Abstract: According to one embodiment, a nonaqueous electrolyte secondary battery is provided. The nonaqueous electrolyte secondary battery includes a container member, a negative electrode, a positive electrode, and a nonaqueous electrolyte. The container member is provided with a gas relief structure. The negative electrode includes a negative electrode mixture layer. The negative electrode mixture layer contains a titanium-containing oxide and Mn. Abundance ratios RTi, RMn, RA and RB obtained according to an X-ray photoelectron spectroscopy spectrum of the negative electrode mixture layer satisfy the following relational expressions: 0.01?RMn/RTi?0.2 (1); 3?RA/RMn?50 (2); and 0.5?RA/RB?5 (3).

Abstract: A method of controlling a robot system including an articulated robot and a control device is provided. The articulated robot includes links connected by joints, motors configured to drive the joints respectively, and detection devices configured to detect rotation amounts of the joints respectively. The control device controls the motors. The method includes the steps of, by the control device, recording movement information of the joints based on outputs of the detection devices; when detecting an abnormality in the operation of the articulated robot, determining presence or absence of a failure in the articulated robot based on the movement information recorded in at least a period from before detection of the abnormality until detection of the abnormality; and specifying a failure portion of the articulated robot if it is determined that there is a failure in the articulated robot in the step of determining.

Abstract: The semiconductor device includes: a semiconductor substrate; a conductor layer formed over the semiconductor substrate and having an upper surface and a lower surface; a conductive pillar formed on the upper surface of the conductor layer and having an upper surface, a lower surface, and a sidewall; a protection film covering the upper surface of the conductor layer and having an opening which exposes the upper surface and the sidewall of the conductive pillar; and a protection film covering the sidewall of the conductive pillar. Then, in plan view, the opening of the protection film is wider than the upper surface of the conductive pillar and exposes an entire region of an upper surface of the conductive pillar.

Abstract: A bonding pad of a semiconductor chip in a QFP includes, in its exposed portion, a via disposition area comprising: a first segment that connects a corner and a first point; a second segment that connects the corner and a second point; and an arc that connects the first point and the second point and forms a convex shape toward the corner. Further, in a plan view of the bonding pad, at least a part of a via is disposed so as to overlap with the via disposition area.

Abstract: A package bag made by a packaging laminate film and provided midway between both side portions with a back-lined portion and a filling space of a liquid packing material, wherein the back-lined portion is sealed on its peripheral edge with an outer edge seal part, an inner edge seal part, an upper edge seal part and a lower edge seal part, while an internal side of these seal parts is defined by a partition wall of these seal parts into a self-supporting stable portion and a pouring path communicating to a pouring port disposed in the outer edge seal part; and the inner edge seal part is provided with a first easy-peelable portion separating the self-supporting stable portion and the filling space and a second easy-peelable portion separating the pouring path and the filling space, and the first easy-peelable portion is preferentially peeled by pushing the filling space.

Abstract: An epoxy resin composition is provided comprising (A) an epoxy resin, (B) an aromatic amine-based curing agent in such amounts that an equivalent ratio of amino groups in component (B) to epoxy groups in component (A) ranges from 0.7/1 to 1.5/1, and (C) a curing accelerant in the form of arylborate salt. The composition has low-temperature curability and workability and is also improved in adhesion and adhesion retention.

Abstract: A barrier layer BAL is formed so as to be in contact with an aluminum pad ALP. A titanium alloy layer including a titanium film and a titanium nitride film is formed as barrier layer BAL. A seed layer SED is formed so as to be in contact with barrier layer BAL. A copper film is formed as seed layer SED. A silver bump AGBP is formed so as to be in contact with seed layer SED. Silver bump AGBP is constructed with a silver film AGPL formed by an electrolytic plating method. A tin alloy ball SNB is bonded to silver bump AGBP.

Abstract: It is possible to prevent deterioration of a redistribution layer due to exposure of the redistribution layer from an upper insulating film and the resultant reaction with moisture, ions, or the like. As means thereof, in a semiconductor device having a plurality of wiring layers formed in an element formation region and having a redistribution layer connected with a pad electrode which is an uppermost wiring layer, a dummy pattern is arranged in a region closer to a scribe region than the redistribution layer.

Abstract: A circular spline is secured to a housing. An output member is positioned relative to the circular spline, an outer race of a bearing is secured to the housing, and an inner race of the bearing is secured to the output member. A flex spline is positioned relative to the circular spline and secured to the output member. A wave generator is positioned relative to the circular spline, and a support member, by which the wave generator is rotatably supported, is secured to the housing.

Abstract: A semiconductor device includes an opening and a redistribution layer gutter which are formed integrally in a polyimide resin film of a single layer. A redistribution layer is formed in the polyimide resin film of a single layer. A wiring material (silver) including the redistribution layer can be inhibited from migrating.

Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate, forming, over a main surface the semiconductor substrate, a first insulating film, forming, over the first insulating film, an Al-containing conductive film containing aluminum as a main component, patterning the Al-containing conductive film to form a pad, forming, over the first insulating film, a second insulating film to cover the pad therewith, forming an opening in the second insulating film, and electrically coupling a copper wire to the pad exposed from the opening.

Abstract: To enhance reliability of a test by suppressing defective bonding of a solder in the test of a semiconductor device, a method of manufacturing the semiconductor device includes: preparing a semiconductor wafer that includes a first pad electrode provided with a first cap film and a second pad electrode provided with a second cap film. Further, a polyimide layer that includes a first opening on the first pad electrode and a second opening on the second pad electrode is formed, and then, a rearrangement wiring that is connected to the second pad electrode via the second opening is formed. Next, an opening is formed in the polyimide layer such that an organic reaction layer remains on each of the first pad electrode and a bump land of the rearrangement wiring, then heat processing is performed on the semiconductor wafer, and then, a bump is formed on the rearrangement wiring.

Abstract: In the semiconductor device, a bump electrode which connects a semiconductor chip and a wiring board is made up of a first part surrounded by an insulating film and a second part exposed from the insulating film. Since it is possible to reduce a width of the bump electrode while increasing a height of the bump electrode, a distance between the neighboring bump electrodes can be increased, and a filling property of a sealing material can be improved.

Abstract: A circular spline is secured to a housing. An output member is positioned relative to the circular spline, an outer race of a bearing is secured to the housing, and an inner race of the bearing is secured to the output member. A flex spline is positioned relative to the circular spline and secured to the output member. A wave generator is positioned relative to the circular spline, and a support member, by which the wave generator is rotatably supported, is secured to the housing.

Abstract: Reliability of a semiconductor device is improved. A slope is provided on a side face of an interconnection trench in sectional view in an interconnection width direction of a redistribution layer. The maximum opening width of the interconnection trench in the interconnection width direction is larger than the maximum interconnection width of the redistribution layer in the interconnection width direction, and the interconnection trench is provided so as to encapsulate the redistribution layer in plan view.