Patents by Inventor Akira Yajima

Akira Yajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170373031
    Abstract: The semiconductor device includes: a semiconductor substrate; a conductor layer formed over the semiconductor substrate and having an upper surface and a lower surface; a conductive pillar formed on the upper surface of the conductor layer and having an upper surface, a lower surface, and a sidewall; a protection film covering the upper surface of the conductor layer and having an opening which exposes the upper surface and the sidewall of the conductive pillar; and a protection film covering the sidewall of the conductive pillar. Then, in plan view, the opening of the protection film is wider than the upper surface of the conductive pillar and exposes an entire region of an upper surface of the conductive pillar.
    Type: Application
    Filed: April 28, 2017
    Publication date: December 28, 2017
    Inventors: Akira YAJIMA, Yoshiaki Yamada
  • Patent number: 9853005
    Abstract: An improvement is achieved in the reliability of a semiconductor device. Over a semiconductor substrate, an interlayer insulating film is formed and, over the interlayer insulating film, a pad is formed. Over the interlayer insulating film, an insulating film is formed so as to cover the pad. In the insulating film, an opening is formed to expose a part of the pad. The pad is a pad to which a copper wire is to be electrically coupled and which includes an Al-containing conductive film containing aluminum as a main component. Over the Al-containing conductive film in a region overlapping the opening in plan view, a laminated film including a barrier conductor film, and a metal film over the barrier conductor film is formed. The metal film is in an uppermost layer. The barrier conductor film is a single-layer film or a laminated film including one or more layers of films selected from the group consisting of a Ti film, a TiN film, a Ta film, a TaN film, a W film, a WN film, a TiW film, and a TaW film.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: December 26, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takehiko Maeda, Akira Yajima, Satoshi Itou, Fumiyoshi Kawashiro
  • Patent number: 9837326
    Abstract: To enhance reliability of a test by suppressing defective bonding of a solder in the test of a semiconductor device, a method of manufacturing the semiconductor device includes: preparing a semiconductor wafer that includes a first pad electrode provided with a first cap film and a second pad electrode provided with a second cap film. Further, a polyimide layer that includes a first opening on the first pad electrode and a second opening on the second pad electrode is formed, and then, a rearrangement wiring that is connected to the second pad electrode via the second opening is formed. Next, an opening is formed in the polyimide layer such that an organic reaction layer remains on each of the first pad electrode and a bump land of the rearrangement wiring, then heat processing is performed on the semiconductor wafer, and then, a bump is formed on the rearrangement wiring.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: December 5, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Akira Yajima
  • Patent number: 9806049
    Abstract: In the semiconductor device, a bump electrode which connects a semiconductor chip and a wiring board is made up of a first part surrounded by an insulating film and a second part exposed from the insulating film. Since it is possible to reduce a width of the bump electrode while increasing a height of the bump electrode, a distance between the neighboring bump electrodes can be increased, and a filling property of a sealing material can be improved.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: October 31, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Akira Yajima
  • Patent number: 9793228
    Abstract: Reliability of a semiconductor device is improved. A slope is provided on a side face of an interconnection trench in sectional view in an interconnection width direction of a redistribution layer. The maximum opening width of the interconnection trench in the interconnection width direction is larger than the maximum interconnection width of the redistribution layer in the interconnection width direction, and the interconnection trench is provided so as to encapsulate the redistribution layer in plan view.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: October 17, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Akira Yajima
  • Publication number: 20170278362
    Abstract: An information processing device (10) includes an image acquisition unit (110) that acquires an image obtained by capturing a vicinity of a merchandise self-checkout system, and a detection unit (120) that detects a presence or absence of a plurality of persons within a first area in the vicinity of the merchandise self-checkout system during a time period between a start and end of a merchandise self-checkout process based on the acquired image.
    Type: Application
    Filed: July 16, 2015
    Publication date: September 28, 2017
    Applicant: NEC Corporation
    Inventors: Mizuto SEKINE, Akira YAJIMA, Yuriko YASUDA
  • Publication number: 20170247130
    Abstract: In a method for forming a lateral sealed portion, a liquid packing material can be filled without biting bubbles, granulates and so on included in the liquid packing material into the lateral sealed portion. In a method for forming a lateral sealed portion with a pair of lateral sealing rolls after a packaging film fed and run is folded at its central portion and a vertical sealing is performed at their side edge parts to shape into a cylindrical form and a liquid packing material is filled into an inside of the cylindrically formed packaging film, at least a folded side part of the cylindrically formed packaging film is pushed with a pushing means arranged between heat sealing bars located at equal intervals in a circumferential direction of the lateral sealing roll and the lateral sealed portion is formed at a pushed position with the pair of lateral sealing bars.
    Type: Application
    Filed: August 31, 2015
    Publication date: August 31, 2017
    Applicant: TAISEI LAMICK CO., LTD.
    Inventors: Tomohisa HOSAKA, Akira YAJIMA, Michiya FUKUDA
  • Publication number: 20170228989
    Abstract: In order to solve the above-described problem, there is provided a self-service POS device (10) including an acquisition unit (11) that acquires a captured image obtained by capturing at least one of a customer involved in an operation of reading product information, a product involved in the reading operation, and a store clerk involved in the reading operation, and a captured image display unit (12) that displays the captured image on a display faced toward the customer.
    Type: Application
    Filed: September 9, 2015
    Publication date: August 10, 2017
    Applicant: NEC Corporation
    Inventors: Mizuto SEKINE, Akira YAJIMA, Yuriko YASUDA
  • Publication number: 20170210009
    Abstract: A method of controlling a robot system including an articulated robot and a control device is provided. The articulated robot includes links connected by joints, motors configured to drive the joints respectively, and detection devices configured to detect rotation amounts of the joints respectively. The control device controls the motors. The method includes the steps of, by the control device, recording movement information of the joints based on outputs of the detection devices; when detecting an abnormality in the operation of the articulated robot, determining presence or absence of a failure in the articulated robot based on the movement information recorded in at least a period from before detection of the abnormality until detection of the abnormality; and specifying a failure portion of the articulated robot if it is determined that there is a failure in the articulated robot in the step of determining.
    Type: Application
    Filed: March 31, 2017
    Publication date: July 27, 2017
    Inventors: Akira Yajima, Takayuki Ogawara, Hidetada Asano
  • Patent number: 9704805
    Abstract: To provide a semiconductor device having improved reliability by improving a coupling property between a semiconductor chip and a bonding wire. A redistribution layer is comprised of a Cu film, an Ni film, and a Pd film which have been formed successively from the side of a semiconductor substrate. The Pd film on the uppermost surface is used as an electrode pad and a bonding wire made of Cu is coupled to the upper surface of the Pd film. The thickness of the Pd film is made smaller than that of the Ni film and the thickness of the Ni film is made smaller than that of the Cu film. The Cu film, the Ni film, and the Pd film have the same pattern shape in a plan view.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: July 11, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hisao Shigihara, Hiromi Shigihara, Akira Yajima, Hiroshi Tsukamoto
  • Publication number: 20170174879
    Abstract: Provided is a liquid epoxy resin composition superior in rubber particle dispersibility, and exhibiting a lower elastic modulus without impairing a high heat resistance and mechanical strength that are inherent to epoxy resins. The liquid epoxy resin composition contains: (A) a liquid epoxy resin; (B) a rubber particle-dispersed epoxy resin composition containing (B-1) 50 to 90% by mass of a liquid epoxy resin; (B-2) 10 to 50% by mass of rubber particles, the rubber particles having an average particle diameter of 10 to 10,000 nm; (C) a curing agent; (D) an inorganic filler; and (E) a curing accelerator.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 22, 2017
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Naoyuki KUSHIHARA, Kazuaki SUMITA, Akira YAJIMA
  • Patent number: 9643317
    Abstract: A method of controlling a robot system including an articulated robot and a control device is provided. The articulated robot includes links connected by joints, motors configured to drive the joints respectively, and detection devices configured to detect rotation amounts of the joints respectively. The control device controls the motors. The method includes the steps of, by the control device, recording movement information of the joints based on outputs of the detection devices; when detecting an abnormality in the operation of the articulated robot, determining presence or absence of a failure in the articulated robot based on the movement information recorded in at least a period from before detection of the abnormality until detection of the abnormality; and specifying a failure portion of the articulated robot if it is determined that there is a failure in the articulated robot in the step of determining.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: May 9, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Yajima, Takayuki Ogawara, Hidetada Asano
  • Patent number: 9614194
    Abstract: According to one embodiment, a battery includes an electrode group, at least one positive electrode current collector tab, at least one negative electrode current collector tab, and a case. The case includes a case portion and an edge portion. The edge portion includes a heat sealed part configured to seal the case portion and a non-sealed part. The electrode group is housed in the case portion while an end portion of at least one of the positive electrode current collector tab and the negative electrode current collector tab is provided in the non-sealed part.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: April 4, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masahiro Murata, Kengo Kurata, Akira Yajima, Hiroshi Watanabe
  • Publication number: 20170092609
    Abstract: In the semiconductor device, a bump electrode which connects a semiconductor chip and a wiring board is made up of a first part surrounded by an insulating film and a second part exposed from the insulating film. Since it is possible to reduce a width of the bump electrode while increasing a height of the bump electrode, a distance between the neighboring bump electrodes can be increased, and a filling property of a sealing material can be improved.
    Type: Application
    Filed: September 21, 2016
    Publication date: March 30, 2017
    Inventor: Akira YAJIMA
  • Patent number: 9607954
    Abstract: Object is to prevent a coupling failure between a rewiring and a coupling member for coupling to outside. A passivation film and a first polyimide film are formed so as to cover a wiring layer. A first opening portion is formed in the first polyimide film. A rewiring is formed on the first polyimide film so as to be coupled to the wiring layer via the first opening portion. A second polyimide film that covers the rewiring and has a second opening portion communicated with the rewiring is formed. A palladium film is formed as a barrier film by sputtering on a portion of the surface of the rewiring at which the second opening portion exists. A solder ball is coupled to the palladium film.
    Type: Grant
    Filed: May 14, 2016
    Date of Patent: March 28, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Akira Yajima
  • Publication number: 20170062361
    Abstract: Reliability of a semiconductor device is improved. A slope is provided on a side face of an interconnection trench in sectional view in an interconnection width direction of a redistribution layer. The maximum opening width of the interconnection trench in the interconnection width direction is larger than the maximum interconnection width of the redistribution layer in the interconnection width direction, and the interconnection trench is provided so as to encapsulate the redistribution layer in plan view.
    Type: Application
    Filed: June 20, 2016
    Publication date: March 2, 2017
    Applicant: Renesas Electronics Corporation
    Inventor: Akira YAJIMA
  • Publication number: 20170062292
    Abstract: To enhance reliability of a test by suppressing defective bonding of a solder in the test of a semiconductor device, a method of manufacturing the semiconductor device includes: preparing a semiconductor wafer that includes a first pad electrode provided with a first cap film and a second pad electrode provided with a second cap film. Further, a polyimide layer that includes a first opening on the first pad electrode and a second opening on the second pad electrode is formed, and then, a rearrangement wiring that is connected to the second pad electrode via the second opening is formed. Next, an opening is formed in the polyimide layer such that an organic reaction layer remains on each of the first pad electrode and a bump land of the rearrangement wiring, then heat processing is performed on the semiconductor wafer, and then, a bump is formed on the rearrangement wiring.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 2, 2017
    Inventor: Akira YAJIMA
  • Patent number: 9576921
    Abstract: To improve an integration degree of a semiconductor device. The semiconductor device includes a plurality of wiring layers formed on the semiconductor substrate, a pad electrode formed on an uppermost wiring layer among the plurality of wiring layers, a base insulating film having a pad opening above the pad electrode, and a rewiring electrically connected to the pad electrode and extending over the base insulating film. Further, the semiconductor device includes a protective film covering an upper surface of the rewiring and having an external pad opening exposing part of the upper surface of the rewiring, an external pad electrode electrically connected to the rewiring through the external pad opening and extending over the protective film, and a wire connected to the external pad electrode. Part of the external pad electrode is located in a region outside the rewiring.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: February 21, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Akira Yajima, Seiji Muranaka
  • Publication number: 20170033074
    Abstract: A semiconductor device includes an opening and a redistribution layer gutter which are formed integrally in a polyimide resin film of a single layer. A redistribution layer is formed in the polyimide resin film of a single layer. A wiring material (silver) including the redistribution layer can be inhibited from migrating.
    Type: Application
    Filed: October 14, 2016
    Publication date: February 2, 2017
    Inventor: Akira YAJIMA
  • Publication number: 20170005048
    Abstract: In a method of manufacturing a semiconductor device, a semiconductor chip has first and second pads, a passivation film formed such that respective parts of the first and second pads are exposed, a first surface-metal-layer provided on the part of the first pad and a part of the passivation film, and a second surface-metal-layer provided on the part of the second pad and another part of the passivation film. Respective wires are electrically connected to the first and second surface-metal-layers. The semiconductor chip and the respective wires are then sealed with a resin.
    Type: Application
    Filed: September 13, 2016
    Publication date: January 5, 2017
    Inventors: HIROMI SHIGIHARA, HIROSHI TSUKAMOTO, AKIRA YAJIMA