Patents by Inventor Alan Gatherer

Alan Gatherer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6058404
    Abstract: A digital filter can be implemented with a reduced number of components for a transform function having specific characteristics in the regions outside of a center region. The characteristics are that the transform function waveform is periodic with period T and has or can be approximated by at least one envelope, the envelope decaying a multiplier constant for each period T in a direction away from the waveform center. The digital filter has three groups of elements. A center group of components functions in a manner similar to the prior digital filters. A positive time group of components receives the signals from the center, and using a group of delay component, delays the signal by one period T, is reduced by the multiplier constant factor, and after having the current signal from the center group applied thereto, is once again applied to the positive time group delay components.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: May 2, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Shivaling Mahant-Shetti, Alan Gatherer
  • Patent number: 6055268
    Abstract: A modem communication system with receiving and transmission paths includes a direct equalizer system having an adaptive filter (1532) in the transmission path to compensate for frequency distortion of the communication channel. The transmitter filter coefficients are adapted by a filter coefficient calculator (1528), under control of a data detector (1526) which detects incoming data in the receiving path. A switch (1534) is controlled by status of a transmit output data buffer to multiplex either the training sequence or output data into the transmission path. When the buffer is idle, the training sequence generator (1540) is linked to a digital-to-analog (D/A) converter (1536) and line driver (1538). The receiving path includes an isolation switch (1520), a receiver amplifier (1522) and a slicer (1524). The receiver correlates the received training sequence with a known training sequence and updates the equalizer filter coefficients using an adaptation algorithm, such as a least mean squared algorithm.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: April 25, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: William C. Timm, Walter Y. Chen, Gene A. Frantz, Domingo G. Garcia, Xiaolin Lu, Dennis G. Mannering, Michael O. Polley, Terence J. Riley, Donald P. Shaver, Song Wu, Alan Gatherer, Paul E. Schurr, Douglas B. Weiner
  • Patent number: 6044107
    Abstract: An MDSL modem is provided that is inter-operable with an ADSL modem. The present invention provides a method for modem operation, by dividing available bandwidth for the modem into a plurality of subsets, selecting at least one of the plurality of subsets for use as a communication path, reducing the SNR value used for bit loading for the selected subsets by a predetermined amount, undersampling any received data, and fast fourier transforming the received data to recover the data transmitted. An MDSL modem is provided having circuitry for dividing available bandwidth for the modem into a plurality of subsets, circuitry for selecting at least one of the plurality of subsets for use as a communication path, circuitry for reducing the SNR value used for bit loading for the selected subsets by a predetermined amount, circuitry for undersampling any received data, and circuitry for fast fourier transforming the received data to recover the data transmitted.
    Type: Grant
    Filed: November 13, 1996
    Date of Patent: March 28, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Alan Gatherer, Mohammed Nafie, Donald P. Shaver
  • Patent number: 5889691
    Abstract: In a multiplier unit having a preprocessor stage, a multiplier stage, and a summation stage, the multiplier stage includes a shift register, a gate component for controllably transmitting the multiplicand A in a manner determined by a bit signal of multiplier B applied to the gate component control terminal. Partial products are grouped by multiplicand digits and each digit is applied, through delay components determined by the order of the digit, to first terminals of an associated adder components. Output signals from each adder component is transmitted through a plurality of delay components and applied to second input terminals of the same adder component. In this manner, partial products A.sub.p *B.sub.q are assembled and the partial products (A.sub.0 + . . . A.sub.M)*B.sub.q =A*B.sub.q can be applied to the summation unit in a single period. When the multiplier is an integer multiple of the multiplicand, the implementation is particularly convenient.
    Type: Grant
    Filed: January 6, 1997
    Date of Patent: March 30, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Alan Gatherer, Carl E. Lemonds
  • Patent number: 5802461
    Abstract: Apparatus and method (10) for recovering timing information from a vestigial sideband (VSB) modulated signal generate a left hand component signal and a right hand component signal from the received signal, and filters B.sub.1 (f) and B.sub.r (f) (12, 14) filter the left hand and right hand component signals respectively. The filtered signals are then multiplied together without taking the complex conjugate of either signal, as in band edge component maximization (BECM). The generated output signal may be used in a feedback loop to regulate the sample rate of an analog to digital converter (32).
    Type: Grant
    Filed: September 16, 1996
    Date of Patent: September 1, 1998
    Assignee: Texas Instruments Incorporated
    Inventor: Alan Gatherer
  • Patent number: 5461640
    Abstract: The present invention includes an optimized equalizer (22) used to equalize a signal (at 20) received from a distorting channel (18). First, auto and cross correlations of a predetermined training sequence and the received signal are generated (at 21c). The correlations are then used to generate a solution matrix (21d). An eigenvector associated with a maximum eigenvalue of a function of the correlations is formed (21e) using the solution matrix (21d) and then used to generate equalizer control signals (21f) or parameters defining taps of a filter implementing the equalizer (22).
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: October 24, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Alan Gatherer