Patents by Inventor Alan Gatherer

Alan Gatherer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060280143
    Abstract: A communication circuit (28) is designed with a signal processing circuit (370) arranged to produce a first plurality of data signals and receive a second plurality of data signals. A transmit circuit (364) is coupled to receive the first plurality of data signals and transmit each data signal of the first plurality of data signals on a respective transmit frequency in a predetermined sequence of transmit frequencies. A receive circuit (362) is coupled to receive each data signal of the second plurality of data signals from a remote transmitter on the respective transmit frequency in the predetermined sequence. The receive circuit applies the second plurality of data signals to the signal processing circuit.
    Type: Application
    Filed: August 22, 2006
    Publication date: December 14, 2006
    Inventors: Anand Dabak, Mohammed Nafie, Timothy Schmidl, Alan Gatherer
  • Publication number: 20060252447
    Abstract: In this invention the base station utilizes a history of previous TPC commands to provide more deterministic channel behavior. This enables better generation of future TPC commands, SIR estimates and channel estimates. Prior solutions don't utilize previous TPC decisions. This invention provides enhances SIR estimation, channel estimation and power control.
    Type: Application
    Filed: May 3, 2006
    Publication date: November 9, 2006
    Inventors: Tarik Muharemovic, Sriram Sundararajan, Vijay Sundararajan, Alan Gatherer
  • Patent number: 7120213
    Abstract: An apparatus and method for transmitting and receiving a bit stream. On the transmission side, coded bits (Y.sub.t) and an interleaved version of the coded bits (X.sub.t) are separately modulated and transmitted. On the reception side, a priori output probabilities produced by a probability generator (34) are combined (112) and then input to a SISO decoder (111). Combined a posteriori output probabilities (115) produced by the SISO decoder are split (113) and then fed back to the probability generator.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: October 10, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Alan Gatherer, Tarik Muharemovic, Everest W. Huang, Srinath Hosur
  • Patent number: 7099414
    Abstract: In a wireless communication receiver (31) of a wireless communication system that utilizes transmit diversity and turbo coding, symbol decisions are based at least in part on a posteriori probabilities (47, 48) produced by SISO decoders (35, 36). These probabilities are produced iteratively in alternating fashion to support the symbol decision process. The SISO decoder associated with the weakest (92) wireless communication channel goes first (93) in the iterative process.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: August 29, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Alan Gatherer, Everest W. Huang
  • Patent number: 7065699
    Abstract: Operands (90) that are represented in two's complement format are prepared for use in binary arithmetic. For each operand, it is determined (91, 93) whether an original value thereof is within a predetermined proximity of a maximum positive/maximum negative value boundary associated with the two's complement format. If any of the original operand values is within the predetermined proximity, all of the original operand values are adjusted (95) to produce respectively corresponding adjusted operand values (96) for use in a binary arithmetic operation.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: June 20, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Tod David Wolf, Alan Gatherer
  • Patent number: 7039036
    Abstract: A circuit for processing binary sequences is designed with a plurality of stages (530–534) coupled to provide plural signal paths (526,528). Each stage includes respective signal paths (550,562) for a first Ra1(k) and a second Rb1(k) data sequence. Each stage further includes a respective delay circuit (502) having a different delay from said respective delay circuit of each other stage (504,506) of the plurality of stages. A stage having a greatest delay (502) precedes other stages (504,506) in the plurality of stages of at least one of the plural signal paths.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: May 2, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Anand G. Dabak, Alan Gatherer, Sundararajan Sriram
  • Publication number: 20060083174
    Abstract: The present invention provides a collision avoidance manager for use with single-port memories. In one embodiment, the collision avoidance manager includes a memory structuring unit configured to provide a memory arrangement of the single-port memories having upper and lower memory banks arranged into half-memory portions. Additionally, the collision avoidance manager also includes a write memory alignment unit coupled to the memory structuring unit and configured to provide double-data writing to the memory arrangement based on memory collision avoidance. In a preferred embodiment, the collision avoidance manager also includes a read memory alignment unit coupled to the memory structuring unit and configured to provide double-data reading from the memory arrangement while maintaining the memory collision avoidance.
    Type: Application
    Filed: September 29, 2005
    Publication date: April 20, 2006
    Applicant: Texas Instruments Inc.
    Inventors: Byonghyo Shim, Yanni Chen, Manish Goel, Tod Wolf, Sriram Sundararajan, Alan Gatherer
  • Patent number: 7020827
    Abstract: MAP decoder with cascade architecture. Iterative Turbo decoders can use two such cascade MAP decoders with feedback in conjunction with interleaver and deinterleaver where the MAP decoders generate extrinsic information for iterations. The cascade architecture limits the required number of max* blocks which compute the logarithm of a sum of exponentials as part of the BCJR method.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: March 28, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Alan Gatherer, Tod D. Wolf
  • Patent number: 6999530
    Abstract: In a wireless communication receiver (31) of a wireless communication system that utilizes transmit diversity and turbo coding, symbol probabilities (45, 46) are generated (34) based at least in part on a posteriori output probabilities (47, 48) produced by SISO decoders (35, 36).
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: February 14, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Everest W. Huang, Alan Gatherer, Tarik Muharemovic
  • Publication number: 20060029169
    Abstract: An apparatus and method for transmitting and receiving a bit stream. On the transmission side, coded bits (Y.sub.t) and an interleaved version of the coded bits (X.sub.t) are separately modulated and transmitted. On the reception side, a priori output probabilities produced by a probability generator (34) are combined (112) and then input to a SISO decoder (111). Combined a posteriori output probabilities (115) produced by the SISO decoder are split (113) and then fed back to the probability generator.
    Type: Application
    Filed: October 7, 2005
    Publication date: February 9, 2006
    Inventors: Alan Gatherer, Tarik Muharemovic, Everest Huang, Srinath Hosur
  • Patent number: 6996162
    Abstract: A method (70) of operating a wireless receiver (UST). The method receives a wireless communicated signal, wherein the signal comprises a first synchronization channel component. The method also correlates a synchronization channel value (PSC) to the signal to produce a plurality of correlation samples in response to a correlation between the synchronization channel value and the signal. Further, the method compares (72) the plurality of correlation samples to a threshold (?) and stores as a first set of correlation samples selected ones of the plurality of correlation samples that exceed the threshold and are within a first time sample period, wherein each of the correlation samples in the first set has a corresponding sample time relative to the first time sample period. Finally, the method combines (74) a second set of correlation samples with the first set of correlation samples.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: February 7, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Srinath Hosur, Sundararajan Sriram, Anand G. Dabak, Alan Gatherer
  • Patent number: 6996118
    Abstract: A linecard (175) permits an increased rate connection between a subscriber (15) and a service provider (40) over the PSTN (50) includes an analog interface (152) a digital interface (165) coupled to the digital backplane (170) to the service provider's host server (34), a conversion circuit (258) interspersed between the analog interface (152) and the digital interface (165), and a linecard microcontroller (300) configured to request bandwidth on the backplane (170) A linecard (175) incorporates a codec (250) with a code recognition mechanism (200) to monitor the Pulse Code Modulated (PCM) input from the provider. The code recognition mechanism (200) provides a way to dynamically allocate and deallocate timeslots on the backplane (170).
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: February 7, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Keith L. Quiring, Alan Gatherer
  • Patent number: 6996091
    Abstract: A linecard (175) permits an increased rate connection between a subscriber (15) and a service provider (40) over the PSTN (50) includes an analog interface (152) a digital interface (165) coupled to the digital backplane (170) to the service provider's host server (34), a conversion circuit (258) interspersed between the analog interface (152) and the digital interface (165), and a linecard microcontroller (300) configured to request bandwidth on the backplane (170) A linecard (175) incorporates a codec (250) with a code recognition mechanism (200) to monitor the Pulse Code Modulated (PCM) input from the provider. The code recognition mechanism (200) provides a way to dynamically allocate and deallocate timeslots on the backplane (170).
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: February 7, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Keith L. Quiring, Alan Gatherer
  • Patent number: 6996765
    Abstract: This invention describes implementation approaches for sliding window turbo decoders. Sliding windows are used for both the beta and alpha state metric calculations. Initialization of the beta/alpha prolog sections with data from a previous iteration is employed in conjunction with a reduced length prolog section. For subsequent sliding windows the trellis values of the prolog sections are dynamically initialized based upon data derived from the signal to noise ratio of the calculated extrinsic data or the difference between the two most probable trellis states.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: February 7, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Tod D. Wolf, Antonio F. Mondragon-Torres, Alan Gatherer
  • Patent number: 6980605
    Abstract: A turbo decoder in which a sliding-block MAP decoder pipelines the forward-propagating and backward-propagating computations.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: December 27, 2005
    Inventors: Alan Gatherer, Tod D. Wolf, Armelle Laine
  • Patent number: 6970495
    Abstract: The frequency hopping pattern of a first wireless communication device is modified such that each transmission (73) to a second wireless communication device is on a frequency (MSj+1) that the second device's normal frequency hopping pattern specifies for one of the second device's next several transmissions to the first device. This permits the second device to make quality measurements (54) on a frequency that the second device will soon use (51) for transmission to the first device.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: November 29, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Timothy M. Schmidl, Anand G. Dabak, Mohammed Nafie, Alan Gatherer
  • Publication number: 20050254428
    Abstract: In one form of the invention, a process of sending real-time information from a sender computer (103) to a receiver computer (105) coupled to the sender computer (103) by a packet network (100) wherein packets (111,113) sometimes become lost, includes steps of directing (441) packets (111) containing the real-time information from the sender computer (103) by at least one path (119) in the packet network (100) to the receiver computer (105), and directing packets (113) containing information dependent on the real-time information from the sender computer (103) by at least one path diversity path (117) in the packet network (100) to the same receiver computer (105).
    Type: Application
    Filed: July 6, 2005
    Publication date: November 17, 2005
    Inventors: Stephen Perkins, Alan Gatherer, Krishanasamy Anandakumar, Alan McCree, Vishu Viswanathan
  • Patent number: 6954505
    Abstract: A transceiver (100) such as used in Discrete Multitone (DMT) modulation of digital signals for communication, such as in a DSL modem communications system, is described. The transceiver (100) includes a function (119) by way of which unloaded subchannels are encoded with a clip prevention signal. The clip prevention signal is derived to avoid clipping by an amplifier (18) after modulation into the time domain, upsampling, and filtering. The effects of the upsampling and filtering are considered in deriving the clip prevention signal, by considering the upsampling and filtering as a polyphase combination, and using the filter response for each phase. Frequency domain and time domain update alternatives are disclosed.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: October 11, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Alan Gatherer, Michael O. Polley, Arthur J. Redfern
  • Publication number: 20050180373
    Abstract: The interference cancellation (IC) system (500) includes a plurality of IC units, for which IC is applied. Each IC unit has its spread spectrum code generator, delay devices, correlators or matched filters (MF), spreading circuits and subtracting and adding devices. The IC process in accordance with the invention includes using a bank of MF to despread the received signal at every time instant corresponding to every identified multipath of every user's transmitted signal. Based on the despread signals, an initial decision for the present information symbol of every user can be made using a single-user receiver such as, for example, the conventional Rake receiver or an equalizer. Based on the initial decisions, IC regenerates the multipath signals for each user using timed versions of the spread spectrum code, the delays of the multipaths, and the corresponding channel medium estimates.
    Type: Application
    Filed: January 11, 2005
    Publication date: August 18, 2005
    Inventors: Aris Papasakellariou, Alan Gatherer
  • Patent number: 6930983
    Abstract: In one form of the invention, a process of sending real-time information from a sender computer (103) to a receiver computer (105) coupled to the sender computer (103) by a packet network (100) wherein packets (111,113) sometimes become lost, includes steps of directing (441) packets (111) containing the real-time information from the sender computer (103) by at least one path (119) in the packet network (100) to the receiver computer (105), and directing packets (113) containing information dependent on the real-time information from the sender computer (103) by at least one path diversity path (117) in the packet network (100) to the same receiver computer (105).
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: August 16, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Stephen J. Perkins, Alan Gatherer, Krishanasamy Anandakumar, Alan V. McCree, Vishu Viswanathan