Abstract: A wireless communication system (10). The system comprises transmitter circuitry (BST1) comprising circuitry for transmitting a plurality of frames to a receiver in a first cell (Cell 1). Each of the plurality of frames comprises a bit group (22), and the bit group uniquely distinguishes the first cell from a second cell (Cell 2) adjacent the first cell. The transmitter circuitry further comprises circuitry (54) for inserting a bit sequence into the bit group. The bit sequence is selected from a plurality of bit sequences (S1-SK) such that successive transmissions by the transmitter circuitry comprise a cycle of successive ones of the plurality of bit sequences.

Abstract: The present invention provides a method of operating a base station transmitter. In one embodiment, the method includes providing a cellular downlink synchronization signal having primary and secondary portions, wherein the primary portion is common for all cells and the secondary portion is cell-specific and transmitting the cellular downlink synchronization signal. In another embodiment, the method includes providing a cellular downlink synchronization signal having primary and secondary portions wherein the primary portion employs a corresponding one of a plurality of different primary signals allocated to adjoining transmission cells. The method also includes further providing cell-specific information in the secondary portion and transmitting the cellular downlink synchronization signal. The present invention also provides a method of operating user equipment.

Abstract: This invention provide parallel interference cancellation for wireless communication base stations. Received user inputs symbols are spread by means of pseudo-noise sequences to form user input chip vectors. These are added together and interpreted to form chip vectors of interference samples. These chip vectores are despread to form interference output symbols by pseudo-noise sequences. The interference output signals are subtracted from the received user input symbols to obtain a first estimate of transmitted symbols. This process may be continued for two or more iterations to obtain better interference cancellation.

Abstract: Parallel concatenated trellis-coding modulation is accomplished by producing coded bits (21) from uncoded bits and also producing an interleaved version (22) of the coded bits from the uncoded bits. A first coded bits-to-signal mapping (mapping 1) is applied to the coded bits to produce a first output signal (S11), and a second coded bits-to-signal mapping (mapping 2) is applied to the interleaved version of the coded bits to produce a second output signal (S22), wherein the second coded bits-to-signal mapping differs from the first coded bits-to-signal mapping.

Abstract: A communication circuit (28) is designed with a signal processing circuit (370) arranged to produce a first plurality of data signals and receive a second plurality of data signals. A transmit circuit (364) is coupled to receive the first plurality of data signals and transmit each data signal of the first plurality of data signals on a respective transmit frequency in a predetermined sequence of transmit frequencies. A receive circuit (362) is coupled to receive each data signal of the second plurality of data signals from a remote transmitter on the respective transmit frequency in the predetermined sequence. The receive circuit applies the second plurality of data signals to the signal processing circuit.

Abstract: A wireless communication network (10) includes a wireless transmitter having a plurality of antennas (AT11, AT12). The transmitter includes for each of a plurality of different user channels (Dn), circuitry (22n) for providing a plurality of groups of symbols in a first symbol group sequence (D1n). Each of the plurality of different user channels includes circuitry (241n) for forming a first modulated symbol group sequence for the user channel by modulating the symbols in the first symbol group sequence with a unique code that corresponds to the user channel and distinguishes the user channel from each other of the plurality of different user channels and circuitry (261) for combining the first modulated symbol group sequences for transmission by a first antenna (AT11). Each of the plurality of different user channels includes circuitry (22n) for forming a second symbol group sequence (D2n) by time reversing symbols in at least some of the groups of symbols.

Abstract: A communication circuit (28) is designed with a signal processing circuit (370) arranged to produce a first plurality of data signals and receive a second plurality of data signals. A transmit circuit (364) is coupled to receive the first plurality of data signals and transmit each data signal of the first plurality of data signals on a respective transmit frequency in a predetermined sequence of transmit frequencies. A receive circuit (362) is coupled to receive each data signal of the second plurality of data signals from a remote transmitter on the respective transmit frequency in the predetermined sequence. The receive circuit applies the second plurality of data signals to the signal processing circuit.

Abstract: In this invention the base station utilizes a history of previous TPC commands to provide more deterministic channel behavior. This enables better generation of future TPC commands, SIR estimates and channel estimates. Prior solutions don't utilize previous TPC decisions. This invention provides enhances SIR estimation, channel estimation and power control.

Abstract: An apparatus and method for transmitting and receiving a bit stream. On the transmission side, coded bits (Y.sub.t) and an interleaved version of the coded bits (X.sub.t) are separately modulated and transmitted. On the reception side, a priori output probabilities produced by a probability generator (34) are combined (112) and then input to a SISO decoder (111). Combined a posteriori output probabilities (115) produced by the SISO decoder are split (113) and then fed back to the probability generator.

Abstract: In a wireless communication receiver (31) of a wireless communication system that utilizes transmit diversity and turbo coding, symbol decisions are based at least in part on a posteriori probabilities (47, 48) produced by SISO decoders (35, 36). These probabilities are produced iteratively in alternating fashion to support the symbol decision process. The SISO decoder associated with the weakest (92) wireless communication channel goes first (93) in the iterative process.

Abstract: Operands (90) that are represented in two's complement format are prepared for use in binary arithmetic. For each operand, it is determined (91, 93) whether an original value thereof is within a predetermined proximity of a maximum positive/maximum negative value boundary associated with the two's complement format. If any of the original operand values is within the predetermined proximity, all of the original operand values are adjusted (95) to produce respectively corresponding adjusted operand values (96) for use in a binary arithmetic operation.

Abstract: A circuit for processing binary sequences is designed with a plurality of stages (530–534) coupled to provide plural signal paths (526,528). Each stage includes respective signal paths (550,562) for a first Ra1(k) and a second Rb1(k) data sequence. Each stage further includes a respective delay circuit (502) having a different delay from said respective delay circuit of each other stage (504,506) of the plurality of stages. A stage having a greatest delay (502) precedes other stages (504,506) in the plurality of stages of at least one of the plural signal paths.

Abstract: The present invention provides a collision avoidance manager for use with single-port memories. In one embodiment, the collision avoidance manager includes a memory structuring unit configured to provide a memory arrangement of the single-port memories having upper and lower memory banks arranged into half-memory portions. Additionally, the collision avoidance manager also includes a write memory alignment unit coupled to the memory structuring unit and configured to provide double-data writing to the memory arrangement based on memory collision avoidance. In a preferred embodiment, the collision avoidance manager also includes a read memory alignment unit coupled to the memory structuring unit and configured to provide double-data reading from the memory arrangement while maintaining the memory collision avoidance.

Abstract: MAP decoder with cascade architecture. Iterative Turbo decoders can use two such cascade MAP decoders with feedback in conjunction with interleaver and deinterleaver where the MAP decoders generate extrinsic information for iterations. The cascade architecture limits the required number of max* blocks which compute the logarithm of a sum of exponentials as part of the BCJR method.

Abstract: In a wireless communication receiver (31) of a wireless communication system that utilizes transmit diversity and turbo coding, symbol probabilities (45, 46) are generated (34) based at least in part on a posteriori output probabilities (47, 48) produced by SISO decoders (35, 36).

Abstract: An apparatus and method for transmitting and receiving a bit stream. On the transmission side, coded bits (Y.sub.t) and an interleaved version of the coded bits (X.sub.t) are separately modulated and transmitted. On the reception side, a priori output probabilities produced by a probability generator (34) are combined (112) and then input to a SISO decoder (111). Combined a posteriori output probabilities (115) produced by the SISO decoder are split (113) and then fed back to the probability generator.

Abstract: A linecard (175) permits an increased rate connection between a subscriber (15) and a service provider (40) over the PSTN (50) includes an analog interface (152) a digital interface (165) coupled to the digital backplane (170) to the service provider's host server (34), a conversion circuit (258) interspersed between the analog interface (152) and the digital interface (165), and a linecard microcontroller (300) configured to request bandwidth on the backplane (170) A linecard (175) incorporates a codec (250) with a code recognition mechanism (200) to monitor the Pulse Code Modulated (PCM) input from the provider. The code recognition mechanism (200) provides a way to dynamically allocate and deallocate timeslots on the backplane (170).

Abstract: This invention describes implementation approaches for sliding window turbo decoders. Sliding windows are used for both the beta and alpha state metric calculations. Initialization of the beta/alpha prolog sections with data from a previous iteration is employed in conjunction with a reduced length prolog section. For subsequent sliding windows the trellis values of the prolog sections are dynamically initialized based upon data derived from the signal to noise ratio of the calculated extrinsic data or the difference between the two most probable trellis states.

Abstract: A method (70) of operating a wireless receiver (UST). The method receives a wireless communicated signal, wherein the signal comprises a first synchronization channel component. The method also correlates a synchronization channel value (PSC) to the signal to produce a plurality of correlation samples in response to a correlation between the synchronization channel value and the signal. Further, the method compares (72) the plurality of correlation samples to a threshold (?) and stores as a first set of correlation samples selected ones of the plurality of correlation samples that exceed the threshold and are within a first time sample period, wherein each of the correlation samples in the first set has a corresponding sample time relative to the first time sample period. Finally, the method combines (74) a second set of correlation samples with the first set of correlation samples.

Abstract: A linecard (175) permits an increased rate connection between a subscriber (15) and a service provider (40) over the PSTN (50) includes an analog interface (152) a digital interface (165) coupled to the digital backplane (170) to the service provider's host server (34), a conversion circuit (258) interspersed between the analog interface (152) and the digital interface (165), and a linecard microcontroller (300) configured to request bandwidth on the backplane (170) A linecard (175) incorporates a codec (250) with a code recognition mechanism (200) to monitor the Pulse Code Modulated (PCM) input from the provider. The code recognition mechanism (200) provides a way to dynamically allocate and deallocate timeslots on the backplane (170).