Patents by Inventor Alan Roth

Alan Roth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11245329
    Abstract: A power converter module includes a ground terminal, an input voltage terminal confirmed to receive a raw input voltage, and an interconnection terminal configured to provide a regulated output voltage to a load such as a SOC or SIP system to be powered. A voltage regulator is connected to the ground terminal and the input voltage terminal. An inductor has an inductor output connected to the interconnection terminal.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: February 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ying-Chih Hsu, Eric Soenen, Alan Roth
  • Patent number: 11227713
    Abstract: An integrated transformer can be fabricated to include multiple first conductors, a magnetic core, and multiple second conductors. The first conductor can be fabricated within a first layer of a semiconductor layer stack. The magnetic core can be fabricated within multiple second layers, below the first layer, of the semiconductor layer stack. The multiple second conductors can be fabricated within a third layer, below the second layer, of the semiconductor layer stack. The multiple first conductors can be connected to the multiple second conductors to form a primary winding of the integrated transformer. The integrated transformer can additionally include a coupling element to wrap around the magnetic core to form a secondary winding of the integrated transformer.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: January 18, 2022
    Inventors: Alan Roth, Eric Soenen
  • Patent number: 11204614
    Abstract: A current balance circuit including a current sensing front end for sensing an output signal from each of a plurality of switching regulators and a current sensor for receiving the sensed output signal and converting the sensed signal into a sensed current signal. The current balance circuit further includes a current averaging circuit for receiving the sensed output signals and determining an average current output for the plurality of switching regulators and a current difference circuit for receiving the average current value and the sensed current signals and determining a current difference for each of the plurality of switching regulators. A calibration circuit is included for receiving the current differences and calculating a calibration value corresponding to each of the plurality of switching regulators which provides an indication of how to adjust a current output of the plurality of switching regulators to balance the current across the plurality of switching regulators.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: December 21, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ying-Chih Hsu, Alan Roth, Eric Soenen
  • Patent number: 11158448
    Abstract: An inductor is formed in an IC device packaging structure. The structure includes an encapsulating material, with a ferromagnetic core in the encapsulation material. A plurality of metal layers are provided in the encapsulation material forming an inductor coil extending around the ferromagnetic core so as to form an inductor.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: October 26, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Alan Roth, Eric Soenen, Ying-Chih Hsu, Nick Samra, Stefan Rusu
  • Patent number: 11152332
    Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: October 19, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nick Samra, Alan Roth, Eric Soenen, Stefan Rusu, Paul Ranucci
  • Publication number: 20210257910
    Abstract: Devices and methods are provided for controlling dead-time of a direct current to direct current (DC-DC) converter. A control circuit includes a first transistor having a source/drain terminal coupled to an output voltage of the DC-DC converter configured to provide current based on the output voltage. The control circuit also includes a digital up/down counter having an output terminal electrically coupled to an input terminal of a delay cell of the DC-DC converter. A current sensing circuit of the control circuit is electrically coupled to an input terminal of the digital up/down counter configured to receive the current and drive the digital up/down counter based on the current.
    Type: Application
    Filed: April 7, 2021
    Publication date: August 19, 2021
    Inventors: Chia-Chun Chang, Alan Roth, Eric Soenen, Tysh-Bin Liu
  • Publication number: 20210255656
    Abstract: Voltage reference circuits are provided. A voltage reference circuit includes a transistor, a flipped-gate transistor, a first current mirror unit, a second current mirror unit and an output node. The gate and the drain of the flipped-gate transistor are coupled to the gate and the drain of the transistor. The first current mirror unit is configured to provide a first current to the flipped-gate transistor and the mirroring current in response to a bias current. The second current mirror unit is configured to drain a second current from the transistor in response to the mirroring current. The output node is coupled to the source of the transistor and the second current mirror unit, and is configured to output a reference voltage.
    Type: Application
    Filed: January 7, 2021
    Publication date: August 19, 2021
    Inventors: Yen-Ting WANG, Alan ROTH, Eric SOENEN, Alexander KALNITSKY, Liang-Tai KUO, Hsin-Li CHENG
  • Publication number: 20210249952
    Abstract: A semiconductor structure includes a first substrate. A first die and a second die are disposed over the first substrate and are adjacent to one another. A plurality of first conductive bumps are disposed between the first substrate and the first die and between the first substrate and the second die. A second substrate is disposed below the first substrate. A plurality of second conductive bumps is disposed between the first substrate and the second substrate. An in-package voltage regulator (PVR) chip is disposed over the second substrate. A molding material is disposed over the first substrate and surrounds the first die, the second die, the plurality of first conductive bumps, the plurality of second conductive bumps, and the PVR chip.
    Type: Application
    Filed: August 12, 2020
    Publication date: August 12, 2021
    Inventors: Alan Roth, Haohua Zhou, Eric Soenen, Ying-Chih Hsu, Paul Ranucci, Mei Hsu Wong, Tze-Chiang Huang
  • Patent number: 11075136
    Abstract: A method of transferring heat in a package includes conducting heat from a first device to a second device by a low thermal resistance substrate path in a chip layer of the package, conducting heat from an integrated circuit (IC) to a first package layer of the package, conducting heat from the first package layer of the package to at least a first set of through-vias positioned in the chip layer, and conducting heat from the first set of through-vias to a surface of a second package layer opposite the chip layer. The first device and the second device is part of the IC chip. The first package layer is adjacent to the chip layer.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: July 27, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ying-Chih Hsu, Alan Roth, Chuei-Tang Wang, Chih-Yuan Chang, Eric Soenen, Chih-Lin Chen
  • Patent number: 10998817
    Abstract: Devices and methods are provided for controlling dead-time of a direct current to direct current (DC-DC) converter. A control circuit includes a first transistor having a source/drain terminal coupled to an output voltage of the DC-DC converter configured to provide current based on the output voltage. The control circuit also includes a digital up/down counter having an output terminal electrically coupled to an input terminal of a delay cell of the DC-DC converter. A current sensing circuit of the control circuit is electrically coupled to an input terminal of the digital up/down counter configured to receive the current and drive the digital up/down counter based on the current.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: May 4, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chia-Chun Chang, Alan Roth, Eric Soenen, Tysh-Bin Liu
  • Publication number: 20210104360
    Abstract: An integrated circuit includes a first and a second conductive path over a substrate, a coil structure over the substrate, a voltage sensing circuit electrically coupled with the coil structure, and a ferromagnetic structure including an open portion. The first conductive path is configured to carry a first time-varying current and to generate a first time-varying magnetic field. The second conductive path is configured to carry a second time-varying current and to generate a second time-varying magnetic field. The first conductive path and the second conductive path extend through the open portion of the ferromagnetic structure. The first conductive path includes a first conductive line below the ferromagnetic structure, a second conductive line above the ferromagnetic structure, and a first via plug coplanar with the ferromagnetic structure, the first via plug electrically coupling the first conductive line and the second conductive line.
    Type: Application
    Filed: December 17, 2020
    Publication date: April 8, 2021
    Inventors: Alan ROTH, Eric SOENEN
  • Publication number: 20210013179
    Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 14, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nick Samra, Alan Roth, Eric Soenen, Stefan Rusu, Paul Ranucci
  • Publication number: 20200412251
    Abstract: A DC-DC converter and a DC-DC converter operation method are provided. The DC-DC converter includes a power stage, an error amplifier, a pulse width modulation (PWM) generator, and a gate controller. The power stage includes a first transistor and a second transistor. The power stage is configured to generate an output at a first node. The error amplifier is configured to receive the output from the first node and generates an error signal. The PWM generator is configured to receive the error signal from the error amplifier and generates a pulse width modulation signal. The gate controller includes a plurality of voltage dividers and a comparator. The voltage dividers are configured to perform a voltage division on the first node and a second node to generate a first voltage and a second voltage. The first node is an output node of the DC-DC converter and the second node is a node between the first transistor and the second transistor of the DC-DC converter.
    Type: Application
    Filed: March 2, 2020
    Publication date: December 31, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Chun Chang, Alan Roth, Eric Soenen, Ying-Chih Hsu
  • Patent number: 10878997
    Abstract: An integrated circuit includes a substrate, a first conductive path over the substrate, a coil structure over the substrate, and a voltage sensing circuit electrically coupled with the coil structure. The first conductive path is configured to carry a first time-varying current and to generate a first time-varying magnetic field based on the first time-varying current. The coil structure is magnetically coupled with the first conductive path through the first time-varying magnetic field and is configured to generate an induced electrical potential responsive to the first time-varying magnetic field. The voltage sensing circuit is configured to measure a voltage level of the induced electrical potential.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Alan Roth, Eric Soenen
  • Patent number: 10825797
    Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: November 3, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nick Samra, Alan Roth, Eric Soenen, Stefan Rusu, Paul Ranucci
  • Publication number: 20200176349
    Abstract: A method of transferring heat in a package includes conducting heat from a first device to a second device by a low thermal resistance substrate path in a chip layer of the package, conducting heat from an integrated circuit (IC) to a first package layer of the package, conducting heat from the first package layer of the package to at least a first set of through-vias positioned in the chip layer, and conducting heat from the first set of through-vias to a surface of a second package layer opposite the chip layer. The first device and the second device is part of the IC chip. The first package layer is adjacent to the chip layer.
    Type: Application
    Filed: February 7, 2020
    Publication date: June 4, 2020
    Inventors: Ying-Chih HSU, Alan ROTH, Chuei-Tang WANG, Chih-Yuan CHANG, Eric SOENEN, Chih-Lin CHEN
  • Patent number: 10636560
    Abstract: An integrated transformer is disclosed. The integrated transformer includes a magnetic core situated in a first layer from among multiple layers of a semiconductor layer stack, a first conductor and a second conductor from among multiple conductors, and a via. The first conductor is situated within a second layer, above the first layer, from among the multiple layers of the semiconductor layer stack. The second conductor is situated within a third layer, below the first layer, from among the multiple layers of the semiconductor layer stack. The via physically and electrically connects the first conductor and the second conductor. The via, the first conductor, and the second conductor form a primary winding of the integrated transformer. The integrated transformer additionally includes a secondary winding, wrapped around the magnetic core, situated in the first layer, the second layer, and the third layer.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: April 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Alan Roth, Eric Soenen
  • Patent number: 10559517
    Abstract: An integrated circuit (IC) package structure includes an electrical signal path, a low thermal resistance path and a substrate that includes a first device and a second device. The first device and the second device are part of an IC chip. The electrical signal path is from the first device to a top surface of the IC chip. The low thermal resistance path extends from the second device to the top surface of the IC chip. The low thermal resistance path is electrically isolated from the electrical signal path. The second device is thermally coupled to the first device by a low thermal resistance substrate path.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: February 11, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ying-Chih Hsu, Alan Roth, Chuei-Tang Wang, Chih-Yuan Chang, Eric Soenen, Chih-Lin Chen
  • Patent number: 10522509
    Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: December 31, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nick Samra, Alan Roth, Eric Soenen, Stefan Rusu, Paul Ranucci
  • Publication number: 20190385775
    Abstract: An inductor is formed in an IC device packaging structure. The structure includes an encapsulating material, with a ferromagnetic core in the encapsulation material. A plurality of metal layers are provided in the encapsulation material forming an inductor coil extending around the ferromagnetic core so as to form an inductor.
    Type: Application
    Filed: June 14, 2018
    Publication date: December 19, 2019
    Inventors: Alan Roth, Eric Soenen, Ying-Chih Hsu, Nick Samra, Stefan Rusu