Abstract: The present disclosure relates to voltage regulation techniques. In some embodiments, a voltage regulator is configured to regulate an output voltage based on a reference voltage. The voltage regulator comprises an analog-to-digital converter, an encoder, a decoder and a power stage. The analog-to-digital converter receives the reference voltage and an output voltage of the voltage regulator and provides a digital error signal. The encoder is coupled to the analog-to-digital converter output and configured to provide a multi-bit digital control signal based upon a present value of the digital error signal, a plurality of pre-determined coefficients, and a plurality of previous values of the digital error signal. The decoder is coupled to the encoder and configured to generate a plurality of control signals based on the multi-bit digital control signal. The power stage comprises a plurality of power cells which are coupled to a power supply and which receive the plurality of control signals, respectively.

Abstract: A converter includes a plurality of active circuitry elements over a substrate. The converter further includes a passivation structure over the plurality of active circuitry elements, the passivation structure having at least one opening that is configured to expose at least one electrical pad of each active circuitry element. The converter further includes a plurality of passive electrical components over the passivation structure, wherein each passive electrical component is selectively connectable with at least one other passive electrical component, and a first side of each passive electrical component is electrically coupled to an electrical pad of each of at least two active circuitry elements.

Abstract: A package system includes at least one active circuitry disposed over a substrate. A passivation structure is disposed over the at least one active circuitry. The passivation structure has at least one opening that is configured to expose at least one first electrical pad. At least one passive electrical component is disposed over the passivation structure. The at least one passive electrical component is electrically coupled with the at least one first electrical pad.

Abstract: A method for calibrating a temperature sensor comprises: receiving first and second reference voltages from respective first and second tap points within a string of sequentially connected resistive devices of the temperature sensor. Each resistive device has a resistance that varies as a function of temperature. The receiving is performed at two or more known temperatures. A respective code is output corresponding to each respective one of the two or more known temperatures, based on the first and second reference voltages. At least one of the tap points is adjusted, based on the two or more known temperatures and the respective output codes.

Abstract: A DC to DC converter includes a switching circuit and a controller. The switching circuit includes an inductor coupled to first and second voltage supply nodes and to a plurality of output loads. The controller is configured to monitor a current through the inductor and to selectively couple the inductor to each of the plurality of output loads such that at least one of the following criteria is met: 1) an average current through the inductor is minimized for the particular output loads coupled to the switching circuit, or 2) minimize a number of times the switching circuit is switched during a charging period for the particular output loads coupled to the switching circuit.

Abstract: One embodiment of the instant disclosure provides a compact lower power thermal sensor that comprises a combination current generator configured to selectively generate a PTAT and a CTAT current; a convertor configured to generate digital output corresponding to the current mirrored by the current-reuse charge pump; and a current-reuse charge pump coupled between the combination current generator and the convertor, configured to mirror the current generated by the combination current generator and selectively establish a charging/discharging path to/from the convertor. The combination current generator selectively generates the PTAT and the CTAT current in accordance with an output state of the convertor, and the current-reuse charge pump selectively charges and discharges a capacitor of the convertor with the PTAT and the CTAT current in accordance with the output state of the convertor.

Abstract: An integrated circuit includes a substrate, a first conductive path over the substrate, a coil structure over the substrate, and a voltage sensing circuit electrically coupled with the coil structure. The first conductive path is configured to carry a first time-varying current and to generate a first time-varying magnetic field based on the first time-varying current. The coil structure is magnetically coupled with the first conductive path through the first time-varying magnetic field and is configured to generate an induced electrical potential responsive to the first time-varying magnetic field. The voltage sensing circuit is configured to measure a voltage level of the induced electrical potential.

Abstract: A charge pump circuit includes a sub-circuit, which is a pumping stage circuit or an output stage circuit. The sub-circuit includes an input terminal, an output terminal, a transistor, a first capacitive device, a first diode device, and a second diode device. The transistor has a first source/drain (S/D) terminal coupled with the input terminal, a second S/D terminal coupled with the output terminal, and a gate terminal. The first capacitive device has a first end coupled with the gate terminal of the transistor and a second end configured to receive a first driving signal. The first diode device has a cathode coupled with the second S/D terminal of the transistor and an anode coupled with the gate terminal of the transistor. The second diode device has a cathode coupled with the gate terminal of the transistor and an anode coupled with the second S/D terminal of the transistor.

Abstract: A circuit comprises a first circuit and a second circuit. The first circuit is configured to operate at a first-circuit supply voltage value, and to generate a first reference voltage value based on a voltage rated for transistors in a second circuit. The second circuit is configured to operate at a second-circuit supply voltage value, to receive a first signal and the first reference voltage value, and to clamp an input node of the second circuit based on the first reference voltage value. The second-circuit supply voltage value is less than the first-circuit supply voltage value. The first signal is configured to swing between a low voltage value and a voltage value higher than the second-circuit supply voltage value.

Abstract: A self-adjusting regulator includes a power stage adjusting an output voltage and a control loop for controlling the power stage. The control loop includes a compensator adjusting a bandwidth in response to at least one compensator control signal, and an oscillator controlling a switching speed in response to at least one oscillator control signal. The self-adjusting regulator further includes a voltage sensing control circuit controlling the control loop. The voltage sensing control circuit generating the at least one compensator control signal and the at least one oscillator control signal based on a comparison of the output voltage and a reference voltage. In a low speed mode, the compensator outputs a first bandwidth, and the oscillator outputs a first switching speed. In a high speed mode, the compensator outputs a second bandwidth greater than the first bandwidth, and the oscillator outputs a second switching speed faster than the first switching speed.

Abstract: A circuit includes an analog-to-digital converter (ADC). The ADC is configured to receive an analog feedback signal and an analog input signal and generate a digital output. The circuit further includes a digital filter configured to filter the digital output and a noise shaper. The noise shaper is configured to truncate the filtered digital output and generate a noise shaper output, and to shape quantization noise generated during truncation. The circuit further includes a pulse width modulation digital-to-analog converter (PWM DAC) configured to process the truncated digital output of the noise shaper output and generate a PWM DAC output.

Abstract: An integrated circuit for converting a high voltage level to a low voltage level comprises a high side driver, a low side driver electrically coupled with the high side driver, a circuit electrically coupled with the high side driver and a first node between the high side driver and the low side driver, and a false signal filter electrically coupled with the circuit. The circuit is configured to substantially turn off the high side driver if the high side driver leaves a cutoff region of the high side driver during a tri-state mode. The false signal filter is configured to screen signals that are outside of the tri-state mode.

Abstract: At least one of a system or a method for wirelessly charging a device is provided. A wireless receiver is configured to communicate with a device to be charged to determine a desired charge scenario indicative of power to be supplied to the device. Based upon the desired charge scenario, a resonant frequency of the wireless receiver is set. The resonant frequency, in combination with energy transferred from a wireless transmitter, is configured to induce a current in the wireless receiver. Power is supplied to the device based upon the current induced in the wireless receiver.

Abstract: An apparatus for controlling slew rate is coupled to two adjustable voltage rails. The output of the apparatus is coupled to the gate of a switching element. By employing two adjustable voltage rails, the slew rate of the switching element is proportional to the voltage difference between the first adjustable rail and the second adjustable rail. The slew rate control apparatus can be applied to a variety of switching elements including N channel Field Effect Transistors (NFETs), P channel Field Effect Transistors (PFETs), current mode logic circuits and level shifter circuits.

Abstract: A power converter includes a first load terminal used to supply a current to a load and a second load terminal used to return a feedback voltage based on the current. A calibration circuit supplies a calibrated voltage processed from the feedback voltage, and a hysteretic comparator controls a current level of the current based on a difference between the feedback voltage and the calibrated voltage.

Abstract: A regulator circuit includes a regulator output node, at least (N+1) regulator control circuits, and N drivers. N is an integer greater than 1. Each one of the N drivers includes a multiplexer, a driver stage, and a pre-driver stage. The multiplexer includes an input port and an output port, where the input port of the multiplexer is coupled with output nodes of the at least (N+1) regulator control circuits. The driver stage is coupled with the regulator output node. The pre-driver stage is configured to control the driver stage based on a signal on the output port of the multiplexer.

Abstract: A single inductor multiple output (SIMO) DC-DC convertor is provided. The SIMO DC-DC convertor is configured to establish a first DC voltage at a first node and establish a second DC voltage at a second node. A first switch of the SIMO DC-DC convertor is activated when a voltage at the first node is below the first DC voltage. A second switch of the SIMO DC-DC convertor is activated when a voltage at the second node is below the second DC voltage. The first switch is deactivated when the voltage at the first node is not below the first DC voltage. The second switch is deactivated when the voltage at the second node is not below the second DC voltage. The first switch and the second switch, and other switches in the SIMO DC-DC converter, are activated in any order and independently of one another to establish desired node voltages.

Abstract: A hysteretic power converter includes a comparator, a calibration circuit, and an output node having an output voltage. The calibration circuit is configured to supply a calibrated voltage to the comparator. The comparator controls the output voltage based on the calibrated voltage and a feedback voltage representing at least a portion of the output voltage.

Abstract: A thermal sensor comprises a converter circuit, a counting circuit, and a ratio calculator. The converter circuit is configured to convert a temperature-independent signal into a first frequency signal, and to convert a temperature-dependent signal into a second frequency signal. The counting circuit is configured to receive at least one of the first frequency signal and the second frequency signal, to count a predetermined number of pulses of the first frequency signal, and to count a number of pulses of the second frequency signal for a time period corresponding to the counting of the predetermined number of pulses of the first frequency signal. The ratio calculator is configured to calculate a ratio based on the predetermined number of pulses of the first frequency signal and the counted number of pulses of the second frequency signal.

Abstract: A circuit includes an analog-to-digital converter (ADC). The ADC is configured to receive an analog feedback signal and an analog input signal and generate a digital output. The circuit further includes a digital filter configured to filter the digital output and a noise shaper. The noise shaper is configured to truncate the filtered digital output and generate a noise shaper output, and to shape quantization noise generated during truncation. The circuit further includes a pulse width modulation digital-to-analog converter (PWM DAC) configured to process the truncated digital output of the noise shaper output and generate a PWM DAC output.