Abstract: A power converter includes a transformer having a primary-side winding connected to a switch, and a controller connected to a gate node of the switch. The controller includes a switch timing and control module to generate switch control pulses, a gate driver to receive the switch control pulses and generate gate control pulses therefrom to control the switch, and a gate drive controller to provide a switch transition speed control signal to the gate driver to control a switch transition speed of the switch for each pulse of the gate control pulses. Based on an operating mode of the power converter, the gate drive controller is configured to set the switch transition speed of the gate driver to a first speed for generating an initial gate control pulse and to set the switch transition speed of the gate driver to a second speed for generating subsequent gate control pulses.

Abstract: A power converter includes an AC/DC converter to generate a DC output voltage based on an AC input voltage. A multi-port DC output circuit receives the DC output voltage and provides respective DC output voltages to a first DC output port and a second DC output port. The multi-port DC output circuit includes a first intermediate rail voltage switch, a second intermediate rail voltage switch, and multiple bus switches, a body diode of the first intermediate rail voltage switch being forward biased with respect to the first secondary side output voltage, and a body diode of the second intermediate rail voltage switch being reverse biased with respect to the first secondary side output voltage. The bus switches control a routing of a first intermediate rail voltage and a second intermediate rail voltage of the multi-port DC output circuit to the first DC output port and the second DC output port.

Abstract: A power converter includes a transformer, a main switch, an active clamp switch, and a primary side controller circuit. The primary side controller circuit is configured to indirectly measure a magnetizing current through the transformer during a first switching cycle of the power converter and estimate a zero-crossing point of the magnetizing current for a second switching cycle based on the indirect primary side measurement of the magnetizing current. Based on the estimated zero-crossing point, the primary side controller circuit generates an auto-tuned delay, for the second switching cycle, between disabling the main switch and enabling the active clamp switch before the zero-crossing of the magnetizing current occurs. The active clamp switch is enabled during the second switching cycle in accordance with the auto-tuned delay.

Abstract: A power converter controller includes an analog to digital converter (ADC) to generate a digital representation of a feedback signal of a power converter, the feedback signal being received from a compensator of the power converter and being based on an output voltage of the power converter. A nonlinear gain block of the power converter controller receives the digital representation of the feedback signal and generates a transformed digital representation of the feedback signal using a nonlinear function. A switch control block of the power converter controller controls an on-time of a primary-side switch of the power converter based on the transformed digital representation of the feedback signal.

Abstract: A dual path and mode start-up circuit includes a high-voltage start-up circuit, an auxiliary start-up circuit, a capacitor, and a sensing circuit. The high-voltage start-up circuit has high-voltage input and output voltage nodes and is configurable to be operated in a first or second mode of operation. The auxiliary start-up circuit has auxiliary input and output voltage nodes. The auxiliary output voltage node, the high-voltage output voltage node, and the capacitor are in signal communication. The sensing circuit is configured to sense a voltage level at the capacitor and to configure the high-voltage start-up circuit to operate in the first mode of operation if the voltage level at the capacitor is less than a first threshold voltage level, and configure the high-voltage start-up circuit to operate in the second mode of operation if the voltage level at the capacitor is greater than a second threshold voltage level.

Abstract: The anti-windup circuit generally has a voltage clamping device in series with a current limiting device operatively connectable to the output current path of a feedback compensator; the feedback compensator being part of a switch-mode power supply (SMPS) having an input voltage source and a load and generating constrained control values required to generate control on-off actions for tight power regulation. The inclusion of the disclosed anti-windup circuit in an SMPS may lead to hardware based overvoltage protection, reduced overall size and faster response to load changes.

Abstract: A method involves determining that a power converter is in a discontinuous, no-load, or ultra-light load mode of operation. In response, a voltage amplitude of a feedback signal of the power converter rises towards a voltage amplitude that is greater than or equal to a first threshold voltage level. Upon determining that the voltage amplitude of the feedback signal is greater than or equal to the first threshold voltage level, a first enabling pulse is issued to a primary side switch of the power converter to reduce a voltage amplitude of the feedback signal. Upon determining that the voltage amplitude of the feedback signal is greater than or equal to a second threshold voltage level, a normal mode of operation of the power converter is entered.

Abstract: A quasi-resonant auto-tuning controller includes a zero-voltage crossing detection circuit and a valley tuning finite-state machine having a look-up table. The zero-voltage crossing detection circuit receives a reference voltage and receives an auxiliary signal from an auxiliary winding. The zero-voltage crossing detection circuit produces a comparison signal having pulses when the auxiliary signal is less than the reference voltage. The valley tuning finite-state machine produces a divided pulse width based on the comparison signal, stores the divided pulse width of each pulse in the look-up table, determines, from the comparison signal, that the auxiliary signal is less than the reference voltage, waits a time period corresponding to the divided pulse width stored in the look-up table if the auxiliary signal is less than the reference voltage, and produces a valley point signal after waiting the time period.

Abstract: A switched-mode power controller includes a primary side controller circuit configured in a startup mode of operation to generate a fixed switching frequency pulse width modulation (PWM) signal with incrementing duty-ratio value. The PWM signal drives a main-switch that charges an inductive device with stored energy and discharges the stored energy into a capacitor on a secondary side to generate a power controller output voltage. Based on a comparison of the power controller output voltage with a reference voltage, the primary side controller circuit is configured to stop the incrementing of the duty-ratio of the PWM signal and begin a quasi-resonant mode of operation during which the primary side controller circuit reduces a number of valleys detected in one or more off-times of the main-switch in one or more respective main-switch switching periods.

Abstract: A power converter includes a transformer having a primary-side winding connected to a switch, and a controller connected to a gate node of the switch. The controller includes a switch timing and control module to generate switch control pulses, a gate driver to receive the switch control pulses and generate gate control pulses therefrom to control the switch, and a gate drive controller to provide a switch transition speed control signal to the gate driver to control a switch transition speed of the switch for each pulse of the gate control pulses. Based on an operating mode of the power converter, the gate drive controller is configured to set the switch transition speed of the gate driver to a first speed for generating an initial gate control pulse and to set the switch transition speed of the gate driver to a second speed for generating subsequent gate control pulses.

Abstract: A power converter includes a transformer having a primary-side winding connected to a switch, and a controller connected to a gate node of the switch. The controller includes a switch timing and control module to generate switch control pulses, a gate driver to receive the switch control pulses and generate gate control pulses therefrom to control the switch, and a gate drive controller to provide a switch transition speed control signal to the gate driver to control a switch transition speed of the switch for each pulse of the gate control pulses. Based on an operating mode of the power converter, the gate drive controller is configured to set the switch transition speed of the gate driver to a first speed for generating an initial gate control pulse and to set the switch transition speed of the gate driver to a second speed for generating subsequent gate control pulses.

Abstract: A method involves determining that a power converter is in a discontinuous, no-load, or ultra-light load mode of operation. In response, a voltage amplitude of a feedback signal of the power converter rises towards a voltage amplitude that is greater than or equal to a first threshold voltage level. Upon determining that the voltage amplitude of the feedback signal is greater than or equal to the first threshold voltage level, a first enabling pulse is issued to a primary side switch of the power converter to reduce a voltage amplitude of the feedback signal. Upon determining that the voltage amplitude of the feedback signal is greater than or equal to a second threshold voltage level, a normal mode of operation of the power converter is entered.

Abstract: A power converter controller includes an analog to digital converter (ADC) to generate a digital representation of a feedback signal of a power converter, the feedback signal being received from a compensator of the power converter and being based on an output voltage of the power converter. A nonlinear gain block of the power converter controller receives the digital representation of the feedback signal and generates a transformed digital representation of the feedback signal using a nonlinear function. A switch control block of the power converter controller controls an on-time of a primary-side switch of the power converter based on the transformed digital representation of the feedback signal.

Abstract: A power converter includes a transformer having a primary-side winding connected to a switch, and a controller connected to a gate node of the switch. The controller includes a switch timing and control module to generate switch control pulses, a gate driver to receive the switch control pulses and generate gate control pulses therefrom to control the switch, and a gate drive controller to provide a switch transition speed control signal to the gate driver to control a switch transition speed of the switch for each pulse of the gate control pulses. Based on an operating mode of the power converter, the gate drive controller is configured to set the switch transition speed of the gate driver to a first speed for generating an initial gate control pulse and to set the switch transition speed of the gate driver to a second speed for generating subsequent gate control pulses.

Abstract: A method involves determining that a power converter is in a no-load or ultra-light load mode of operation. In response to determining that the power converter is in a no-load or ultra-light load mode of operation, a voltage amplitude of a feedback signal of the power converter is allowed to rise towards a voltage amplitude that is greater than or equal to a first threshold voltage level. Upon determining that the voltage amplitude of the feedback signal is greater than or equal to the first threshold voltage level, a first sequence of enabling pulses are issued to a primary side switch of the power converter to reduce a voltage amplitude of the feedback signal. Upon determining that the voltage amplitude of the feedback signal is greater than or equal to a second threshold voltage level, a normal mode of operation of the power converter is entered.

Abstract: The anti-windup circuit generally has a voltage clamping device in series with a current limiting device operatively connectable to the output current path of a feedback compensator; the feedback compensator being part of a switch-mode power supply (SMPS) having an input voltage source and a load and generating constrained control values required to generate control on-off actions for tight power regulation. The inclusion of the disclosed anti-windup circuit in an SMPS may lead to hardware based overvoltage protection, reduced overall size and faster response to load changes.

Abstract: A quasi-resonant auto-tuning controller includes a zero-voltage crossing detection circuit and a valley tuning finite-state machine having a look-up table. The zero-voltage crossing detection circuit receives a reference voltage and receives an auxiliary signal from an auxiliary winding. The zero-voltage crossing detection circuit produces a comparison signal having pulses when the auxiliary signal is less than the reference voltage. The valley tuning finite-state machine produces a divided pulse width based on the comparison signal, stores the divided pulse width of each pulse in the look-up table, determines, from the comparison signal, that the auxiliary signal is less than the reference voltage, waits a time period corresponding to the divided pulse width stored in the look-up table if the auxiliary signal is less than the reference voltage, and produces a valley point signal after waiting the time period.

Abstract: A power converter controller includes an analog to digital converter (ADC) to generate a digital representation of a feedback signal of a power converter, the feedback signal being received from a compensator of the power converter and being based on an output voltage of the power converter. A nonlinear gain block of the power converter controller receives the digital representation of the feedback signal and generates a transformed digital representation of the feedback signal using a nonlinear function. A switch control block of the power converter controller controls an on-time of a primary-side switch of the power converter based on the transformed digital representation of the feedback signal.

Abstract: A method involves receiving, at an active clamp controller circuit, an active clamp switch current that passes through an active clamp switch. The active clamp switch is enabled using the active clamp controller circuit in response to determining, based on the active clamp switch current, body-diode conduction of the active clamp switch. The active clamp switch is disabled using the active clamp controller circuit in response to determining, based on the active clamp switch current, a first zero-crossing of the active clamp switch current and a second zero-crossing of the active clamp switch current.

Abstract: An apparatus includes a high-pass filter circuit configured to receive a drain-source voltage from a drain node of a synchronous rectifier switch at a secondary-side of a power converter and to generate a filtered drain-source voltage using the received drain-source voltage. A current comparison circuit of the apparatus is configured to receive a current indicative of a current through the synchronous rectifier switch and to generate a current comparison signal using the received current. An auto-tuning controller of the apparatus is configured to turn the synchronous rectifier switch on upon determining a body diode conduction of the synchronous rectifier switch, commence an auto-tuned delay upon determining that the current through the synchronous rectifier switch has changed direction, turn the synchronous rectifier switch off upon expiration of the auto-tuned delay, and update, during a detection window of time, a duration of the auto-tuned delay based on the filtered drain-source voltage.