Abstract: A power adapter for supplying electrical power to a device includes a processor, an interface for power transfer with the device, a multi-winding feedback converter to receive an AC power input and to convert the AC power input to a DC power output over the interface for the device, and a power conversion control circuit. A voltage level of the DC power output is set based on a reference voltage produced by the processor. The power conversion control circuit receives the reference voltage and a control signal based on the voltage level of the DC power output to generate switch control signals to control switches of the multi-winding feedback converter to control the voltage level of the DC power output. The processor recognizes a load associated with the device and sets, using the reference voltage, the DC power output based on the recognized load.

Abstract: A method involves controlling, for a duration of a first modulation period, a first average off-time of a main switch of a power converter such that the first average off-time of the main switch corresponds to a first intermediate valley number of multiple intermediate valley numbers, an average of the intermediate valley numbers corresponding to a target number of valleys of a resonant waveform at a drain node of the main switch. A second intermediate valley number of the intermediate valley numbers is selected upon expiration of the first modulation period. A difference of the second intermediate valley number and the first intermediate valley number is equal to a fractional valley number offset. A second average off-time of the main switch is controlled for a duration of a second modulation period such that the second average off-time of the main switch corresponds to the second intermediate valley number.

Abstract: An active clamp circuit includes an active clamp capacitor coupled in series with an active clamp switch and an active clamp controller circuit to receive an active clamp switch current that passes through the active clamp switch and to control the active clamp switch based on the received active clamp switch current. The active clamp controller circuit is configured to enable the active clamp switch based on a first amplitude comparison, the first amplitude comparison being based on the active clamp switch current. The active clamp controller circuit is configured to disable the active clamp switch based on a second amplitude comparison and a third amplitude comparison, the second amplitude comparison and the third amplitude comparison being based on the active clamp switch current.

Abstract: An active clamp circuit includes an active clamp switch having a drain node and a source node, an active clamp capacitor coupled in a series combination with the active clamp switch, a delay circuit, and an active clamp controller circuit coupled to the active clamp switch and to the delay circuit. The active clamp controller circuit is configured to i) receive an active clamp switch voltage based on a voltage developed across the drain node and the source node of the active clamp switch, ii) enable the active clamp switch based on a voltage amplitude of the active clamp switch voltage, and iii) disable the active clamp switch based on a delay signal generated by the delay circuit.

Abstract: A flyback converter includes a primary-side circuit to receive an input voltage, a secondary-side circuit to generate an output voltage, a transformer coupling the primary-side circuit to the secondary-side circuit, a main switch coupled to a primary winding of the transformer, and a converter controller having a primary-side controller in signal communication with the main switch to control an on time and an off time of the main switch and to detect one or more valleys of a resonant waveform developed at the main switch during the off time of the main switch. The primary-side controller is configured to operate in a valley reduction mode of operation upon determining that the output voltage is less than a reference voltage minus a predetermined threshold value. The valley reduction mode of operation includes decrementing, for each switching cycle of the main switch, a number of valleys occurring during that switching cycle.

Abstract: A method involves determining a target number of valleys of a resonant waveform at a drain node of a main switch of a power converter. The target number of valleys corresponds to a desired off-time of the main switch. A first intermediate valley number of a series of intermediate valley numbers is selected. An average of the series of intermediate valley numbers corresponds to the target number of valleys. A first average off-time of the main switch is controlled, for a duration of a first modulation period, such that the first average off-time corresponds to the first intermediate valley number. Upon expiration of the first modulation period, a second intermediate valley number of the intermediate valley numbers is selected. A second average off-time of the main switch is controlled, for a duration of a second modulation period, such that the second average off-time corresponds to the second intermediate valley number.

Abstract: A power converter controller includes an analog to digital converter (ADC) to generate a digital representation of a feedback signal of a power converter, the feedback signal being received from a compensator of the power converter and being based on an output voltage of the power converter. A nonlinear gain block of the power converter controller receives the digital representation of the feedback signal and generates a transformed digital representation of the feedback signal using a nonlinear function. A switch control block of the power converter controller controls an on-time of a primary-side switch of the power converter based on the transformed digital representation of the feedback signal.

Abstract: The anti-windup circuit generally has a voltage clamping device in series with a current limiting device operatively connectable to the output current path of a feedback compensator; the feedback compensator being part of a switch-mode power supply (SMPS) having an input voltage source and a load and generating constrained control values required to generate control on-off actions for tight power regulation. The inclusion of the disclosed anti-windup circuit in an SMPS may lead to hardware based overvoltage protection, reduced overall size and faster response to load changes.

Abstract: A power converter controller includes a fractional valley controller configured to determine a target number of valleys of a resonant waveform at a drain node of a main switch, the target number of valleys corresponding to a desired off-time of the main switch, the fractional valley controller modulating an off-time of the main switch between two or more modulated off-times. The target number of valleys corresponds to a non-integer number of valleys of the resonant waveform at the drain node of the main switch. Each of the modulated off-times of the main switch corresponds to an integer number of valleys, and the two or more modulated off-times of the main switch has an average value that corresponds to the desired off-time.

Abstract: A single-mode quasi constant frequency controller apparatus for controlling output voltage deviation during one or more load transients, the controller apparatus comprising: a converter receiving one or more operational control parameters; a load tracking modulator configured to receive sensory inputs representative of a capacitor current polarity, and to control one or more power transistors of the converter such that an inductor current matches a load current cycle and reconstructs a desired inductor current ripple by splitting both an on-time for inductor charging and an off-time for inductor discharging into a current correction phase (CCP) and a ripple reconstruction phase (RRP), the load tracking modulator communicating the one or more operational control parameters for controlling the one or more power transistors.

Abstract: The flyback converter generally has a capacitive divider operatively connectable to a voltage source for receiving an input voltage, the capacitive divider having a plurality of capacitive devices connected in series from one another; a transformer having a plurality of primary windings inductively coupled to at least one secondary winding, each one of the primary windings of the transformer being connected in parallel to a corresponding one of the capacitive devices of the capacitive divider via a switching device, each of the at least one secondary winding being connected to a forwardly biased and capacitive circuit connectable to an output load; and a controller connected to each one of the switching devices for operating the flyback converter to power the output load with the voltage source.

Abstract: The anti-windup circuit generally has a voltage clamping device in series with a current limiting device operatively connectable to the output current path of a feedback compensator; the feedback compensator being part of a switch-mode power supply (SMPS) having an input voltage source and a load and generating constrained control values required to generate control on-off actions for tight power regulation. The inclusion of the disclosed anti-windup circuit in an SMPS may lead to hardware based overvoltage protection, reduced overall size and faster response to load changes.

Abstract: A quasi-resonant auto-tuning controller includes a zero-voltage crossing detection circuit and a valley tuning finite-state machine having a look-up table. The zero-voltage crossing detection circuit receives a reference voltage and receives an auxiliary signal from an auxiliary winding. The zero-voltage crossing detection circuit produces a comparison signal having pulses when the auxiliary signal is less than the reference voltage. The valley tuning finite-state machine produces a divided pulse width based on the comparison signal, stores the divided pulse width of each pulse in the look-up table, determines, from the comparison signal, that the auxiliary signal is less than the reference voltage, waits a time period corresponding to the divided pulse width stored in the look-up table if the auxiliary signal is less than the reference voltage, and produces a valley point signal after waiting the time period.

Abstract: An apparatus for controlling a power converter includes an analog-to-digital converter to generate a digital representation of a voltage sense signal indicative of an input voltage of the power converter. The apparatus includes a first comparison circuit to generate a first comparison signal using a current sense signal indicative of a current through a primary-side switch of the power converter. The apparatus includes a gate driver to provide a gate drive signal to the primary-side switch based on a control signal, and a digital controller. The digital controller is configured to produce a time scalar value using the digital representation of the voltage sense signal, produce a timing signal using the control signal and the first comparison signal, scale the timing signal using the time scalar value, and adjust a timing of the control signal to limit a peak current through the primary-side switch based on the scaled timing signal.

Abstract: A dual path and mode start-up circuit includes a high-voltage start-up circuit, an auxiliary start-up circuit, a capacitor, and a sensing circuit. The high-voltage start-up circuit has high-voltage input and output voltage nodes and is configurable to be operated in a first or second mode of operation. The auxiliary start-up circuit has auxiliary input and output voltage nodes. The auxiliary output voltage node, the high-voltage output voltage node, and the capacitor arc in signal communication. The sensing circuit is configured to sense a voltage level at the capacitor and to configure the high-voltage start-up circuit to operate in the first mode of operation if the voltage level at the capacitor is less than a first threshold voltage level, and configure the high-voltage start-up circuit to operate in the second mode of operation if the voltage level at the capacitor is greater than a second threshold voltage level.

Abstract: A power converter controller includes a fractional valley controller configured to determine a target number of valleys of a resonant waveform at a drain node of a main switch, the target number of valleys corresponding to a desired off-time of the main switch, the fractional valley controller modulating an off-time of the main switch between two or more modulated off-times. The target number of valleys corresponds to a non-integer number of valleys of the resonant waveform at the drain node of the main switch. Each of the modulated off-times of the main switch corresponds to an integer number of valleys, and the two or more modulated off-times of the main switch has an average value that corresponds to the desired off-time.

Abstract: A power converter includes an input side to receive an input voltage, and an output side to provide an output voltage, a main switch, a controller, a transformer having a primary winding that couples the main switch to the input side, an active clamp switch coupled to the input side by an active clamp capacitor, and an active clamp controller circuit. The active clamp controller circuit includes a sampling circuit to generate a sampled main switch voltage, a delay circuit to generate a delayed sampled main switch voltage, a voltage comparison circuit, and an active clamp switch controller circuit configured to i) enable the active clamp switch based on a first comparison between the sampled main switch voltage and the delayed sampled main switch voltage, and ii) disable the active clamp switch based on a second comparison between the sampled main switch voltage and the delayed sampled main switch voltage.

Abstract: A flyback converter includes a primary side circuit to receive an input voltage signal, a secondary side circuit to generate an output voltage signal using the input voltage signal, a synchronous rectifier switch, and a synchronous rectifier controller. The synchronous rectifier controller receives an attenuated drain-source voltage signal of the synchronous rectifier switch and the output voltage signal. The synchronous rectifier controller includes a threshold voltage generator to generate a first voltage signal using the output voltage signal, a first comparator to compare the attenuated drain-source voltage signal to the first voltage signal and, in response, generate a first comparison signal, and a second comparator to compare the attenuated drain-source voltage signal to a second voltage signal and, in response, generate a second comparison signal.

Abstract: A power converter includes an input side to receive an input voltage, and an output side to provide an output voltage, a main switch, a controller, a transformer having a primary winding that couples the main switch to the input side, an active clamp switch coupled to the input side by an active clamp capacitor, and an active clamp controller circuit. The active clamp controller circuit includes a sampling circuit to generate a sampled main switch voltage, a delay circuit to generate a delayed sampled main switch voltage, a voltage comparison circuit, and an active clamp switch controller circuit configured to i) enable the active clamp switch based on a first comparison between the sampled main switch voltage and the delayed sampled main switch voltage, and ii) disable the active clamp switch based on a second comparison between the sampled main switch voltage and the delayed sampled main switch voltage.

Abstract: The combined voltage regulator and snubber circuit generally has a voltage regulator device in parallel with the energy storage element of the snubber circuit operatively connectable in series with a leakage inductance current path; the leakage inductance being part of a magnetic component utilized in a switch-mode power supply having an input voltage source, controllable semiconductor switches, freewheeling semiconductor switches, feedback controller, reactive energy storage components and a load; the voltage regulator generally providing constant or variable voltage to the gate driver of the controllable semiconductor and/or feedback controller; the snubber circuit generally recycling leakage inductance energy to the input capacitor of a neighboring cell in a multi-cell stacked converter.