Abstract: A coupling element connectable to a string of one or more pipes, for example, a drill string of one or more pipes or drill pipes is provided. The coupling element is configured to excite, responsive to a data signal fed to the coupling element, an electromagnetic wave in the string. The coupling element comprises a feed portion at a first end of the coupling element, the feed portion to receive the data signal, a first electrically conductive portion extending from the feed portion towards a second end of the coupling element, the second end to be connected to the string for forming an electrically conductive connection between the first electrically conductive portion and the string, and a second electrically conductive portion extending from the feed portion towards the second end of the coupling element. The first and second electrically conductive portions are arranged so as to define a waveguide. The waveguide expands in a direction from the first end towards the second end.

Abstract: A method of manufacturing a bonded substrate stack includes: providing a first substrate having a first hybrid interface layer, the first hybrid interface layer including a first insulator and a first metal; and providing a second substrate having a second hybrid interface layer, the second hybrid interface layer including a second insulator and a second metal. The hybrid interface layers are surface-activated to generate dangling bonds on the hybrid interface layers. The surface-activated hybrid interface layers are brought into contact, such that the dangling bonds of the first hybrid interface layer and the dangling bonds of the second hybrid interface layer bond together to form first insulator to second insulator bonds and first metal to second metal bonds.

Abstract: A stacked multi-junction solar cell with a front side contacted through the rear side and having a solar cell stack having a Ge substrate layer, a Ge subcell, and at least two III-V subcells, with a through contact opening, a front terminal contact, a rear terminal contact, an antireflection layer formed on a part of the front side of the multi-junction solar cell, a dielectric insulating layer, and a contact layer. The dielectric insulating layer covers the antireflection layer, an edge region of a top of the front terminal contact, a lateral surface of the through contact opening, and a region of the rear side of the solar cell stack adjacent to the through contact opening. The contact layer from a region of the top of the front terminal contact that is not covered by the dielectric insulating layer through the through contact opening to the rear side.

Abstract: A method for structuring an insulating layer on a semiconductor wafer includes providing a semiconductor wafer with a top, a bottom and includes multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which include the passage opening, and into the passage opening.

Abstract: A stacked multi-junction solar cell with a front side contacted through the rear side and having a solar cell stack having a Ge substrate layer, a Ge subcell, and at least two III-V subcells, with a through contact opening, a front terminal contact, a rear terminal contact, an antireflection layer formed on a part of the front side of the multi-junction solar cell, a dielectric insulating layer, and a contact layer. The dielectric insulating layer covers the antireflection layer, an edge region of a top of the front terminal contact, a lateral surface of the through contact opening, and a region of the rear side of the solar cell stack adjacent to the through contact opening. The contact layer from a region of the top of the front terminal contact that is not covered by the dielectric insulating layer through the through contact opening to the rear side.

Abstract: A MEMS device comprises a first membrane structure having a reinforcement region formed from one piece of the first membrane structure, wherein the reinforcement region has a larger layer thickness than an adjoining region of the first membrane structure. The MEMS device includes an electrode structure, wherein the electrode structure is vertically spaced apart from the first membrane structure.

Abstract: A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.

Abstract: A method of manufacturing a bonded substrate stack includes: providing a first substrate having a first hybrid interface layer, the first hybrid interface layer including a first insulator and a first metal; and providing a second substrate having a second hybrid interface layer, the second hybrid interface layer including a second insulator and a second metal. The hybrid interface layers are surface-activated to generate dangling bonds on the hybrid interface layers. The surface-activated hybrid interface layers are brought into contact, such that the dangling bonds of the first hybrid interface layer and the dangling bonds of the second hybrid interface layer bond together to form first insulator to second insulator bonds and first metal to second metal bonds.

Abstract: A semiconductor body and a method for producing a semiconductor body are disclosed. In an embodiment a semiconductor body includes a p-conducting region, wherein the p-conducting region has at least one barrier zone and a contact zone, wherein the barrier zone has a first magnesium concentration and a first aluminum concentration, wherein the contact zone has a second magnesium concentration and a second aluminum concentration, wherein the first aluminum concentration is greater than the second aluminum concentration, wherein the first magnesium concentration is at least ten times less than the second magnesium concentration, wherein the contact zone forms an outwardly exposed surface of the semiconductor body, and wherein the barrier zone adjoins the contact zone, and wherein the semiconductor body is based on a nitride compound semiconductor material.

Abstract: Disclosed is a method for controlling an energy input device of an additive manufacturing device. A beam bundle deflection center is assigned to each of the number of beam bundles from which this beam bundle is directed onto the build plane. Each beam bundle deflection center is assigned a projection center corresponding to a perpendicular projection of the position of the beam bundle deflection center onto the build plane. The directions of the movement vectors of the number of beam bundles when scanning the trajectories are defined such that at each of the solidification points in this section the movement vector has an angle with respect to a connection vector from this solidification point to the projection center of the beam bundle used, which angle is smaller than a predetermined maximum angle ?1.

Abstract: A method of manufacturing a bonded substrate stack includes: providing a first substrate having a first hybrid interface layer, the first hybrid interface layer including a first insulator and a first metal; and providing a second substrate having a second hybrid interface layer, the second hybrid interface layer including a second insulator and a second metal. The hybrid interface layers are surface-activated by particle bombardment which is configured to remove atoms of the first hybrid interface layer and atoms of the second hybrid interface layer to generate dangling bonds on the hybrid interface layers. The surface-activated hybrid interface layers are brought into contact, such that the dangling bonds of the first hybrid interface layer and the dangling bonds of the second hybrid interface layer bond together to form first insulator to second insulator bonds and first metal to second metal bonds.

Abstract: A semiconductor body main include a III-V compound semiconductor material having a p-conductive region doped with a p-dopant. The p-conductive region may include at least one first section, one second section, and one third section. The second section may be arranged between the first and third sections. The second section may directly adjoin the first and third sections. An indium concentration of at least one of the sections differs from an indium concentration of the other two sections.

Abstract: A coupling element connectable to a string of one or more pipes, for example, a drill string of one or more pipes or drill pipes is provided. The coupling element is configured to excite, responsive to a data signal fed to the coupling element, an electromagnetic wave in the string. The coupling element comprises a feed portion at a first end of the coupling element, the feed portion to receive the data signal, a first electrically conductive portion extending from the feed portion towards a second end of the coupling element, the second end to be connected to the string for forming an electrically conductive connection between the first electrically conductive portion and the string, and a second electrically conductive portion extending from the feed portion towards the second end of the coupling element. The first and second electrically conductive portions are arranged so as to define a waveguide. The waveguide expands in a direction from the first end towards the second end.

Abstract: A method for structuring an insulating layer on a semiconductor wafer, at least comprising the steps of: Provision of a semiconductor wafer with a top, a bottom and comprising multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which comprises the passage opening, and into the passage opening.

Abstract: A dicing method for separating a wafer comprising a plurality of solar cells stack along at least one parting line, at least having the steps of: providing the wafer with a top, a bottom, an adhesive layer which is integrally bonded with the top and a cover glass layer which is integrally bonded with the adhesive layer, wherein the wafer includes a plurality of solar cell stacks, each having a germanium substrate layer forming the bottom of the wafer, a germanium sub-cell and at least two III-V sub-cells; creating a separating trench along the parting line by means of laser ablation, which extends from a bottom of the wafer through the wafer and the adhesive layer at least up to a top of the cover glass layer; and dividing the cover glass layer along the separating trench.

Abstract: An optoelectronic semiconductor component and a method for producing an optoelectronic semiconductor component are disclosed.

Abstract: A method of manufacturing a bonded substrate stack includes: providing a first substrate having a first hybrid interface layer, the first hybrid interface layer including a first insulator and a first metal; and providing a second substrate having a second hybrid interface layer, the second hybrid interface layer including a second insulator and a second metal. The hybrid interface layers are surface-activated by particle bombardment which is configured to remove atoms of the first hybrid interface layer and atoms of the second hybrid interface layer to generate dangling bonds on the hybrid interface layers. The surface-activated hybrid interface layers are brought into contact, such that the dangling bonds of the first hybrid interface layer and the dangling bonds of the second hybrid interface layer bond together to form first insulator to second insulator bonds and first metal to second metal bonds.

Abstract: A marking method for applying a unique identification to each individual solar cell stack of a semiconductor wafer, at least comprising the steps: Providing a semiconductor wafer having an upper side and an underside, which comprises a Ge substrate forming the underside; and generating an identification with a unique topography by means of laser ablation, using a first laser, on a surface area of the underside of each solar cell stack of the semiconductor wafer, the surface area being formed in each case by the Ge substrate or by an insulating layer covering the Ge substrate.

Abstract: A method of manufacturing a semiconductor device is described. The method includes providing a semiconductor substrate. The semiconductor substrate includes a high-doped semiconductor substrate layer, a high-doped semiconductor device layer, and a low-doped semiconductor etch stop layer arranged between the high-doped semiconductor substrate layer and the high-doped semiconductor device layer. The high-doped semiconductor substrate layer is removed, wherein the removing includes dopant selective chemical etching stopping at the low-doped semiconductor etch stop layer. Further, the low-doped semiconductor etch stop layer is thinned to generate an exposed surface of the high-doped semiconductor device layer.

Abstract: A method of producing light-emitting diode chips includes A) and C)-F) in order: A) providing a growth substrate, C) producing a structural layer, the structural layer including Alx1Ga1-x1-y1Iny1N, where-in y1?0.5, and a plurality of structural elements with a mean height of at least 50 nm so that a side of the structural layer facing away from the growth substrate is rough, D) producing a cover layer on the structural layer, the cover layer forming the structural layer true to shape and including Alx2Ga1-x2-y2Iny2N, wherein x2?0.6, E) producing a planarization layer on the cover layer, a side of the finished planarization layer is flat and the planarization layer includes Alx3Ga1-x3-y3Iny3N, wherein x3+y3?0.2, and F) growing a functional layer sequence that generates radiation on the planarization layer.