Patents by Inventor Alexander Frey
Alexander Frey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11081615Abstract: A protection method for through-holes of a semiconductor wafer having the steps: providing a semiconductor wafer, and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate forming a bottom side of the semiconductor wafer, a Ge subcell, and at least two III-V subcells in the order mentioned, as well as at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall and a circumference that is oval in cross section; applying a photoresist layer to a top side of the semiconductor wafer and to at least one region of the side wall of the through-hole, said region adjoining the top side, and applying an organic filler material by means of a printing process to a region of the top side, said region comprising the through-hole, and into the through-hole.Type: GrantFiled: August 31, 2020Date of Patent: August 3, 2021Assignee: AZUR SPACE Solar Power GmbHInventors: Alexander Frey, Benjamin Hagedorn
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Publication number: 20210159349Abstract: A stacked multi-junction solar cell with a front side contacted through the rear side and having a solar cell stack having a Ge substrate layer, a Ge subcell, and at least two III-V subcells, with a through contact opening, a front terminal contact, a rear terminal contact, an antireflection layer formed on a part of the front side of the multi-junction solar cell, a dielectric insulating layer, and a contact layer. The dielectric insulating layer covers the antireflection layer, an edge region of a top of the front terminal contact, a lateral surface of the through contact opening, and a region of the rear side of the solar cell stack adjacent to the through contact opening. The contact layer from a region of the top of the front terminal contact that is not covered by the dielectric insulating layer through the through contact opening to the rear side.Type: ApplicationFiled: November 23, 2020Publication date: May 27, 2021Applicant: AZUR SPACE Solar Power GmbHInventors: Wolfgang KOESTLER, Alexander FREY
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Publication number: 20210091267Abstract: A semiconductor body main include a III-V compound semiconductor material having a p-conductive region doped with a p-dopant. The p-conductive region may include at least one first section, one second section, and one third section. The second section may be arranged between the first and third sections. The second section may directly adjoin the first and third sections. An indium concentration of at least one of the sections differs from an indium concentration of the other two sections.Type: ApplicationFiled: June 14, 2018Publication date: March 25, 2021Inventors: Ingrid KOSLOW, Massimo DRAGO, Joachim HERTKORN, Alexander FREY
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Publication number: 20210066532Abstract: A protection method for through-holes of a semiconductor wafer having the steps: providing a semiconductor wafer, and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate forming a bottom side of the semiconductor wafer, a Ge subcell, and at least two III-V subcells in the order mentioned, as well as at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall and a circumference that is oval in cross section; applying a photoresist layer to a top side of the semiconductor wafer and to at least one region of the side wall of the through-hole, said region adjoining the top side, and applying an organic filler material by means of a printing process to a region of the top side, said region comprising the through-hole, and into the through-hole.Type: ApplicationFiled: August 31, 2020Publication date: March 4, 2021Applicant: AZUR SPACE Solar Power GmbHInventors: Alexander FREY, Benjamin HAGEDORN
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Publication number: 20210066515Abstract: A passivation method for a passage opening of a wafer, at least having the steps of: providing a wafer having a top, a bottom and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate that forms the bottom of the wafer, a Ge sub-cell, at least two III-V sub-cells, in the named order, and at least one passage opening extending from the top to the bottom of the wafer, with a contiguous side wall and a circumference that is oval in cross section, and applying a dielectric insulating layer by means of chemical vapor deposition to the top of the wafer, the bottom of the wafer and the side wall of the passage opening.Type: ApplicationFiled: August 31, 2020Publication date: March 4, 2021Applicant: AZUR SPACE Solar Power GmbHInventor: Alexander FREY
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Publication number: 20210062110Abstract: Provided herein is a green laundry detergent composition that is pH neutral and comprises a powerful cleansing surfactant, an organic and sustainable broad-spectrum antimicrobial agent, a high purity natural, renewable and biodegradable chelate, an emulsion polymer, a pH adjuster, enzymes, and water. Also provided are methods of producing the green laundry detergent composition and methods comprising the use of the green laundry detergent composition.Type: ApplicationFiled: August 26, 2020Publication date: March 4, 2021Inventors: Erin Robert Frey, Leif Alexander Frey
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Publication number: 20210066536Abstract: A marking method for applying a unique identification to each individual solar cell stack of a semiconductor wafer, at least comprising the steps: Providing a semiconductor wafer having an upper side and an underside, which comprises a Ge substrate forming the underside; and generating an identification with a unique topography by means of laser ablation, using a first laser, on a surface area of the underside of each solar cell stack of the semiconductor wafer, the surface area being formed in each case by the Ge substrate or by an insulating layer covering the Ge substrate.Type: ApplicationFiled: August 31, 2020Publication date: March 4, 2021Applicant: AZUR SPACE Solar Power GmbHInventors: Wolfgang KOESTLER, Steffen SOMMER, Alexander FREY
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Publication number: 20210066533Abstract: A dicing method for separating a wafer comprising a plurality of solar cells stack along at least one parting line, at least having the steps of: providing the wafer with a top, a bottom, an adhesive layer which is integrally bonded with the top and a cover glass layer which is integrally bonded with the adhesive layer, wherein the wafer includes a plurality of solar cell stacks, each having a germanium substrate layer forming the bottom of the wafer, a germanium sub-cell and at least two III-V sub-cells; creating a separating trench along the parting line by means of laser ablation, which extends from a bottom of the wafer through the wafer and the adhesive layer at least up to a top of the cover glass layer; and dividing the cover glass layer along the separating trench.Type: ApplicationFiled: August 31, 2020Publication date: March 4, 2021Applicant: AZUR SPACE Solar Power GmbHInventors: Steffen SOMMER, Wolfgang KOESTLER, Alexander FREY
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Publication number: 20200381579Abstract: A semiconductor body and a method for producing a semiconductor body are disclosed. In an embodiment a semiconductor body includes a p-conducting region, wherein the p-conducting region has at least one barrier zone and a contact zone, wherein the barrier zone has a first magnesium concentration and a first aluminum concentration, wherein the contact zone has a second magnesium concentration and a second aluminum concentration, wherein the first aluminum concentration is greater than the second aluminum concentration, wherein the first magnesium concentration is at least ten times less than the second magnesium concentration, wherein the contact zone forms an outwardly exposed surface of the semiconductor body, and wherein the barrier zone adjoins the contact zone, and wherein the semiconductor body is based on a nitride compound semiconductor material.Type: ApplicationFiled: August 24, 2018Publication date: December 3, 2020Inventors: Massimo Drago, Alexander Frey, Joachim Hertkorn, Ingrid Koslow
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Patent number: 10853971Abstract: A method for determining an exposure, in particular an exposure time, for a recording in a method for determining the 3D coordinates of an object is provided, in which a pattern is projected onto the object and the light reflected by the object is recorded. To improve such a method, a recording of the object is produced with a predetermined exposure, in particular exposure time. A mask image of this recording is produced, in which mask image the regions of the object lying within the measurement volume are depicted. The exposure, in particular the exposure time, for the recording is determined depending on the predetermined exposure, in particular exposure time, depending on the mean greyscale value in the regions, lying within the measurement volume, of the recording with a predetermined exposure and depending on an ideal greyscale value.Type: GrantFiled: February 1, 2018Date of Patent: December 1, 2020Assignee: Carl Zeiss Industrielle Messtechnik GmbHInventors: Christian Schleith, Tom Jaeckel, Alexander Frey, Markus Basel
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Publication number: 20200365765Abstract: An optoelectronic semiconductor component and a method for producing an optoelectronic semiconductor component are disclosed.Type: ApplicationFiled: October 19, 2018Publication date: November 19, 2020Inventors: Xiaojun Chen, Alexander Frey, Philipp Drechsel, Thomas Lehnhardt, Lise Lahourcade, Jürgen Off
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Publication number: 20200235264Abstract: A method of producing light-emitting diode chips includes A) and C)-F) in order: A) providing a growth substrate, C) producing a structural layer, the structural layer including Alx1Ga1-x1-y1Iny1N, where-in y1?0.5, and a plurality of structural elements with a mean height of at least 50 nm so that a side of the structural layer facing away from the growth substrate is rough, D) producing a cover layer on the structural layer, the cover layer forming the structural layer true to shape and including Alx2Ga1-x2-y2Iny2N, wherein x2?0.6, E) producing a planarization layer on the cover layer, a side of the finished planarization layer is flat and the planarization layer includes Alx3Ga1-x3-y3Iny3N, wherein x3+y3?0.2, and F) growing a functional layer sequence that generates radiation on the planarization layer.Type: ApplicationFiled: March 15, 2018Publication date: July 23, 2020Inventors: Massimo Drago, Alexander Frey, Joachim Hertkorn
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Patent number: 10502554Abstract: In a process for determining the 3D coordinates of an object (1), a partial surface of the object (1) is recorded by a 3D measuring device (2), and the 3D coordinates of this partial surface of the object (1) are determined. Additional partial surfaces of the object (1) are recorded by the 3D measuring device (2), and the 3D coordinates of these partial surfaces are determined. The 3D coordinates of the partial surfaces of the object (1) are assembled by a processing device (3). In order to improve this process, the exposures and/or the 3D coordinates of one or more partial surfaces of the object (1) are represented on a head-mounted display (4) (FIG.1).Type: GrantFiled: August 27, 2015Date of Patent: December 10, 2019Assignee: CARL ZEISS OPTOTECHNIK GMBHInventor: Alexander Frey
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Patent number: 10411155Abstract: A method of producing optoelectronic semiconductor chips includes growing a semiconductor layer sequence on a growth substrate; applying at least one metallization to a contact side of the semiconductor layer sequence, which contact side faces away from the growth substrate; attaching an intermediate carrier to the semiconductor layer sequence, wherein a sacrificial layer is attached between the intermediate carrier and the semiconductor layer sequence; removing the growth substrate from the semiconductor layer sequence; structuring the semiconductor layer sequence into individual chip regions; at least partially dissolving the sacrificial layer; and subsequently removing the intermediate carrier, wherein, in removing the intermediate carrier, part of the sacrificial layer is still present, removing the intermediate carrier includes mechanically breaking remaining regions of the sacrificial layer, and the sacrificial layer is completely removed after removing the intermediate carrier.Type: GrantFiled: July 23, 2015Date of Patent: September 10, 2019Assignee: OSRAM Opto Semiconductors GmbHInventors: Lorenzo Zini, Alexander Frey, Joachim Hertkorn, Berthold Hahn
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Patent number: 10354865Abstract: A method for procuring a nitride compound semiconductor device is disclosed. In an embodiment the method includes growing a first nitride compound semiconductor layer onto a growth substrate, depositing a masking layer, growing a second nitride compound semiconductor layer onto the masking layer, growing a third nitride compound semiconductor layer onto the second nitride compound semiconductor layer such that the third nitride compound semiconductor layer has non-planar structures and growing a fourth nitride compound semiconductor layer onto the non-planar structures such that the fourth nitride compound semiconductor layer has an essentially planar surface. The method further includes growing a functional layer sequence of the nitride compound semiconductor device, connecting a side of the functional layer sequence located opposite to the growth substrate to a carrier and removing the growth substrate.Type: GrantFiled: May 11, 2016Date of Patent: July 16, 2019Assignee: OSRAM Opto Semiconductors GmbHInventors: Joachim Hertkorn, Lorenzo Zini, Alexander Frey
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Publication number: 20180218517Abstract: A method for determining an exposure, in particular an exposure time, for a recording in a method for determining the 3D coordinates of an object is provided, in which a pattern is projected onto the object and the light reflected by the object is recorded. To improve such a method, a recording of the object is produced with a predetermined exposure, in particular exposure time. A mask image of this recording is produced, in which mask image the regions of the object lying within the measurement volume are depicted. The exposure, in particular the exposure time, for the recording is determined depending on the predetermined exposure, in particular exposure time, depending on the mean greyscale value in the regions, lying within the measurement volume, of the recording with a predetermined exposure and depending on an ideal greyscale value.Type: ApplicationFiled: February 1, 2018Publication date: August 2, 2018Inventors: Christian Schleith, Tom Jaeckel, Alexander Frey, Markus Basel
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Patent number: 9995703Abstract: A device for detecting chemical or biochemical substances in fluids for use in an electrochemical camera. The device includes a first carrier having a sensor array with a plurality of electrochemical sensors. A second carrier includes a porous layer having at least one functional region, in which specifically binding capturing molecules are immobilized. The at least one functional region is arranged directly adjacent to at least one non-functionalized region. Assigned to the at least one functional region and the at least one non-functionalized region are several sensors of the sensor array, for use as the electrochemical camera.Type: GrantFiled: March 2, 2010Date of Patent: June 12, 2018Assignee: Boehringer Ingelheim Vetmedica GmbHInventors: Alexander Frey, Walter Gumbrecht, Peter Paulicka, Meinrad Schienle, Manfred Stanzel
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Publication number: 20180144933Abstract: A method for procuring a nitride compound semiconductor device is disclosed. In an embodiment the method includes growing a first nitride compound semiconductor layer onto a growth substrate, depositing a masking layer, growing a second nitride compound semiconductor layer onto the masking layer, growing a third nitride compound semiconductor layer onto the second nitride compound semiconductor layer such that the third nitride compound semiconductor layer has non-planar structures and growing a fourth nitride compound semiconductor layer onto the non-planar structures such that the fourth nitride compound semiconductor layer has an essentially planar surface. The method further includes growing a functional layer sequence of the nitride compound semiconductor device, connecting a side of the functional layer sequence located opposite to the growth substrate to a carrier and removing the growth substrate.Type: ApplicationFiled: May 11, 2016Publication date: May 24, 2018Inventors: Joachim Hertkorn, Lorenzo Zini, Alexander Frey
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Patent number: 9923116Abstract: A method for producing a solar cell is described, in which a plurality of doped regions are to be etched-back selectively or over their entire surface. Once a semiconductor substrate (1) has been provided, various doped regions (3, 5) are formed in partial regions of a surface of the semiconductor substrate, the various doped regions (3, 5) differing as regards their doping concentration and/or their doping polarity. The various doped regions (3, 5) are then purposively etched-back in order to achieve desired doping profiles, and finally electrical contacts (21) are formed at least at some of the doped regions (3, 5). The etching-back of the various doped regions takes place in a common etching operation in an etching medium.Type: GrantFiled: March 11, 2015Date of Patent: March 20, 2018Assignee: UNIVERSITÄT KONSTANZInventors: Josh Engelhardt, Alexander Frey, Yvonne Schiele, Barbara Terheiden
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Patent number: D854062Type: GrantFiled: September 2, 2016Date of Patent: July 16, 2019Assignee: Robert Bosch GmbHInventors: Lorenz Kaeser, Alexander Frey