Patents by Inventor An-Cheng Chen

An-Cheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161013
    Abstract: A reparameterization method for initializing a machine learning model includes initializing a prefix layer of a first low dimensional layer in the machine learning model and a postfix layer of the first low dimensional layer, inverting the prefix layer to generate an inverse prefix layer of the first low dimensional layer, inverting the postfix layer to generate an inverse postfix layer of the first low dimensional layer, combining the inverse prefix layer, the first low dimensional layer and the inverse postfix layer to form a high dimensional layer, generating parallel operation layers from the high dimensional layer, and assigning initial weights to the parallel operation layers.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 16, 2024
    Applicant: MEDIATEK INC.
    Inventors: Cheng-Yu Yang, Hao Chen, Po-Hsiang Yu, Peng-Wen Chen
  • Publication number: 20240162071
    Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Inventors: Chih-Hung HUANG, Cheng-Lung WU, Yi-Fam SHIU, Yu-Chen CHEN, Yang-Ann CHU, Jiun-Rong PAI
  • Publication number: 20240163776
    Abstract: For example, an Access Point (AP) may be configured to identify a Trigger-Based (TB) sensing measurement exchange of a Wireless Local Area Network (WLAN) sensing procedure to be initiated by the AP. For example, the AP may be configured to determine that a non-AP Multi-Link Device (MLD) at an Enhanced Multi-Link Single Radio (EMLSR) operation mode is to participate as a sensing responder of the TB sensing measurement exchange. For example, the AP may be configured to transmit an Initial Control Frame (ICF) addressed to the non-AP MLD prior to initiating the TB sensing measurement exchange, for example, based on the determination that the non-AP MLD at the EMLSR operation mode is to participate as a sensing responder of the TB sensing measurement exchange.
    Type: Application
    Filed: December 28, 2023
    Publication date: May 16, 2024
    Inventors: Cheng Chen, Dibakar Das, Carlos Cordeiro
  • Publication number: 20240156405
    Abstract: A smart wearable device has a signal calibration function executed by a signal calibration method and applied to a finger, a limb and/or a neck of a user. The smart wearable device includes at least one physiological signal detector, at least one pressure detector and an operation processor. The at least one physiological signal detector is adapted to abut against a detection area of the user for detecting a physiological signal. The at least one pressure detector is disposed around the at least one physiological signal detector and adapted to detect a pressure value of the detection area. The operation processor is electrically connected with the at least one physiological signal detector and the at least one pressure detector. The operation processor is adapted to optimize the physiological signal when the pressure value exceeds a predefined pressure threshold.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 16, 2024
    Applicant: PixArt Imaging Inc.
    Inventors: Yung-Chang Lin, Jian-Cheng Liao, Chun-Chih Chen, Sen-Huang Huang, Yen-Min Chang
  • Publication number: 20240158243
    Abstract: An artificial tanzanite comprises aluminosilicate and vanadium, wherein the content of the aluminosilicate is in a range from 1 mass % to 30 mass % and the content of the vanadium is in a range from 1000 ppm to 40000 ppm. The artificial tanzanite is prepared by a method comprising: providing a synthetic raw material, wherein the synthetic raw material comprises the aluminosilicate, silicon-containing oxide, vanadium-containing oxide, and calcium-containing salt; and heating the synthetic raw material to a synthetic temperature, and keeping the synthetic raw material under a synthetic pressure to carry out synthetic reaction to form the artificial tanzanite after a period of synthetic time.
    Type: Application
    Filed: November 11, 2022
    Publication date: May 16, 2024
    Inventors: Yen-Hua CHEN, Jia-Cheng NI
  • Publication number: 20240160919
    Abstract: In aspects of the disclosure, a method, a system, and a computer-readable medium are provided. The method of building a kernel reparameterization for replacing a convolution-wise operation kernel in training of a neural network comprises selecting one or more blocks from tensor blocks and operations; and connecting the selected one or more blocks with the selected operations to build the kernel reparameterization. The kernel reparameterization has a dimension same as that of the convolution-wise operation kernel.
    Type: Application
    Filed: October 17, 2023
    Publication date: May 16, 2024
    Inventors: Po-Hsiang Yu, Hao Chen, Peng-Wen Chen, Cheng-Yu Yang
  • Publication number: 20240162359
    Abstract: A backsheet of a solar cell module including a substrate, a first protection layer, and a second protection layer is provided. The substrate includes a first surface and a second surface opposite to each other. The first protection layer is disposed on the first surface of the substrate. The second protection layer is disposed on the second surface of the substrate, wherein the first protection layer and the second protection layer include a silicone layer. At least one of the first protection layer and the second protection layer includes diffusion particles, wherein the diffusion particles include zinc oxide, titanium dioxide modified with silicon dioxide, or a combination thereof. A thickness of the first protection layer and a thickness of the second protection layer are respectively 10 ?m to 30 ?m. A solar cell module including the backsheet is also provided.
    Type: Application
    Filed: January 9, 2023
    Publication date: May 16, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-Kang Peng, Cheng-Hsuan Lin, Yu-Ling Hsu, Chun-Chen Chiang
  • Publication number: 20240162349
    Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
  • Publication number: 20240162227
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The method includes forming a first dielectric feature between first and the second fin structures, wherein each first and second fin structure includes first semiconductor layers and second semiconductor layers alternatingly stacked and in contact with the first dielectric layer. The method also includes removing the second semiconductor layers so that the first semiconductor layers of the first and second fin structures extend laterally from a first side and a second side of the first dielectric feature, respectively, trimming the first dielectric feature so that the first dielectric feature has a reduced thickness on both first and the second sides, and forming a gate electrode layer to surround each of the first semiconductor layers of the first and second fin structures.
    Type: Application
    Filed: November 19, 2023
    Publication date: May 16, 2024
    Inventors: Guan-Lin CHEN, Kuo-Cheng CHIANG, Shi Ning JU, Jung-Chien CHENG, Chih-Hao WANG, Kuan-Lun CHENG
  • Patent number: 11980864
    Abstract: A method of operating an integrated circuit includes using a first switching device to couple a bio-sensing device to a first signal path, generating, using the bio-sensing device, a bio-sensing signal on the first signal path in response to an electrical characteristic of a sensing film, using a second switching device to couple a temperature-sensing device to a second signal path, and generating, using the temperature-sensing device, a temperature-sensing signal on the second signal path in response to a temperature of the sensing film. The first and second switching devices, the bio-sensing device, the temperature-sensing device, and the sensing film are components of a sensing pixel of a plurality of sensing pixels of the integrated circuit.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Tung-Tsun Chen, Yi-Shao Liu, Jui-Cheng Huang, Chin-Hua Wen, Felix Ying-Kit Tsui, Yung-Chow Peng
  • Patent number: 11984489
    Abstract: A semiconductor structure includes a first device and a second device. The first device includes: a first gate structure formed over an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes: a second gate structure formed over an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Hsiu Liu, Feng-Cheng Yang, Tsung-Lin Lee, Wei-Yang Lee, Yen-Ming Chen, Yen-Ting Chen
  • Patent number: 11982802
    Abstract: Disclosed herein are device and method for performing a total internal reflection scattering (TIRS) measurement to a sample slide. The device comprises a first reflective plate having a first opening; a second reflective plate having second and third openings and disposed on top of the first reflective plate thereby forming a slot therebetween for accommodating the sample slide, wherein the first opening of the first reflective plate is disposed directly underneath the second opening of the second reflective plate; a white light source disposed in the space formed by the third opening of the second reflective plate and configured to emit a white light into the slot; and a first blackout layer disposed on top of the third opening thereby covering the white light source and keeping the emitted white light from leaking. When the sample slide is inserted into the slot, the white light source illuminates the sample slide so as to achieve the TIRS measurement to the sample slide.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: May 14, 2024
    Assignee: Chung Yuan Christian University
    Inventors: Cheng-An Lin, Tzu-Yin Hou, You-Wei Li, Yuh-Show Tsai, Ming-Chen Wang
  • Patent number: 11984465
    Abstract: The present disclosure relates to a CMOS image sensor having a multiple deep trench isolation (MDTI) structure, and an associated method of formation. In some embodiments, the image sensor comprises a boundary deep trench isolation (BDTI) structure disposed at boundary regions of a pixel region surrounding a photodiode. The BDTI structure has a ring shape from a top view and two columns surrounding the photodiode with the first depth from a cross-sectional view. A multiple deep trench isolation (MDTI) structure is disposed at inner regions of the pixel region overlying the photodiode, the MDTI structure extending from the back-side of the substrate to a second depth within the substrate smaller than the first depth. The MDTI structure has three columns with the second depth between the two columns of the BDTI structure from the cross-sectional view. The MDTI structure is a continuous integral unit having a ring shape.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei Chuang Wu, Ching-Chun Wang, Dun-Nian Yaung, Feng-Chi Hung, Jen-Cheng Liu, Yen-Ting Chiang, Chun-Yuan Chen, Shen-Hui Hong
  • Patent number: 11984488
    Abstract: Methods and devices that include a multigate device having a channel layer disposed between a source feature and a drain feature, a metal gate that surrounds the channel layer, and a first air gap spacer interposing the metal gate and the source feature and a second air gap spacer interposing the metal gate and the drain feature. A backside contact extends to the source feature. A power line metallization layer is connected to the backside contact.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Guan-Lin Chen, Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang, Kuan-Lun Cheng
  • Patent number: 11982573
    Abstract: A water environment temperature measurement tool includes measurement boxes and a counterweight box; a plurality of groups of the measurement boxes are provided; the counterweight box is movably connected with a group of measurement boxes; and each measurement box is provided with a temperature measurement instrument inside. The water environment temperature measurement tool further comprises: control mechanisms, each comprising a water inlet pipe, a water retaining member, an elastic member, a control assembly, a rotating seat, a rotating shaft, a second screw rod, a control seat and a rotary assembly. In the water environment temperature measurement tool of the present invention, the control mechanisms can achieve extraction and temperature measurement of water at different water body depths by cooperating with the measurement boxes and the temperature measurement instruments.
    Type: Grant
    Filed: July 17, 2023
    Date of Patent: May 14, 2024
    Assignees: HOHAI UNIVERSITY, JIANGSU YUZHI RIVER BASIN MANAGEMENT TECHNOLOGY RESEARCH INSTITUTE CO. LTD
    Inventors: Haoyue Gao, Qinghua Luan, Wenqiang Wang, Pengcheng Gu, Jiajun Chen, Lei Sun, Cheng Gao, Ziyuan Wang, Hong Zhou
  • Patent number: 11982951
    Abstract: A printing head and a method for applying a correction for mounting deviation of light-emitting chips are provided. The printing head includes a plurality of light-emitting chips. Each light-emitting chip includes a plurality of primary light-emitting elements that are continuously arranged. At least one of two adjacent light-emitting chips further includes at least one spare light-emitting element continuously and linearly arranged after the primary light-emitting elements. If the two adjacent light-emitting chips are both at a target mounting position, first N light-emitting units of one of the two light-emitting chips respectively face to first N light-emitting units of the other one of the two light-emitting chips, where N?1. Each two of the light-emitting units facing to each other form a group. One of the two light-emitting units in each of the groups is set to a light emission disabled state.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: May 14, 2024
    Assignee: AVISION INC.
    Inventors: Jian-Zhi Wang, Yen-Cheng Chen, Lun Wang
  • Patent number: 11985324
    Abstract: Exemplary video processing methods and apparatuses for encoding or decoding a current block by inter prediction are disclosed. Input data of a current block is received and partitioned into sub-partitions and motion refinement is independently performed on each sub-partition. A reference block for each sub-partition is obtained from one or more reference pictures according to an initial motion vector (MV). A refined MV for each sub-partition is derived by searching around the initial MV with N-pixel refinement. One or more boundary pixels of the reference block for a sub-partition is padded for motion compensation of the sub-partition. A final predictor for the current block is generated by performing motion compensation for each sub-partition according to its refined MV. The current block is then encoded or decoded according to the final predictor.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: May 14, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Yu-Cheng Lin, Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Patent number: 11984363
    Abstract: A semiconductor device includes a semiconductor substrate, a first epitaxial feature having a first semiconductor material over the semiconductor substrate, and a second epitaxial feature having a second semiconductor material over the semiconductor substrate. The second semiconductor material being different from the first semiconductor material. The semiconductor device further includes a first silicide layer on the first epitaxial feature, a second silicide layer on the second epitaxial feature, a metal layer on the first silicide layer, a first contact feature over the metal layer, and a second contact feature over the second silicide layer. A first number of layers between the first contact feature and the first epitaxial feature is greater than a second number of layers between the second contact feature and the second epitaxial feature.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Cheng Chen, Chun-Hsiung Lin, Chih-Hao Wang
  • Patent number: 11984419
    Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Hung Chen, Yu-Nu Hsu, Chun-Chen Liu, Heng-Chi Huang, Chien-Chen Li, Shih-Yen Chen, Cheng-Nan Hsieh, Kuo-Chio Liu, Chen-Shien Chen, Chin-Yu Ku, Te-Hsun Pang, Yuan-Feng Wu, Sen-Chi Chiang
  • Patent number: 11982936
    Abstract: A method of fabricating a photomask includes selectively exposing portions of a photomask blank to radiation to change an optical property of the portions of the photomask blank exposed to the radiation, thereby forming a pattern of exposed portions of the photomask blank and unexposed portions of the photomask blank. The pattern corresponds to a pattern of semiconductor device features.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Chang Lee, Ping-Hsun Lin, Yen-Cheng Ho, Chih-Cheng Lin, Chia-Jen Chen