Abstract: An interconnect structure including a conductive layer, a spacer, a dielectric layer, and a contact is provided. The conductive layer is disposed on a substrate. The spacer is disposed on a sidewall of the conductive layer. The dielectric layer covers the conductive layer and the spacer. The contact is disposed in the dielectric layer and located on the conductive layer.

Abstract: A touch system, a stylus, a touch apparatus, and a control method of the touch apparatus are provided. The control method includes following steps. At least one characteristic data of at least one input tool is obtained. An identifier of the input tool is generated according to the characteristic data. If a touch operation on the touch panel is performed with the input tool, a specific function of the touch apparatus is determined according to the identifier of the input tool.

Abstract: A force sensor device, which includes a force sensing layer, is provided, in which a heat treatment layer is disposed on one side of the force sensing layer, and a thermal conductivity of the heat treatment layer is greater than or equal to 200. An OLED display device includes an OLED layer and a CPU element, in which the force sensor device is disposed between the OLED layer and the CPU element. A heat treatment layer is disposed on at least one side of the force sensor device and the force sensing layer of the OLED display device. Heat distribution is relatively uniform through the heat treatment layer, so that a temperature gradient on the force sensing layer may be effectively decreased, the temperature noise in the press force detection may be decreased, and accuracy of pressure detection may be increased.

Abstract: A method includes forming a first semiconductor fin in a substrate, forming a metal gate structure over the first semiconductor fin, removing a portion of the metal gate structure to form a first recess in the metal gate structure that is laterally separated from the first semiconductor fin by a first distance, wherein the first distance is determined according to a first desired threshold voltage associated with the first semiconductor fin, and filling the recess with a dielectric material.

Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.

Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.

Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.

Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.

Abstract: A method includes forming a first semiconductor fin protruding from a substrate and forming a gate stack over the first semiconductor fin. Forming the gate stack includes depositing a gate dielectric layer over the first semiconductor fin, depositing a first seed layer over the gate dielectric layer, depositing a second seed layer over the first seed layer, wherein the second seed layer has a different structure than the first seed layer, and depositing a conductive layer over the second seed layer, wherein the first seed layer, the second seed layer, and the conductive layer include the same conductive material. The method also includes forming source and drain regions adjacent the gate stack.

Abstract: The present disclosure relates generally to depot formulations of lurasidone and methods of making depot formulations of lurasidone. The depot formulations include a suspending agent and are highly syringeable.

Abstract: A portable surface finishing device based on coherent light source includes a cover, a laser source, an optical calibrating module and a laser scanning module. The cover includes a beam output opening. The laser source is disposed in the cover, and is for providing a laser beam. The optical calibrating module is disposed in the cover, and the laser beam passes through the optical calibrating module. The laser scanning module is disposed in the cover, and the laser beam from the optical calibrating module passes through the laser scanning module so as to linearly output on a target surface. The laser scanning module includes a multifaceted reflective structure, a rotation driving mechanism and an F-theta lens.

Abstract: A touch control device is provided. A protective cover protects the touch control device and includes a top-surface to sustain a touch action performed by the user. A flat touch sensing layer includes many first direction-detection electrodes second direction-detection electrodes. The fast and second direction-detection electrodes are isolated by a transparent insulating material at the position where the first direction-detection electrodes cross the second direction-detection electrodes. The first and second direction-detection electrodes constitute a flat sensing pattern. A pressure-sensing layer is disposed between the protective cover and the flat touch sensing layer and includes at least one pressure-sensing unit constituting a first pattern. The overlap ratio between the projection of the first pattern onto the flat touch sensing layer and the flat sensing pattern is less than or equal to about 5% of the flat sensing pattern.

Abstract: Semiconductor structures are provided. The semiconductor structure includes a substrate and a first gate electrode formed over the substrate. The semiconductor structure further includes a dielectric layer formed on a sidewall of the first gate electrode and a second gate electrode formed over the substrate and separated from the first gate electrode by the dielectric layer. The semiconductor structure further includes a contact formed over the second gate electrode. In addition, the contact has a first extending portion and a second extending portion extending along opposite sidewalls of the second gate electrode.

Abstract: A method includes forming an opening in a dielectric layer, depositing a seed layer in the opening, wherein first portions of the seed layer have a first concentration of impurities, exposing the first portions of the seed layer to a plasma, wherein after exposure to the plasma the first portions have a second concentration of impurities that is less than the first concentration of impurities, and filling the opening with a conductive material to form a conductive feature. In an embodiment, the seed layer includes tungsten, and the conductive material includes tungsten. In an embodiment, the impurities include boron.

Abstract: The present disclosure provides a semiconductor structure, including an Nth metal layer, a bottom electrode over the Nth metal layer, a magnetic tunneling junction (MTJ) over the bottom electrode, a top electrode over the MTJ, and an (N+M)th metal layer over the Nth metal layer. N and M are positive integers. The (N+M)th metal layer surrounds a portion of a sidewall of the top electrode. A manufacturing method of forming the semiconductor structure is also provided.

Abstract: A pressure sensing module and a pressure sensing touch control system are provided. The pressure sensing module includes a sensing layer formed on a surface of a substrate. The sensing layer includes at least one pressure sensing unit including four resistors with the same resistance values. The four resistors form a Wheatstone bridge. Pattern shapes of two of the four resistors have the same extending directions, and the two of the four resistors are not disposed adjacent to each other. The pressure sensing touch control system includes a touch control sensing unit. The touch control sensing unit is disposed between the four resistors to achieve pressure sensing and position sensing of pressing action. In the present disclosure, a bridge circuit is disposed on a single surface to prevent the sensing for pressing with a finger from being affected by temperature and other noise.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes providing a substrate having a first region and a second region. The method also includes forming an interconnection structure on the first region and a fuse structure on the second region. The method further includes forming a first conductive pad on the interconnection structure. In addition, the method includes forming a capping layer, an etching stop layer and a dielectric layer to cover the first conductive pad and the fuse structure. The method further includes performing an etching process so that a first opening is formed to expose the conductive pad and a second opening is formed directly above the fuse structure. During the etching process, the first dielectric layer has a first etching rate, and the etching stop layer has a second etching rate that is lower than the first etching rate.

Abstract: Certain embodiments of a semiconductor device and a method of forming a semiconductor device comprise forming a high-k gate dielectric layer over a short channel semiconductor fin. A work function metal layer is formed over the high-k gate dielectric layer. A seamless metal fill layer is conformally formed over the work function metal layer.

Abstract: A multi-force touch module includes first sensing electrodes disposed along X coordinate and second sensing electrodes disposed along Y coordinate. A multi-force touch sensing method for the multi-force touch module includes the following steps: detecting press position information, determining whether press positions are located at a same position on X axis, and detecting resistance values of the press positions on X axis or Y axis according to a result thus determined; and determining magnitudes of pressing forces at the press positions according to magnitudes of the resistance values.

Abstract: A method includes forming a dummy gate structure over a semiconductor fin, forming a dielectric layer on opposing sides of the dummy gate structure, and removing the dummy gate structure to form a recess in the dielectric layer. The method further includes forming a gate dielectric layer and at least one conductive layer successively over sidewalls and a bottom of the recess, and treating the gate dielectric layer and the at least one conductive layer with a chemical containing fluoride (F).