Patents by Inventor An-Chung Chiang

An-Chung Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190259853
    Abstract: Gate structures and methods of forming the gate structures are described. In some embodiments, a method includes forming source/drain regions in a substrate, and forming a gate structure between the source/drain regions. The gate structure includes a gate dielectric layer over the substrate, a work function tuning layer over the gate dielectric layer, a metal-containing compound over the work function tuning layer, and a metal over the metal-containing compound, wherein the metal-containing compound comprises the metal as an element of the compound.
    Type: Application
    Filed: May 6, 2019
    Publication date: August 22, 2019
    Inventors: Chung-Chiang Wu, Chia-Ching Lee, Da-Yuan Lee, Hsueh Wen Tsau
  • Publication number: 20190225121
    Abstract: A seat height adjustment device includes a clutch mechanism (100) and a brake mechanism (500) which are coaxially arranged. The brake mechanism includes a bracket (8), and the bracket has a plurality of fastening components (9) that can be separately fixed corresponding to each of the mounting holes and cannot rotate with respect to the bracket (8). Each fastening component has a connecting end (91) connected to the bracket. The clutch mechanism includes a cover (1) having an outer diameter enlarged with respect to each of the connecting ends. The cover is combined corresponding with the bracket and partially or completely obscuring the connecting ends. Thereby the structure strength of the seat height adjusting device can be enhanced, and the seat height adjusting device can be installed and fixed to the seat in a general manner.
    Type: Application
    Filed: January 22, 2019
    Publication date: July 25, 2019
    Inventors: Chi-Dah CHIANG, Masao NIHEI, Jeffrey Chung-Chiang HSI
  • Patent number: 10355011
    Abstract: Methods for forming semiconductor structures are provided. The method for forming the semiconductor structure includes forming a control gate over a substrate and forming a dielectric layer covering the control gate. The method further includes forming a conductive layer having a first portion and a second portion over the dielectric layer. In addition, the first portion of the conductive layer is separated from the control gate by the dielectric layer. The method further includes forming an oxide layer on a top surface of the first portion of the conductive layer and removing the second portion of the conductive layer to form a memory gate.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: July 16, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fu-Ting Sung, Chung-Chiang Min, Wei-Hang Huang, Shih-Chang Liu, Chia-Shiung Tsai
  • Patent number: 10283619
    Abstract: Gate structures and methods of forming the gate structures are described. In some embodiments, a method includes forming source/drain regions in a substrate, and forming a gate structure between the source/drain regions. The gate structure includes a gate dielectric layer over the substrate, a work function tuning layer over the gate dielectric layer, a metal-containing compound over the work function tuning layer, and a metal over the metal-containing compound, wherein the metal-containing compound comprises the metal as an element of the compound.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: May 7, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Wu, Chia-Ching Lee, Da-Yuan Lee, Hsueh Wen Tsau
  • Patent number: 10276584
    Abstract: A semiconductor structure for a split gate flash memory cell device with a hard mask having an asymmetric profile is provided. In some embodiments, a semiconductor substrate of the semiconductor structure includes a first source/drain region and a second source/drain region. A control gate and a memory gate, of the semiconductor structure, are spaced over the semiconductor substrate between the first and second source/drain regions. A charge trapping dielectric structure of the semiconductor structure is arranged between neighboring sidewalls of the memory gate and the control gate, and arranged under the memory gate. A hard mask of the semiconductor structure is arranged over the control gate and includes an asymmetric profile. The asymmetric profile tapers in height away from the memory gate. A method for manufacturing a pair of split gate flash memory cell devices with hard masks having an asymmetric profile is also provided.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Chiang Min, Tsung-Hsueh Yang, Chang-Ming Wu, Shih-Chang Liu
  • Patent number: 10276690
    Abstract: A method includes forming a dummy gate structure over a semiconductor fin, forming a dielectric layer on opposing sides of the dummy gate structure, and removing the dummy gate structure to form a recess in the dielectric layer. The method further includes forming a gate dielectric layer and at least one conductive layer successively over sidewalls and a bottom of the recess, and treating the gate dielectric layer and the at least one conductive layer with a chemical containing fluoride (F).
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Hang Chiu, Chung-Chiang Wu, Chia-Ching Lee, Da-Yuan Lee, Ching-Hwanq Su
  • Patent number: 10268301
    Abstract: A touch panel includes a substrate, a first touch sensor electrode, a first insulation structure, a second touch sensor electrode, and a first pressure sensor electrode. The first touch sensor electrode is disposed on the substrate and extends along a first direction. The first insulation structure is dispose on the substrate and covers a part of the first touch sensor electrode. The second touch sensor electrode is disposed on the substrate and extends along a second direction. The second touch sensor electrode crosses over the first insulation structure and electrically isolated from the first touch-sensitive electrode. The first pressure sensor electrode is disposed on the substrate and extends along a third direction. The first pressure sensor electrode crosses over the first insulation structure and is staggered with at least one of the first touch. sensor electrode and the second touch sensor electrode.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: April 23, 2019
    Assignee: TPK Touch Solutions (Xiamen) Inc.
    Inventors: Ho-Hsun Chi, Cheng-Chung Chiang
  • Patent number: 10269569
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Publication number: 20190096678
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Application
    Filed: November 30, 2018
    Publication date: March 28, 2019
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Patent number: 10222922
    Abstract: A touch device includes a cover plate, a carrying structure, a first sensor layer, a dielectric layer and a second sensor layer. The carrying structure is disposed on the cover plate and includes a film layer and a buffer layer stacked on each other. The film is located between the cover plate and the buffer layer. The first sensor layer is at least disposed on the carrying structure. The first sensor layer and the cover plate are respectively located at two opposite sides of the carrying structure. The dielectric layer is disposed on the first sensor layer. The dielectric layer and the carrying structure are respectively located at two opposite sides of the first sensor layer. The second sensor layer is at least disposed on the dielectric layer. The second sensor layer and the first sensor layer are respectively located at two opposite sides of the dielectric layer.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: March 5, 2019
    Assignee: TPK Touch Solutions (Xiamen) Inc.
    Inventors: Ching-Shan Lin, Cheng-Chung Chiang, Chan-Hao Tseng
  • Patent number: 10222019
    Abstract: A light module of a headlamp includes a laser device, a liquid crystal panel, a light transmitting device, a wavelength converting device, and a projection device in sequence. The laser device has at least a laser emitter to project laser rays to the liquid crystal panel. The light transmitting device transmits the laser rays from the liquid crystal panel to the wavelength converting device. The wavelength converting device transforms the laser beam into white light and project out through the projection device. A heat sink is attached to the wavelength converting device to dissipate the heat.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: March 5, 2019
    Assignee: Tan De Tech Co., Ltd.
    Inventors: Tsung Hsien Li, Chung Chiang Pan, Cheng Chih Lai, Chao Pai Lee
  • Publication number: 20190067279
    Abstract: A method of forming a semiconductor device includes forming a plurality of fins on a substrate, forming a polysilicon gate structure, and replacing the polysilicon gate structure with a metal gate structure. Replacing the polysilicon gate structure includes depositing a work function metal layer over the plurality of fins, forming a metal oxide layer over the work function metal layer, and depositing a first metal layer over the metal oxide layer. A first portion of the metal oxide layer is formed within an area between adjacent fins from among the plurality of fins. An example benefit includes reduced diffusion of unwanted and/or detrimental elements from the first metal layer into its underlying layers and consequently, the reduction of the negative impact of these unwanted and/or detrimental elements on the semiconductor device performance.
    Type: Application
    Filed: October 29, 2018
    Publication date: February 28, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsueh Wen TSAU, Chia-Ching LEE, Chung-Chiang WU, Da-Yuan LEE
  • Patent number: 10218145
    Abstract: A vortex laser generation device in a degenerate cavity with a spiral phase element and a vortex laser generation method are provided. The vortex laser generation device has a degenerate cavity, and the degenerate cavity has a resonator mirror, a gain medium, an optical element, and an output coupler. The off-axis beams are formed in multiple pass transverse modes to resonate by disposing an optical element in the degenerate cavity, so that a vortex laser with orbital angular momentum can be generated.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: February 26, 2019
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Yuan-Yao Lin, Yen-Yin Lin, Shou-Tai Lin, An-Chung Chiang
  • Publication number: 20190035916
    Abstract: A method includes forming a dummy gate structure over a semiconductor fin, forming a dielectric layer on opposing sides of the dummy gate structure, and removing the dummy gate structure to form a recess in the dielectric layer. The method further includes forming a gate dielectric layer and at least one conductive layer successively over sidewalls and a bottom of the recess, and treating the gate dielectric layer and the at least one conductive layer with a chemical containing fluoride (F).
    Type: Application
    Filed: September 14, 2017
    Publication date: January 31, 2019
    Inventors: Shih-Hang Chiu, Chung-Chiang Wu, Chia-Ching Lee, Da-Yuan Lee, Ching-Hwanq Su
  • Patent number: 10170417
    Abstract: A semiconductor structure includes a substrate, a dielectric layer, a metal layer, and a tungsten layer. The dielectric layer is on the substrate and has a recess feature therein. The metal layer is in the recess feature. The metal layer has an oxygen content less than about 0.1 atomic percent. The tungsten layer is in the recess feature and in contact with the metal layer.
    Type: Grant
    Filed: November 19, 2017
    Date of Patent: January 1, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Chiang Wu, Chia-Ching Lee, Hsueh-Wen Tsau, Chun-Yuan Chou, Cheng-Yen Tsai, Da-Yuan Lee, Ming-Hsing Tsai
  • Patent number: 10168013
    Abstract: A light module of a headlamp includes several laser emitters, several collimators, a light circulating device, a liquid crystal panel, and a projection lens in sequence. The light circulating device includes a filter, a first polarizer, a first reflector, a wavelength transforming layer, a second reflector, and a second polarizer to convert laser rays of the laser emitters into white laser rays with a predetermined polarization for the liquid crystal panel, and finally to project out through the projection lens.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: January 1, 2019
    Assignee: Tan De Tech Co., Ltd.
    Inventors: Tsung Hsien Li, Chung Chiang Pan, Cheng Chih Lai, Chao Pai Lee
  • Publication number: 20180350722
    Abstract: An interconnect structure including a conductive layer, a spacer, a dielectric layer, and a contact is provided. The conductive layer is disposed on a substrate. The spacer is disposed on a sidewall of the conductive layer. The dielectric layer covers the conductive layer and the spacer. The contact is disposed in the dielectric layer and located on the conductive layer.
    Type: Application
    Filed: January 14, 2018
    Publication date: December 6, 2018
    Applicant: Winbond Electronics Corp.
    Inventor: Ming-Chung Chiang
  • Publication number: 20180351081
    Abstract: The present disclosure provides a semiconductor structure, including an Nth metal layer, a bottom electrode over the Nth metal layer, a magnetic tunneling junction (MTJ) over the bottom electrode, a top electrode over the MTJ, and an (N+M)th metal layer over the Nth metal layer. N and M are positive integers. The (N+M)th metal layer surrounds a portion of a sidewall of the top electrode. A manufacturing method of forming the semiconductor structure is also provided.
    Type: Application
    Filed: July 30, 2018
    Publication date: December 6, 2018
    Inventors: Fu-Ting SUNG, Chung-Chiang MIN, Yuan-Tai TSENG, Chern-Yow HSU, Shih-Chang LIU
  • Patent number: 10146344
    Abstract: A touch apparatus and a touch method are provided. The touch apparatus includes a touch panel and a processing unit. The touch panel includes a plurality of sensing electrodes. The touch panel has a first contact surface and a second contact surface. The processing unit is configured to the touch panel. The processing unit receives a touch signal generated by the touch panel sensing a touch operation. The processing unit determines whether the operation is located on the first contact surface or on the second contact surface of the touch panel according to the touch signal and a preset condition. The preset condition is determined by a sensing signal generated by sensing the touch operation touching first contact surface or the second contact surface of the touch panel using at least one of the sensing electrodes.
    Type: Grant
    Filed: August 23, 2015
    Date of Patent: December 4, 2018
    Assignee: Wistron Corporation
    Inventors: Yao-Tsung Chang, Chih-Chung Chiang, Wen-Hua Chang, Meng-Chi Hsieh
  • Patent number: 10146391
    Abstract: A transparent conductive oxide film for sensing deformation has a length, and generates a deformation amount when an external force is applied thereto, so as to change a resistance value of the transparent conductive oxide film. A ratio of the deformation amount to the length ranges from about 5×10?5 to about 3.5×10?4, and a rate of change of the resistance value ranges from about 0.01% to about 3%.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: December 4, 2018
    Assignee: TPK Touch Solutions (Xiamen) Inc.
    Inventors: Cheng-Chung Chiang, Feng Chen, Ho-Hsun Chi, Yuh-Wen Lee