Patents by Inventor An-Hao Lin

An-Hao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12009257
    Abstract: A semiconductor device includes a semiconductor substrate, a gate electrode, a source/drain contact, a conductive structure, an interlayer dielectric (ILD) layer, an etch stop layer, and a dielectric liner. The semiconductor substrate has a channel region and a source/drain region. The gate electrode is over the channel region. The source/drain contact is over the source/drain region. The conductive structure is over a top surface of the source/drain contact. The ILD layer surrounds the conductive structure and over the gate electrode. The etch stop layer is over the conductive structure and the ILD layer. The etch stop layer comprises a material different from that of the ILD layer. A dielectric liner at a sidewall the conductive structure. The dielectric liner extends from the top surface of the source/drain contact to a bottom surface of the etch stop layer.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Hao Chang, Jia-Chuan You, Yu-Ming Lin, Chih-Hao Wang, Wai-Yi Lien
  • Patent number: 12009254
    Abstract: A method includes forming a first conductive feature on a substrate, forming a via that contacts the first conductive feature, the via comprising a conductive material, performing a Chemical Mechanical Polishing (CMP) process to a top surface of the via, depositing an Interlayer Dielectric (ILD) layer on the via, forming a trench within the ILD layer to expose the via, and filling the trench with a second conductive feature that contacts the via, the second conductive feature comprising a same material as the conductive material.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Yuan Chen, Shih-Chuan Chiu, Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin
  • Patent number: 12009265
    Abstract: A method of forming an integrated circuit structure includes forming a first source/drain contact plug over and electrically coupling to a source/drain region of a transistor, forming a first dielectric hard mask overlapping a gate stack, recessing the first source/drain contact plug to form a first recess, forming a second dielectric hard mask in the first recess, recessing an inter-layer dielectric layer to form a second recess, and forming a third dielectric hard mask in the second recess. The third dielectric hard mask contacts both the first dielectric hard mask and the second dielectric hard mask.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Lin-Yu Huang, Li-Zhen Yu, Sheng-Tsung Wang, Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Publication number: 20240186188
    Abstract: A semiconductor device includes a first semiconductor layer below a second semiconductor layer; first and second gate dielectric layers surrounding the first and the second semiconductor layers, respectively; and a gate electrode surrounding both the first and the second gate dielectric layers. The first gate dielectric layer has a first top section above the first semiconductor layer and a first bottom section below the first semiconductor layer. The second gate dielectric layer has a second top section above the second semiconductor layer and a second bottom section below the second semiconductor layer. The first top section has a first thickness. The second top section has a second thickness. The second thickness is greater than the first thickness.
    Type: Application
    Filed: February 14, 2024
    Publication date: June 6, 2024
    Inventors: Yung-Hsiang CHAN, Wen-Hung HUANG, Shan-Mei LIAO, Jian-Hao CHEN, Kuo-Feng YU, Kuei-Lun LIN
  • Publication number: 20240182884
    Abstract: The application provides an enzyme immobilization carrier and a preparation method thereof, an immobilized enzyme and a preparation method thereof. The above enzyme immobilization carrier is obtained by an amino modification or a cyanuric chloride modification of super-crosslinked polyvinyl alcohol. The use of the enzyme immobilization carrier provided by the application may effectively improve the stability and reusability of the immobilized enzyme. Moreover, due to the use of the form of enzyme covalent linkage, compared with an embedding method, the preparation method is no need for chemical reagent immersion and the like, it is beneficial to maintain the own activity of the enzyme, and promote the immobilized enzyme to have the better activity while the stability and reusability are kept.
    Type: Application
    Filed: April 12, 2021
    Publication date: June 6, 2024
    Inventors: Hao HONG, Yi XIAO, Na ZHANG, Han LIN, Pong PAN, Williams VYASA, Liteng MA, Yuxia CUI, Yanyan GAO
  • Publication number: 20240186373
    Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.
    Type: Application
    Filed: February 7, 2024
    Publication date: June 6, 2024
    Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Li-Li Su, Wei-Min Liu
  • Publication number: 20240186148
    Abstract: A method of manufacturing a semiconductor device includes forming a first layer of a first planarizing material over a patterned surface of a substrate, forming a second layer of a second planarizing material over the first planarizing layer, crosslinking a portion of the first planarizing material and a portion of the second planarizing material, and removing a portion of the second planarizing material that is not crosslinked. In an embodiment, the method further includes forming a third layer of a third planarizing material over the second planarizing material after removing the portion of the second planarizing material that is not crosslinked. The third planarizing material can include a bottom anti-reflective coating or a spin-on carbon, and an acid or an acid generator. The first planarizing material can include a spin-on carbon, and an acid, a thermal acid generator or a photoacid generator.
    Type: Application
    Filed: February 9, 2024
    Publication date: June 6, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Hao CHEN, Wei-Han LAI, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20240185085
    Abstract: A technique iteratively updates model weights of a teacher model and a student model. In operation, the teacher model produces noisy original pseudo-labeled training examples from unlabeled training examples. The technique weights the original pseudo-labeled training examples based on validation information. The technique then updates model weights of the student model based on the weighted pseudo-labeled training examples. The validation information, which is used to weight the original pseudo-labeled training examples, is produced by selecting labeled training examples based on an uncertainty-based factor and a similarity-based factor. The uncertainty-based factor describes an extent to which the student model produces uncertain classification results for the set of labeled training examples. The similarity-based factor describes the similarity between the set of labeled training examples and the unlabeled training examples.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 6, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Wen CUI, Keng-hao CHANG, Pai Chun LIN, Mohammadreza KHALILISHOJA, Eren MANAVOGLU
  • Patent number: 12004199
    Abstract: In a vehicle to anything environment, in order to achieve good data reception, receiving equipment and transmission equipment are preconfigured and thus include all the parameters needed for data transmission. In order to increase the probability of the data being received by the receiving equipment, the transmission equipment uses a highly robust modulation and coding scheme to code and modulate the radio signal used to broadcast the data. However, the more robust the implemented modulation and coding scheme, the lower the spectral efficiency of the radio signal used for transmission. User equipments belonging to the same broadcast group are identified by means of an identifier of the broadcast group, which allows for the implementation of a mechanism of acknowledgement by the receiving equipments making it possible to inform the transmission equipment that an error has occurred in the reception of the broadcast data.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: June 4, 2024
    Assignee: Orange
    Inventor: Hao Lin
  • Patent number: 12002710
    Abstract: A semiconductor structure and method of forming the same are provided. The method includes: forming a plurality of mandrel patterns over a dielectric layer; forming a first spacer and a second spacer on sidewalls of the plurality of mandrel patterns, wherein a first width of the first spacer is larger than a second width of the second spacer; removing the plurality of mandrel patterns; patterning the dielectric layer using the first spacer and the second spacer as a patterning mask; and forming conductive lines laterally aside the dielectric layer.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hsin Chan, Jiing-Feng Yang, Kuan-Wei Huang, Meng-Shu Lin, Yu-Yu Chen, Chia-Wei Wu, Chang-Wen Chen, Wei-Hao Lin, Ching-Yu Chang
  • Patent number: 12000756
    Abstract: A leakage detection system is provided and includes a substrate provided between a first element and a second element, and at least one sensing unit provided on the substrate to generate an electrical signal when coming into contact with a leakage liquid. As such, warnings can be provided when coming into contact with the leakage liquid to avoid significant loss of assets.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: June 4, 2024
    Assignee: AURAS TECHNOLOGY CO., LTD.
    Inventors: Chien-Yu Chen, Tian-Li Ye, Jen-Hao Lin, Wei-Shen Lee
  • Patent number: 12002756
    Abstract: A method of forming a semiconductor structure includes first forming a metal gate (MG) over a semiconductor layer, a gate spacer on a sidewall of the MG, and a source/drain (S/D) feature disposed in the semiconductor layer and adjacent to the MG, forming an S/D contact (MD) over the S/D feature, forming a first ILD layer over the MG and the MD, and subsequently patterning the first ILD layer to form an opening. The method further includes forming a metal layer in the opening, such that the metal layer contacts both the MG and the MD, removing a top portion of the metal layer to form a trench, filling the trench with a dielectric layer, and subsequently forming a second ILD layer over the dielectric layer.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 12002768
    Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chih Huang, Chih-Hao Chang, Po-Chun Lin, Chun-Ti Lu, Zheng-Gang Tsai, Shih-Wei Chen, Chia-Hung Liu, Hao-Yi Tsai, Chung-Shi Liu
  • Publication number: 20240177653
    Abstract: A light-emitting diode (LED) display device, includes: a plurality of displaying basic-units, each of the displaying basic-units having a plurality of sub-pixel regions, on which a plurality of red LED units, a plurality of green LED units, a plurality of blue LED units, and a plurality of white LED units are selectively provided; and a control unit, performing an image reconstruction process for an input image, thereby making each of the displaying basic-units display color, color grayscale, or black-and-white grayscale; wherein in each of the displaying basic-units, the quantity of green LED units is more than or equal to the quantity of white LED units, and the quantity of green LED units is more than the quantity of blue LED units or red LED units.
    Type: Application
    Filed: September 28, 2023
    Publication date: May 30, 2024
    Inventors: Jui Yi WU, Chih Hao LIN, Jian-Chin LIANG
  • Publication number: 20240173370
    Abstract: Provided herein are hydrogels that include a plurality of bacteriophages located within and covalently bonded to the hydrogel interior. The hydrogel is engineered to facilitate a controlled sustained release of the connected bacteriophages, e.g., to or within the body of a patient suffering from a bacterial infection. Also provided are methods for forming the provided hydrogels, and for using the hydrogels to treat a patient suffering from a bacterial infection.
    Type: Application
    Filed: March 25, 2022
    Publication date: May 30, 2024
    Applicant: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Ovijit CHAUDHURI, Paul L. BOLLYKY, Robert MANASHEROB, Yung-Hao LIN, Derek AMANATULLAH
  • Publication number: 20240175900
    Abstract: A probe head includes a probe seat, and vertical probes each having a head portion including a head portion installation section with a first width, and a probe tip section including a probe tip contact part with a second width smaller than the first width and a probe tip gradually narrowing part which is located between the head portion installation section and the probe tip contact part, gradually narrows from the first width to the second width, and has a first length smaller than a second length of the probe tip contact part. The head portion installation section protrudes out of a lower surface of the probe seat for a length smaller than the sum of the first and second lengths. The vertical probe is great in current withstanding capability, structural strength and life time, and meets the requirement of probing tiny electrically conductive contacts.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 30, 2024
    Applicant: MPI CORPORATION
    Inventors: CHIN-YI LIN, TZU-YANG CHEN, TZU-HAO CHIEN, CHAO-SHUN WANG, LI-MING FAN
  • Publication number: 20240174325
    Abstract: A bicycle rear derailleur includes a base component, a movable component, a linkage assembly, a chain guide and a transmission assembly. The linkage assembly is pivotably connected to the base component and the movable component. The chain guide is pivotably disposed on the movable component. The transmission assembly is disposed on the linkage assembly. The transmission assembly comprises a driving source, a circuit board and a sensor, the driving source is configured to provide a power to the movable component to drive the movable component to move relative to the base component, the circuit board is electrically connected to the driving source, the circuit board has a first surface and a second surface located opposite to each other, the sensor is disposed on the circuit board, and the first surface and the second surface pass through the sensor.
    Type: Application
    Filed: November 21, 2023
    Publication date: May 30, 2024
    Inventors: Chia-Hao YANG, Hung-Jui LIN
  • Publication number: 20240178264
    Abstract: An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 30, 2024
    Inventors: Chun-Wei HSU, Tsai-Hao HUNG, Chung-Yu LIN, Ying-Hsun CHEN
  • Publication number: 20240178102
    Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.
    Type: Application
    Filed: April 21, 2023
    Publication date: May 30, 2024
    Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
  • Patent number: RE50000
    Abstract: A keyswitch structure includes a base, a keycap, a first support, a second support, and a connection structure. The keycap moves up and down relative to the base through the first support and the second support. The connection structure is disposed on the base and includes a vertical-motion limiting part and a horizontal-motion limiting part. The first support includes a rod-shaped connection portion and is connected to the connection structure through the rod-shaped connection portion. The vertical-motion limiting part prevents the rod-shaped connection portion from vertically moving. The horizontal-motion limiting part limits the horizontal movement of the rod-shaped connection portion. The vertical-motion limiting part and the horizontal-motion limiting part are separated in the rotation axis of the rod-shaped connection portion.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: June 4, 2024
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Chih-Hao Chen, Chih-Hung Chen, Chin-Hung Lin, Ling-Hsi Chao, Chih-Chung Yen