Patents by Inventor An Lin

An Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240195972
    Abstract: Techniques and tools for encoding enhancement layer video with quantization that varies spatially and/or between color channels are presented, along with corresponding decoding techniques and tools. For example, an encoding tool determines whether quantization varies spatially over a picture, and the tool also determines whether quantization varies between color channels in the picture. The tool signals quantization parameters for macroblocks in the picture in an encoded bit stream. In some implementations, to signal the quantization parameters, the tool predicts the quantization parameters, and the quantization parameters are signaled with reference to the predicted quantization parameters. A decoding tool receives the encoded bit stream, predicts the quantization parameters, and uses the signaled information to determine the quantization parameters for the macroblocks of the enhancement layer video. The decoding tool performs inverse quantization that can vary spatially and/or between color channels.
    Type: Application
    Filed: February 21, 2024
    Publication date: June 13, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Shankar Regunathan, Shijun Sun, Chengjie Tu, Chih-Lung Lin
  • Publication number: 20240194926
    Abstract: A containment apparatus for battery tray rack includes a pressing module, a securing module, and a controller. In response to that the containment apparatus is to form the containment on the battery tray rack, the controller controls the pressing module to apply a compressive force, so that the battery tray rack withstands a clamping pressure, and the controller controls the securing module to lock the battery tray rack to maintain the clamping pressure. In response to that the containment apparatus is to release the containment from the battery tray rack, the controller controls the pressing module to apply the compressive force, and the controller controls the securing module to unlock the battery tray rack, and then the controller controls the pressing module to cancel the compressive force.
    Type: Application
    Filed: November 21, 2023
    Publication date: June 13, 2024
    Applicant: CHROMA ATE INC.
    Inventors: Ying-Cheng Chen, Wen-Chuan Chang, Ying-Chi Chen, Chuan-Tse Lin
  • Publication number: 20240195945
    Abstract: A method for automatically detecting a projector configuration and a projection system are provided. First, multiple projectors are searched in a network domain, and each projector is correspondingly equipped with an imaging apparatus. Next, the projectors are driven to project, and the imaging apparatuses are driven to capture images. Afterwards, the projectors are grouped based on one or more projected ranges comprised in an imaging range of the imaging apparatus corresponding to each projector. A configuration relationship of the projected ranges of the projectors in the same group is determined for overlapping areas between the projected ranges of the projectors grouped in the same group. The method for automatically detecting the projector configuration and the projection system proposed by the disclosure can automatically detect the actual configuration relationship of the projectors.
    Type: Application
    Filed: December 7, 2023
    Publication date: June 13, 2024
    Applicant: Coretronic Corporation
    Inventors: Chun-Lin Chien, Chung-Lung Yang, Yu-Wen Lo, Xuan-En Fung
  • Publication number: 20240195083
    Abstract: An antenna module including a first radiator and a second radiator is provided. The first radiator includes a first segment to a fifth segment connected in sequence. A first slot is formed between the second segment and the fourth segment. The second radiator has an edge. A first retracting distance is between the second segment and an extension line. A second retracting distance is between the fourth segment and the extension line. The first segment resonates at a first high frequency band. The first radiator and the first slot resonate at a low frequency band and a second high frequency band. The first retracting distance, the second retracting distance, the second segment, the fourth segment, the fifth segment and the first slot resonate at a third high frequency band. The first segment and the second radiator resonate at a fourth high frequency band. In addition, an electronic device is provided.
    Type: Application
    Filed: October 17, 2023
    Publication date: June 13, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Shih-Keng Huang, Hau Yuen Tan, Chih-Wei Liao, Chia-Hung Chen, Wen-Hgin Chuang, Chia-Hong Chen, Lin-Hsu Chiang, Hsi Yung Chen
  • Publication number: 20240195963
    Abstract: A method of decoding a bitstream is provided. The method determines a block unit of an image frame of the bitstream. The method determines an intra prediction mode index of the block unit, which corresponds to one of multiple wide-angle candidate modes, each having an angle parameter. The method determines reference samples neighboring the block unit and whether the determined intra prediction mode index is equal to one of predefined indices each corresponding to one of predefined wide-angle modes in the wide-angle candidate modes. The method generates filtered samples based on the determined reference samples. The filtered samples are generated by a reference filter when the determined intra prediction mode index is equal to the one of the predefined indices. The method reconstructs the determined block unit based on the generated filtered samples along a mode direction of the determined intra prediction mode index.
    Type: Application
    Filed: February 20, 2024
    Publication date: June 13, 2024
    Inventors: YU-CHIAO YANG, PO-HAN LIN
  • Publication number: 20240195103
    Abstract: A current transmission assembly and a current transmission system are provided. The current transmission system includes the current transmission assembly and a circuit board structure. The current transmission assembly includes a pluggable component, at least one conductor component, and at least one electrically connecting component. The pluggable component includes a housing, at least one set of electrically conductive arms, and at least one connecting member. The at least one sets of electrically conductive arms is disposed inside the housing. The at least one conductor component includes an electrical insulator and a wire main body. The electrical insulator encircles the wire main body, so that a first terminal and a second terminal are exposed from the wire main body, and the first terminal is connected to the at least one two connecting member.
    Type: Application
    Filed: January 17, 2024
    Publication date: June 13, 2024
    Inventors: Ching-Hsiang Chang, XIANG-BIAO TANG, Yen-Lin Chen
  • Publication number: 20240195210
    Abstract: A soft start circuit of a UPS relay includes a three-phase pre-charging module, a first PFC module, a second PFC module, a relay module, a three-phase input voltage detection module, a bus voltage detection module and a relay control module. The relay control module is electrically connected to the three-phase input voltage detection module and the bus voltage detection module and controls the connection of the relay module, to control part of relays in the relay module to be turned on based on the A-phase input voltage, the B-phase input voltage, the C-phase input voltage and the bus voltage to soft start the relay. The relay can be safely turned on without being damaged by an impact current in a case that an input voltage is unbalanced.
    Type: Application
    Filed: October 16, 2023
    Publication date: June 13, 2024
    Applicant: Vertiv Corporation
    Inventors: Shaoqiang LIN, Wei XU, Xiaolu GUO, Ying WANG
  • Publication number: 20240195104
    Abstract: The present application discloses a PDU power acquisition apparatus, comprising power transmission conductors and an electrical connection assembly; the electrical connection assembly includes at least two power acquisition structures, and at least two power transmission conductors are comprised; each power transmission conductor is made of a hard conductive material and is rigid, and each power acquisition structure is a deformable structure; and power acquisition between the power acquisition structure and the power transmission conductor is press-contact type power acquisition, and the power acquisition structure squeezes the power transmission conductor.
    Type: Application
    Filed: January 23, 2024
    Publication date: June 13, 2024
    Inventors: Haiqing LIN, Qiang Yu, Yue Zhang
  • Publication number: 20240195672
    Abstract: Methods and an apparatus for performing synchronization in New Radio (NR) systems are disclosed. A frequency band may be determined and may correspond to a WTRU. On a condition that the operational frequency band is a lower frequency, a synchronization signal block (SSB) index may be implicitly. On a condition that the operational frequency band is a higher frequency, an SSB index may be determined based on a hybrid method which includes determining the SSB index using both an implicit and an explicit method. A configuration of actually transmitted SSBs may be determined using a multi-level two stage compressed indication where SSB groups are determined based on a coarse indicator and actually transmitted SSBs with the SSB groups are determined based on a fine indicator.
    Type: Application
    Filed: February 27, 2024
    Publication date: June 13, 2024
    Applicant: Sony Group Corporation
    Inventors: Kyle Jung-Lin PAN, Fengjun XI, Janet A. STERN-BERKOWITZ
  • Publication number: 20240193010
    Abstract: A system, an apparatus, and a method for cloud resource allocation are provided. The cloud resource allocation system includes a plurality of worker nodes and a master node. The master node includes: an orchestrator configured to: obtain multiple node resource information respectively reported by a plurality the worker nodes through a resource manager; and parse a job profile of a job request obtained from the waiting queue through the job scheduler and decide to execute a direct resource allocation or a preemptive indirect resource allocation for a job to be handled requested by the job request based on the node resource information and the job profile.
    Type: Application
    Filed: March 14, 2023
    Publication date: June 13, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chun-Chieh Huang, Tzu-Chia Wang, Chien-Hung Lee, Yi-Lin Wu, Guo-Hong Lai, Lin-Kang Wu
  • Publication number: 20240196680
    Abstract: Provided are an array substrate, a display panel, and a display apparatus. The array substrate includes a display region, a substrate, pixel driving circuits, and scanning signal lines. The display region includes a plurality of pixel regions. At least part of a pixel driving circuit and at least part of a scanning signal line are located in the display region and on the same side of the substrate. The scanning signal line extends in a first direction. At least part of the pixel driving circuit is located in a pixel region and includes thin-film transistors. A thin-film transistor includes a gate and a channel layer. The gate is a portion where the scanning signal line overlaps the channel layer. The array substrate further includes auxiliary signal lines. An auxiliary signal line is located in the display region and extends in the first direction.
    Type: Application
    Filed: February 21, 2024
    Publication date: June 13, 2024
    Applicants: Wuhan Tianma Microelectronics Co., Ltd., Wuhan Tianma Microelectronics Co., Ltd. Shanghai Branch
    Inventors: Huiping CHAI, Lin ZHANG, Gaojun HUANG
  • Publication number: 20240194711
    Abstract: An optical device includes a photoelectric conversion layer, an anti-reflection layer, an underlying layer, a bottom meta layer, and a top meta layer. The photoelectric conversion layer includes a plurality of photodiodes. The anti-reflection layer is disposed on the photoelectric conversion layer. The underlying layer is disposed on the anti-reflection layer. The bottom meta layer is disposed on the underlying layer and includes a plurality of bottom meta units and a filling between the bottom meta units, in which the filling is continuously extend from the underlying layer, and a material of the filling is the same as a material of the underlying layer. The top meta layer is disposed above the bottom meta layer and includes a plurality of top meta units and a plurality of air recesses, in which the plurality of air recesses are respectively disposed between two adjacent top meta units.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 13, 2024
    Inventors: Chun-Yuan WANG, Po-Hsiang WANG, Han-Lin WU, Hung-Jen TSAI
  • Publication number: 20240195973
    Abstract: Techniques and tools for encoding enhancement layer video with quantization that varies spatially and/or between color channels are presented, along with corresponding decoding techniques and tools. For example, an encoding tool determines whether quantization varies spatially over a picture, and the tool also determines whether quantization varies between color channels in the picture. The tool signals quantization parameters for macroblocks in the picture in an encoded bit stream. In some implementations, to signal the quantization parameters, the tool predicts the quantization parameters, and the quantization parameters are signaled with reference to the predicted quantization parameters. A decoding tool receives the encoded bit stream, predicts the quantization parameters, and uses the signaled information to determine the quantization parameters for the macroblocks of the enhancement layer video. The decoding tool performs inverse quantization that can vary spatially and/or between color channels.
    Type: Application
    Filed: February 21, 2024
    Publication date: June 13, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Shankar Regunathan, Shijun Sun, Chengjie Tu, Chih-Lung Lin
  • Publication number: 20240194678
    Abstract: A method includes depositing an epitaxial stack over a substrate, the epitaxial stack comprising alternating first semiconductor layers and second semiconductor layers, wherein the first semiconductor layers comprise a different semiconductor composition from that of the second semiconductor layers; forming a dielectric wall in the epitaxial stack; removing a first subset of the first semiconductor layers on a first side of the dielectric wall, while leaving a first subset of the second semiconductor layers on the first side of the dielectric wall; removing a second subset of the second semiconductor layers on a second side of the dielectric wall, while leaving a second subset of the first semiconductor layers on the second side of the dielectric wall; forming a first gate structure around the first subset of the second semiconductor layers; and forming a second gate structure around the second subset of the first semiconductor layers.
    Type: Application
    Filed: January 5, 2023
    Publication date: June 13, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Chih HOU, Chun-Jun LIN, Feng-Ming CHANG, Shu-Ning HSU
  • Publication number: 20240196074
    Abstract: This disclosure provides a lens assembly that has an optical path and includes a lens element and a light-blocking membrane layer. The lens element has an optical portion, and the optical path passes through the optical portion. The light-blocking membrane layer is coated on the lens element and adjacent to the optical portion. The light-blocking membrane layer has a distal side and a proximal side that is located closer to the optical portion than the distal side. The proximal side includes two extension structures and a recessed structure. Each of the extension structures extends along a direction away from the distal side, and the extension structures are not overlapped with each other in a direction in parallel with the optical path. The recessed structure is connected to the extension structures and recessed along a direction towards the distal side.
    Type: Application
    Filed: January 26, 2024
    Publication date: June 13, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Jyun-Jia CHENG, Yu Chen LAI, Ming-Ta CHOU, Cheng-Feng LIN, Chen-Yi HUANG
  • Publication number: 20240194730
    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a deep trench capacitor (DTC) having a portion within the substrate, and an interconnect structure over the DTC and the substrate. The interconnect structure includes a seal ring structure in electrical contact with the substrate, a first conductive via in electrical contact with the DTC, and a first conductive line electrically coupling the seal ring structure to the first conductive via.
    Type: Application
    Filed: February 23, 2024
    Publication date: June 13, 2024
    Inventors: Chun-Hsiung Tsai, Shahaji B. More, Yu-Ming Lin, Clement Hsingjen Wann
  • Publication number: 20240196032
    Abstract: The present disclosure relates to a system, a method and a computer-readable medium for distribution time suggestion. The method includes obtaining a first list of viewers in association with a first distributor; obtaining data of the viewers in the first list; obtaining a second list of distributors in association with the viewers in the first list; obtaining data of the distributors in the second list; and determining a distribution time for the first distributor according to the data of the viewers in the first list and the data of the distributors in the second list.
    Type: Application
    Filed: August 2, 2023
    Publication date: June 13, 2024
    Inventors: Chi-Wei LIN, Yung-Chi HSU, Shao-Tang CHIEN
  • Publication number: 20240196759
    Abstract: A method of manufacturing a magnetoresistive random access memory, including forming a conductive plug in a substrate, forming a bottom electrode material layer, a magnetic tunnel junction material layer and a top electrode material layer on the substrate and the conductive plug, and performing an anisotropic etch process to pattern the bottom electrode material layer, the magnetic tunnel junction material layer and the top electrode material layer, thereby forming a magnetic memory cell on the conductive plug, wherein the anisotropic etch process overetches the conductive plug and the substrate so that a notched portion is formed on one side of an upper edge of the conductive plug, and depressed regions are formed on the substrate at two sides of the magnetic memory cell.
    Type: Application
    Filed: February 21, 2024
    Publication date: June 13, 2024
    Applicant: UNITE MICROELECTRONICS CORP.
    Inventors: Hung-Chan Lin, Yu-Ping Wang, Hung-Yueh Chen
  • Publication number: 20240196307
    Abstract: Various solutions for enhanced closed access group (CAG) selection in manual network selection mode are described. An apparatus may determine that the apparatus supports CAG and operates in a manual network selection mode. The apparatus may detect a CAG cell associated with a CAG identifier (ID) in an allowed CAG list. The apparatus may indicate to a user whether the CAG ID is authorized based on time validity information associated with the CAG ID in the allowed CAG list.
    Type: Application
    Filed: November 28, 2023
    Publication date: June 13, 2024
    Inventors: Yuan-Chieh Lin, Chia-Lin Lai
  • Publication number: 20240194724
    Abstract: A light-emitting device comprises a substrate; a first light-emitting unit and a second light-emitting unit formed on the substrate, each of the first light-emitting unit and the second light-emitting unit comprises a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first light-emitting unit comprises a first semiconductor mesa and a first surrounding part surrounding the first semiconductor mesa, and the second light-emitting unit comprises a second semiconductor mesa and a second surrounding part surrounding the second semiconductor mesa; a trench formed between the first light-emitting unit and the second light-emitting unit and exposing the substrate; a first insulating layer comprising a first opening on the first surrounding part and a second opening on the second semiconductor layer of the second light-emitting unit; and a connecting electrode comprising a first connecting part on the first
    Type: Application
    Filed: February 15, 2024
    Publication date: June 13, 2024
    Inventors: Chao-Hsing CHEN, I-Lun MA, Bo-Jiun HU, Yu-Ling LIN, Chien-Chih LIAO