Patents by Inventor An Lin

An Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12021171
    Abstract: A micro light emitting diode including an epitaxy layer, a first pad, a second pad, a first ohmic contact metal, a second ohmic contact metal and at least one etch protection conductive layer is provided. The first pad and the second pad are electrically connected to a first type semiconductor layer and a second type semiconductor layer of the epitaxy layer, respectively. The first ohmic contact metal is disposed between the first type semiconductor layer and the first pad. The second ohmic contact metal is disposed between the second type semiconductor layer and the second pad. The at least one etch protection conductive layer is disposed between the first ohmic contact metal and the first pad and/or between the second ohmic contact metal and the second pad. A display panel is also provided.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: June 25, 2024
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Tzu-Yang Lin, Yen-Chun Tseng, Yun-Syuan Chou, Fei-Hong Chen, Pai-Yang Tsai, Jian-Zhi Chen
  • Patent number: 12021367
    Abstract: A protection circuit applied in a hub chip including a power pin, a first data pin, and a second data pin is provided. A voltage generation circuit generates and adjusts output voltage according to the voltage of the power pin and the voltage of the first data pin. A PMOS transistor includes a first gate, a first electrode, a second electrode, and a first bulk. The first electrode is coupled to the power pin. The second electrode is coupled to the first data pin. The first bulk receives the output voltage. A detection circuit is coupled to the first gate and detects the voltage of the power pin. In response to the voltage of the power pin being equal to the first voltage, the detection circuit transmits the voltage of the first data pin to the first gate.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: June 25, 2024
    Assignee: VIA LABS, INC.
    Inventors: Hsiao Chyi Lin, Chia Ming Tu, Yi Shing Lin, Shao-Yu Chen
  • Patent number: 12021564
    Abstract: A compact tunable optical true time delay consists of an optical subassembly to apply dispersion-free time delay to the input optical signal, and a mechanical subassembly to facilitate tuning the delay using a linear actuator. The deployment of a precision optical ferrule sliding in a precision split sleeve offers a self-contained and inexpensive method to minimize optical misalignment during the tuning process, which releases the burden of the mechanical subassembly and is also advantageous in keeping the device compact. The exterior dimension remains unchanged at any moment despite the interior motion. Both reflection-type and transmission-type optical time delays are introduced, driven either manually or electrically.
    Type: Grant
    Filed: December 13, 2022
    Date of Patent: June 25, 2024
    Assignee: Lightel Technologies, Inc.
    Inventors: Shyh-Chung Lin, Hongyu Hu, Yong Mao
  • Patent number: 12020917
    Abstract: A method for modifying magnetic field distribution in a deposition chamber is disclosed. The method includes the operations of providing a target magnetic field distribution, removing a first plurality of fixed magnets in the deposition chamber, replacing each of the first plurality of fixed magnets with respective ones of a second plurality of magnets, performing at least one of adjusting a position of at least one of the second plurality of the magnets, and adjusting a size of at least one of the second plurality of magnets, adjusting a magnetic flux of at least one of the second plurality of magnets, measuring the magnetic field distribution in the deposition chamber, and comparing the measured magnetic field distribution in the deposition chamber with the target magnetic field distribution.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: June 25, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Jie He, Shawn Yang, Szu-Hsien Lo, Shuen-Liang Tseng, Wen-Cheng Cheng, Chen-Fang Chung, Chia-Lin Hsueh, Kuo-Pin Chuang
  • Patent number: 12021132
    Abstract: A device includes a substrate, channel layers over the substrate, a gate dielectric layer around the channel layers, a first work function metal layer around the gate dielectric layer, a second work function metal layer over the first work function metal layer, and a passivation layer between the first work function metal layer and the second work function metal layer. The passivation layer merges in space vertically between adjacent ones of the channel layers.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Chih-Hao Wang
  • Patent number: 12022086
    Abstract: Techniques for content-adaptive encoder configuration are described herein. In accordance with various embodiments, a device (e.g., a content-based toolset configurator) including a processor and a non-transitory memory receives one or more frames in a media stream and a performance target of an encoder. The content-based toolset configurator performs cycles of pre-analysis of the one or more frames to generate content features within the performance target, assigns a content class to the one or more frames based on the content features, a previous classification, and the performance target, and sets configurations of the encoder for encoding the one or more frames corresponding to the content class and the performance target.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: June 25, 2024
    Assignee: SYNAMEDIA VIVIDTEC HOLDINGS, INC.
    Inventors: Stephen Warrington, Christopher Richard Warrington, Lin Zheng
  • Patent number: 12021145
    Abstract: A semiconductor device includes a first fin, a second fin, and a third fin protruding above a substrate, where the third fin is between the first fin and the second fin; a gate dielectric layer over the first fin, the second fin, and the third fin; a first work function layer over and contacting the gate dielectric layer, where the first work function layer extends along first sidewalls and a first upper surface of the first fin; a second work function layer over and contacting the gate dielectric layer, where the second work function layer extends along second sidewalls and a second upper surface of the second fin, where the first work function layer and the second work function layer comprise different materials; and a first gate electrode over the first fin, a second gate electrode over the second fin, and a third gate electrode over the third fin.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Neng Lin, Ming-Hsi Yeh, Hung-Chin Chung, Hsin-Yun Hsu
  • Patent number: 12022342
    Abstract: According to some embodiments, a method performed by a wireless device comprises: determining geographical location information of the wireless device with respect to each cell of a plurality of cells; adjusting a cell reselection ranking for the plurality of cells based on the geographical location information for the plurality of cells; selecting a cell from the plurality of cells based on the adjusted ranking; and camping on the selected cell.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: June 25, 2024
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Olof Liberg, Talha Khan, Helka-Liina Määttänen, Xingqin Lin, Jonas Sedin
  • Patent number: 12021084
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a dielectric fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate isolation structure vertically disposed above the dielectric fin. The semiconductor device includes a gate structure extending along a second direction perpendicular to the first direction. The gate structure includes a first portion and a second portion separated by the gate isolation structure and the dielectric fin. The first portion of the gate structure presents a first beak profile and the second portion of the gate structure presents a second beak profile. The first and second beak profiles point toward each other.
    Type: Grant
    Filed: June 29, 2023
    Date of Patent: June 25, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chih-Han Lin, Ming-Ching Chang, Shu-Yuan Ku, Tzu-Chung Wang
  • Patent number: 12021902
    Abstract: Systems and methods are provided for evaluation of communication paths through networks to determine whether communication is permitted across one or more internal network boundaries. The analysis may be used to determine whether a node in one isolated network (e.g., VPC, VPN, client on-premise network, etc.) is able to communicate with a node in another isolated network across region and/or segment boundaries. The automated analysis can allow users (e.g., network administrators) to see what high-level policies (e.g., Cloud WAN policies written in a declarative language) are interfering with or permitting communication between the nodes.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: June 25, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Baihu Qian, Bashuman Deb, Justin Lin Hsieh, Daniel William Dacosta, Nick Matthews, Viktor Heorhiadi, Lalith Kumar Ramamoorthi, Anoop Dawani, Omer Hashmi, Thomas Nguyen Spendley
  • Patent number: 12022659
    Abstract: In an embodiment, a device includes: a source line extending in a first direction; a bit line extending in the first direction; a back gate between the source line and the bit line, the back gate extending in the first direction; a channel layer surrounding the back gate; a word line extending in a second direction, the second direction perpendicular to the first direction; and a data storage layer extending along the word line, the data storage layer between the word line and the channel layer, the data storage layer between the word line and the bit line, the data storage layer between the word line and the source line.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han Lin, Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Yu-Ming Lin, Chung-Te Lin
  • Patent number: 12021657
    Abstract: A first provider edge device may receive device information from a second provider edge device included in an Ethernet virtual private network (EVPN). The device information may identify a media access control (MAC) address and may indicate that the device is connected to the second provider edge device. The first provider edge device may receive data transmitted by the device and may determine, based on information included in the data, that the device has moved from the second provider edge device to the first provider edge device. The first provider edge device may generate a data packet including mobility information indicating that the device has moved to the first provider edge device. The first provider edge device may transmit, via a data plane of the EVPN, the data packet to the second provider edge device to permit the second provider edge device to update routing information for the device.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: June 25, 2024
    Assignee: Juniper Networks, Inc.
    Inventors: Wen Lin, Ravi Shekhar, Vamshi Krishna Voruganti, Aldrin Isaac, SelvaKumar Sivaraj, Sean A. Mentzer, John E. Drake
  • Patent number: 12021465
    Abstract: The present disclosure provides a DC motor driving system including a DC motor, a power supply device, a switch circuit, and a microprocessor. The power supply device provides an input electrical energy. The switch circuit receives the input electrical energy and outputs a motor electrical energy, which includes a motor power and a motor voltage, to the DC motor. The DC motor driving system switchably works in a constant-voltage mode, a first variable-voltage mode, or a second variable-voltage mode. In the constant-voltage mode, the input electrical energy remains unchanged. In the first variable-voltage mode, the microprocessor controls the power supply device to adjust the input electrical energy for increasing the motor voltage and the motor power. In the second variable-voltage mode, the microprocessor controls the power supply device to adjust the input electrical energy for decreasing the motor voltage and keeping the motor power unchanged.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: June 25, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Sheng-Yu Wen, Cheng-Yi Lin, Yi-Han Yang, Ting-Yun Lu
  • Patent number: 12021636
    Abstract: Provided in implementations of the present invention are a method for determining a HARQ codebook, a terminal apparatus, and a network apparatus. The method for determining a HARQ codebook includes: a terminal apparatus determining a first channel group, wherein HARQ time sequence indication information corresponding to first channels in the first channel group indicates a first uplink resource; and the terminal apparatus determining, for the first uplink resource, a first HARQ codebook corresponding to the first channel group.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: June 25, 2024
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventors: Zuomin Wu, Yanan Lin
  • Patent number: 12021709
    Abstract: A method and apparatus for design and optimization of a network are described. A first deep neural network is used to obtain a function that represents a relationship between design parameters of the network and network performance metrics of the network. A second deep neural network is used to obtain a subset of one or more candidate network deployment configurations that optimize the performance metrics for the network. An optimal candidate network deployment configuration for the network is selected from the subset of candidate network deployment configurations wherein the optimal candidate network deployment configuration maximizes performance of the network as defined based on the performance metrics.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: June 25, 2024
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Mohammad Mozaffari, Xingqin Lin, Talha Khan, Mehrnaz Afshang, Yun Chen
  • Patent number: 12021740
    Abstract: A plurality of switches may be arranged according to a spine and leaf topology in which each spine switch is connected to all leaf switches. A leaf switch includes a memory configured to store a plurality of policies, each of the plurality of policies being associated with a respective source identifier value and a respective destination address; a network interface communicatively coupled to one of the spine switches; and a processor implemented in circuitry and configured to: receive a packet from the spine switch via the network interface, the packet being encapsulated with a Virtual Extensible Local Area Network (VXLAN) header; extract a source identifier value from the VXLAN header; determine a destination address for the packet; determine a policy of the plurality of policies to apply to the packet according to the source identifier value and the destination address; and apply the policy to the packet.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: June 25, 2024
    Assignee: Juniper Networks, Inc.
    Inventors: Prasad Miriyala, Wen Lin, Suresh Palguna Krishnan, SelvaKumar Sivaraj, Kumuthini Ratnasingham
  • Patent number: 12021410
    Abstract: A three-phase uninterruptible power system and an operation method thereof are provided. The three-phase uninterruptible power system comprises a DC bus, three power conversion circuits and a control circuit. When the three-phase uninterruptible power system enters a line mode from a battery mode, the control circuit performs a huge current suppression for each power conversion circuit according to a predetermined sequence. The huge current suppression performed for any of the power conversion circuits comprises the following steps: disabling the DC-DC conversion of the power conversion circuit, and having the other two power conversion circuits to additionally share the original load of the disabled power conversion circuit; and after the DC-DC conversion of the power conversion circuit is disabled, enabling the AC-DC conversion of the power conversion circuit, and having the power conversion circuits revert to their original load.
    Type: Grant
    Filed: March 3, 2023
    Date of Patent: June 25, 2024
    Assignee: CYBER POWER SYSTEMS, INC.
    Inventors: Jung-Hua Weng, Ming-Chuan Lin
  • Patent number: 12021796
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. In certain configurations, the apparatus may be a user equipment (UE). The apparatus may receive configuration information for UL and DL transmissions from another device such as a base station. The apparatus may determine a maximum duty cycle of the UL transmission based on the configuration information. Based on the determined UL maximum duty cycle, the apparatus may determine a transmit power limit for the UL transmission. In one aspect, the apparatus may determine the UL transmit power limit by dividing the power corresponding to a maximum permissible exposure (MPE) limit by the determined maximum UL duty cycle. The apparatus may leverage the forward knowledge of the UL duty cycle to transmit at a power level that complies with the MPE limit while avoiding the poor uplink range associated with static power back-off.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: June 25, 2024
    Assignee: QUALCOMM INCORPORATED
    Inventors: Junsheng Han, Udara Fernando, Lin Lu, John Forrester, Mingming Cai, Tao Luo, Raghu Narayan Challa
  • Patent number: 12022213
    Abstract: Embodiments relate to image signal processors (ISP) that include binner circuits that down-sample an input image. An input image may include a plurality of pixels. The output image of the binner circuit may include a reduced number of pixels. The binner circuit may include a plurality of different operation modes. In a bin mode, the binner circuit may blend a subset of input pixel values to generate an output pixel quad. In a skip mode, the binner circuit may select one of the input pixel values as the output pixel. The selection may be performed randomly to avoid aliasing. In a luminance mode, the binner circuit may take a weighted average of a subset of pixel values having different colors. In a color value mode, the binner circuit may select one of the colors in a subset of pixel values as an output pixel value.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: June 25, 2024
    Assignee: APPLE INC.
    Inventors: Sheng Lin, D. Amnon Silverstein, David R. Pope
  • Patent number: 12022403
    Abstract: Embodiments of the present application provide a method and a device for determining a power control offset for a PUCCH, for resolving the technical issue in which existing methods for determining a power control offset for a PUCCH are incompatible with new radio communications systems. The method comprises: determining the number of bits, OUCI, of first uplink control information (UCI) required to be transmitted on a PUCCH, and determining the number, NRE, of resource elements (RE) carrying the first UCI in the PUCCH; and determining, according to formula (I), an offset ?PUCCH_TF,c(i) for calculation of power control of the PUCCH, wherein g(OUCI/NRE) is a function having OUCI and NRE as variables thereof.
    Type: Grant
    Filed: November 24, 2022
    Date of Patent: June 25, 2024
    Assignee: DATANG MOBILE COMMUNICATIONS EQUIPMENT CO., LTD.
    Inventors: Di Zhang, Fang-Chen Cheng, Xiangli Lin