Abstract: A video indexing method, a video indexing apparatus, and a computer readable medium are disclosed. The video indexing apparatus comprises a generation module, a calculation module and a construction module. The generation module generates a frame movement analysis graphics according to a plurality of analysis points corresponding to a plurality of video frames of a video record. The calculation module calculates a plurality of frame movement velocities corresponding to the video frames according to the frame movement analysis graphics. The construction module constructs an indexing graphics of the video record according to the frame movement velocities.

Abstract: One embodiment of the disclosure provides a kit for detecting a mutation and/or polymorphism of a specific region in a target nucleotide sequence, including: at least one first primer consisting of a first segment and a second segment, wherein the first segment is a complementary strand of a first sequence and the second segment is a second sequence, and the 3? end of the first segment connects to the 5? end of the second segment; a second primer being a third sequence; at least one third primer consisting of a third segment and a fourth segment, wherein the third segment is a fourth sequence and the fourth segment is a complementary strand of a fifth sequence, and the 3? end of the third segment connects to the 5? end of the fourth segment; and a fourth primer being a complementary strand of a sixth sequence, wherein the specific region includes rs1799853, rs1057910, rs2108622, rs9923231 and rs9934438.

Abstract: A semiconductor structure, a resistive random access memory unit structure, and a manufacturing method of the semiconductor structure are provided. The semiconductor structure includes an insulating structure, a stop layer, a metal oxide layer, a resistance structure, and an electrode material layer. The insulating structure has a via, and the stop layer is formed in the via. The metal oxide layer is formed on the stop layer. The resistance structure is formed at a bottom of an outer wall of the metal oxide layer. The electrode material layer is formed on the metal oxide layer.

Abstract: An overload protection device, comprising: a first heating band (i.e. terminal), a second heating band, a bimetallic strip, and a litzendraht wire; the lower part of the first heating band is mechanically connected to the lower part of the bimetallic strip; and the two ends of the litzendraht wire are respectively and mechanically connected to the upper part of the second heating band and the upper part of the bimetallic strip.

Abstract: A draining device for a machine tool, which is assembled in a drain hole of a base of the machine tool, includes a ball, an outer shell, a sealing member and a flat head screw. The ball has a through hole defined therein. The outer shell has a receiving hole and the ball is received in the receiving hole of the outer shell. The sealing member has a guiding hole defined therethrough. The sealing member is inserted in the receiving hole of the outer shell and abutting against the ball with one end. The flat head screw is screwed in the base and a head portion of the flat head screw presses a top end of the outer shell. Under this arrangement, the ball is rotatable relative to the outer shell so as to adjust an angle of the through hole of the ball.

Abstract: Provided is an operation method applicable to a resistive memory cell including a transistor and a resistive memory element. The operation method includes: in a programming operation, generating a programming current flowing through the transistor and the resistive memory element so that a resistance state of the resistive memory element changes from a first resistance state into a second resistance state; and in an erase operation, generating an erase current from a well region of the transistor to the resistive memory element but keeping the erase current from flowing through the transistor, so that the resistance state of the resistive memory element changes from the second resistance state into the first resistance state.

Abstract: A semiconductor structure, a resistive random access memory unit structure, and a manufacturing method of the semiconductor structure are provided. The semiconductor structure includes an insulating structure, a stop layer, a metal oxide layer, a resistance structure, and an electrode material layer. The insulating structure has a via, and the stop layer is formed in the via. The metal oxide layer is formed on the stop layer. The resistance structure is formed at a bottom of an outer wall of the metal oxide layer. The electrode material layer is formed on the metal oxide layer.

Abstract: Disclosed is a controlling method for fixing a scale ratio of browsing images of a touch device. The controlling method comprises the steps of: determining a zooming region on a display screen, which is determined by pinching the browsing image from a selected position to thus zoom in or zoom out the browsing image, and the scale ratio of zooming is accordingly determined; displaying a screen-locking icon on the display screen, wherein the scale ratio is locked when the screen-locking icon is triggered to be in a locking state; and displaying the other browsing images with the same scale ratio of zooming and with a viewing size same as the zooming region.

Abstract: A rack-style computer system is provided. The computer system includes a first server, a second server, and a power distribution unit (PDU). The PDU supplies power to the first server and the second server and monitors the power supplied to the first server and the second server and obtains a power sum value. The first server determines whether the power sum value exceeds a predetermined threshold, and if the determination is affirmative, the first server performs a power throttling.

Abstract: An electrophoretic display system includes an electrophoretic display panel, a timing controller, a data driver, and a gate driver. The data driver includes a first serial-to-parallel converter and a data converter. The first serial-to-parallel converter receives a plurality of first series data and converts the first series data into a plurality of second series data. The quantity of the second series data is more than the quantity of the first series data. The data converter receives the second series data and is electrically connected to the electrophoretic display panel. Besides, the data converter converts the second series data into display voltages, and the quantity of the display voltages is more than the quantity of the second series data. The gate driver is electrically connected to the electrophoretic display panel and the timing controller and controlled by the timing controller to provide gate driving voltages to the electrophoretic display panel.

Abstract: The present invention provides a method for inducing chronic elevation of intraocular pressure in the eyes of an animal by introducing into the eyes a cross-linking hydrogel, an animal produced by this method, as well as a screening method useful for identifying compounds capable of modulating intraocular pressure as well as for identifying compounds capable of modulating retinal ganglion cell survival and/or regeneration.

Abstract: The present application is provided a personalized exercise simulation system. The system includes a microprocessor, an equipment adjustment unit, a displayer, a reality controlling parameter transmitting port, a reality controlling parameter unit, a reality image unit, a path trajectory data memory, a displayer, a controlling instruction outputting port. The microprocessor acquires a path coordinate, path parameter from the reality controlling parameter unit and an equipment adjustment instruction produced by the equipment adjustment unit. Then the processor outputs the instruction to the exercise device by the outputting port to adjust one of speed, gradient, or resistance of the exercise device. Meanwhile, the microprocessor acquires a reality image corresponded to the path coordinate from the reality image unit, and then display the reality image on the displayer. The present application further includes one of a camera device, a position system, or one piece of map information.

Abstract: A programmable metallization device comprises a first electrode and a second electrode, and a first dielectric layer, a second dielectric layer, and an ion-supplying layer in series between the first and second electrodes. In operation, a conductive bridge is formed or destructed in the first dielectric layer to represent a data value. During read, a read bias is applied that is sufficient to cause formation of a transient bridge in the second dielectric layer, and make a conductive path through the cell if the bridge is present in the first dielectric layer. If the bridge is not present in the first dielectric layer during the read, then the conductive path is not formed. Upon removal of the read bias voltage any the conductive bridge formed in the second dielectric layer is destructed while the conductive bridge in the corresponding other first dielectric layer, if any, remains.

Abstract: The present invention provides a method, apparatus and a program relating to an enhanced TDD UL HARQ timeline for UL-DL coexistence scenario. The present invention includes transmitting data in a first transmission, receiving acknowledgement information for Hybrid Automatic Repeat-Request pursuant to uplink-downlink configurations 0 or 6 in Time-Division-Duplex mode for LTE, determining the timing of a second transmission associated with a process for HARQ and transmitting data in a second transmission in the subframe according to the determined timing, wherein a second transmission associated with a process for Hybrid Automatic Repeat-Request is performed in a protected subframe if the first transmission associated with said process is performed in a protected subframe.

Abstract: In an MRI method and apparatus a scan sequence is performed to obtain a positive-phase image and an opposed-phase image. Magnetic field errors in the positive-phase image and the opposed-phase image are corrected. On the basis of multiple fat peaks of the spectrum of a magnetic resonance image signal, using the positive-phase image and the opposed-phase image to reconstruct a water image and a fat image. Artifacts caused by chemical shift can be reduced by using multiple fat peaks in the spectrum of a magnetic resonance image signal to reconstruct a water image and a fat image.

Abstract: The present disclosure provides a pair of NMOSFET switches connected in series, an output filter, a control circuit, a boot-strap capacitor and a disabling circuit. A high-side MOSFET switch is coupled to an input voltage. A low-side MOSFET switch is coupled to a ground. The high-side MOSFET switch and the low-side MOSFET switch have complementary duty cycles. The output filter is coupled to the NMOSFET switches to provide an output voltage. The boot-strap capacitor is coupled to the source of the high-side MOSFET switch. The voltage crossing the boot-trap capacitor is for making the gate voltage of the high-side MOSFET switch to be higher than the input voltage. The disabling circuit senses the voltage crossing the boot-strap capacitor, and generates a control signal to control the control circuit for continuously turning off the high-side MOSFET switch when the voltage crossing the boot-strap capacitor is less than a threshold voltage.

Abstract: The present application is provided a personalized exercise simulation system. The system includes a microprocessor, an equipment adjustment unit, a displayer, a reality controlling parameter transmitting port, a reality controlling parameter unit, a reality image unit, a path trajectory data memory, a displayer, a controlling instruction outputting port. The microprocessor acquires a path coordinate, path parameter from the reality controlling parameter unit and an equipment adjustment instruction produced by the equipment adjustment unit. Then the processor outputs the instruction to the exercise device by the outputting port to adjust one of speed, gradient, or resistance of the exercise device. Meanwhile, the microprocessor acquires a reality image corresponded to the path coordinate from the reality image unit, and then display the reality image on the displayer. The present application further includes one of a camera device, a position system, or one piece of map information.

Abstract: The invention provides a semiconductor device and associated method, which includes a substrate, a first die, multiple sub-package systems surrounding the first die, and a heat spreader. The first die and the sub-package systems are installed on a same surface of the substrate, wherein projections of the first die and each sub-package system on the surface partially overlap, and have a portion not overlapping. Each of the sub-package systems includes an interposer and multiple second dice installed on the interposer by way of flip-chip. The heat spreader includes a protrusion portion and a dissipation plate; the dissipation plate covers the first die and the sub-package systems, and the protrusion portion is set between the dissipation plate and the first die.

Abstract: A rack-style computer system is provided. The computer system includes a first server, a second server, and a power distribution unit (PDU). The PDU supplies power to the first server and the second server and monitors the power supplied to the first server and the second server and obtains a power sum value. The first server determines whether the power sum value exceeds a predetermined threshold, and if the determination is affirmative, the first server performs a power throttling.

Abstract: Provided is an operation method applicable to a resistive memory cell including a transistor and a resistive memory element. The operation method includes: in a programming operation, generating a programming current flowing through the transistor and the resistive memory element so that a resistance state of the resistive memory element changes from a first resistance state into a second resistance state; and in an erase operation, generating an erase current from a well region of the transistor to the resistive memory element but keeping the erase current from flowing through the transistor, so that the resistance state of the resistive memory element changes from the second resistance state into the first resistance state.