Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. In certain embodiments, the substrate can be biased during selective inhibition. Process parameters including bias power, exposure time, plasma power, process pressure and plasma chemistry can be used to tune the inhibition profile. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate/wordline fill, and 3-D integration using through-silicon vias.

Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. The methods include performing multi-stage inhibition treatments including intervals between stages. One or more of plasma source power, substrate bias power, or treatment gas flow may be reduced or turned off during an interval. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.

Abstract: The methods, systems and apparatus described herein relate to chamber conditioning for remote plasma processes, in particular remote nitrogen-based plasma processes. Certain implementations of the disclosure relate to remote plasma inhibition processes for feature fill that include chamber conditioning. Embodiments of the disclosure relate to exposing remote plasma processing chambers to fluorine species prior to nitrogen-based remote plasma processing of substrates such as semiconductor wafers. Within-wafer uniformity and wafer-to-wafer uniformity is improved.

Abstract: Provided herein are methods of tungsten nitride (WN) deposition. Also provided are stacks for tungsten (W) contacts to silicon germanium (SiGe) layers and methods for forming them. The stacks include SiGe/tungsten silicide (WSix)/WN/W layers, with WSix providing an ohmic contact between the SiGe and WN layers. Also provided are methods for reducing fluorine (F) attack of underlying layers in deposition of W-containing films using tungsten hexafluoride (WF6). Apparatuses to perform the methods are also provided.

Abstract: Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) word lines. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate/word line fill, and 3-D integration with through-silicon vias (TSVs).

Abstract: Provided herein are methods of tungsten nitride (WN) deposition. Also provided are stacks for tungsten (W) contacts to silicon germanium (SiGe) layers and methods for forming them. The stacks include SiGe/tungsten silicide (WSix)/WN/W layers, with WSix providing an ohmic contact between the SiGe and WN layers. Also provided are methods for reducing fluorine (F) attack of underlying layers in deposition of W-containing films using tungsten hexafluoride (WF6). Apparatuses to perform the methods are also provided.

Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. The methods include performing multi-stage inhibition treatments including intervals between stages. One or more of plasma source power, substrate bias power, or treatment gas flow may be reduced or turned off during an interval. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.

Abstract: Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) word lines. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate/word line fill, and 3-D integration with through-silicon vias (TSVs).

Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. Pre-inhibition and post-inhibition treatments are used to modulate the inhibition effect, facilitating feature fill using inhibition across a wide process window. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.

Abstract: Methods and apparatuses for filling features with metal materials such as tungsten-containing materials in a substantially void-free manner are provided. In certain embodiments, the method involves depositing an initial layer of a metal such as a tungsten-containing material followed by removing a portion of the initial layer to form a remaining layer, which is differentially passivated along the depth of the high-aspect ratio feature. The portion may be removed by exposing the tungsten-containing material to a plasma generated from a fluorine-containing nitrogen-containing gas and pulsing and/or ramping the plasma during the exposure.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein. Methods involve introducing an activation gas at a chamber pressure and/or applying a bias using a bias power selected to preferentially etch the metal at or near the opening of the feature relative to the interior region of the feature. Apparatuses include integrated hardware for performing deposition of metal and atomic layer etching of metal in the same tool and/or without breaking vacuum.

Abstract: The methods, systems and apparatus described herein relate to chamber conditioning for remote plasma processes, in particular remote nitrogen-based plasma processes. Certain implementations of the disclosure relate to remote plasma inhibition processes for feature fill that include chamber conditioning. Embodiments of the disclosure relate to exposing remote plasma processing chambers to fluorine species prior to nitrogen-based remote plasma processing of substrates such as semiconductor wafers. Within-wafer uniformity and wafer-to-wafer uniformity is improved.

Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. Pre-inhibition and post-inhibition treatments are used to modulate the inhibition effect, facilitating feature fill using inhibition across a wide process window. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.

Abstract: Methods and apparatuses for filling features with metal materials such as tungsten-containing materials in a substantially void-free manner are provided. In certain embodiments, the method involves depositing an initial layer of a metal such as a tungsten-containing material followed by removing a portion of the initial layer to form a remaining layer, which is differentially passivated along the depth of the high-aspect ratio feature. The portion may be removed by exposing the tungsten-containing material to a plasma generated from a fluorine-containing nitrogen-containing gas and pulsing and/or ramping the plasma during the exposure.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: Methods for etching tungsten and other metal or metal-containing films using a nitrogen-containing etchant gas are provided. The methods involve exposing the film to a continuous wave (CW) plasma and switching to a pulsed plasma toward the end of the etching operation. The pulsed plasma has a lower concentration of nitrogen radicals and can mitigate the effects of nitridation on the tungsten surface. In some embodiments, subsequent deposition on etched surfaces is performed with no nucleation delay. Apparatuses for performing the methods are also provided.

Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to ammonia vapor in a non-plasma process. Process parameters including exposure time, substrate temperature, and chamber pressure can be used to tune the inhibition profile. Also provided are methods of filling multiple adjacent lines with reduced or no line bending. The methods involve selectively inhibiting the tungsten nucleation to reduce sidewall growth during feature fill.

Abstract: Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) word lines. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate/word line fill, and 3-D integration with through-silicon vias (TSVs).

Abstract: Provided are methods of void-free tungsten fill of high aspect ratio features. According to various embodiments, the methods involve a reduced temperature chemical vapor deposition (CVD) process to fill the features with tungsten. In certain embodiments, the process temperature is maintained at less than about 350° C. during the chemical vapor deposition to fill the feature. The reduced-temperature CVD tungsten fill provides improved tungsten fill in high aspect ratio features, provides improved barriers to fluorine migration into underlying layers, while achieving similar thin film resistivity as standard CVD fill. Also provided are methods of depositing thin tungsten films having low-resistivity. According to various embodiments, the methods involve performing a reduced temperature low resistivity treatment on a deposited nucleation layer prior to depositing a tungsten bulk layer and/or depositing a bulk layer via a reduced temperature CVD process followed by a high temperature CVD process.

Abstract: Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) word lines. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate/word line fill, and 3-D integration with through-silicon vias (TSVs).