Patents by Inventor Anand Kumar
Anand Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250111096Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to protect against voltage glitch attacks in microcontrollers. An example apparatus includes logic circuitry operable to, in response to a voltage glitch, pause processing circuitry; number generator circuitry operable to generate a number; a counter operable to, after the voltage glitch ends, adjust a count corresponding to the number; and the logic circuitry operable to unpause the processing circuitry after the count reaches a value.Type: ApplicationFiled: October 2, 2023Publication date: April 3, 2025Inventors: Veeramanikandan Raju, Anand Kumar G
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Publication number: 20250111139Abstract: A method, apparatus, non-transitory computer readable medium, and system for generating a design document from a text prompt include obtaining a design prompt that describes a document type and selecting a design template for the document type based on the design prompt. An image generation model generates an image for the design template based on the design prompt and a design document is generated based on the design template. The design document has the document type and includes the image at a location indicated by the design template.Type: ApplicationFiled: October 1, 2024Publication date: April 3, 2025Inventors: Ionut Mironicä, Oliver Brdiczka, Ashutosh Sharma, Anand Khanna, Stefan Daniel Dumitrescu, Nikolaos Vlassis, Alok Kumar Singh
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Publication number: 20250110779Abstract: Example aspects include techniques for providing an auditable mechanism for internal services to transact on tenant entities. These techniques may include receiving, from an internal service, by an assistant service, a service request to perform a cloud computing action over tenant data of a tenant of a cloud computing environment. In addition, the techniques may include identifying, by the assistant service, an existing principal of the assistant service within the tenant and possession of an existing permission associated with performing the cloud computing action within the tenant of the cloud computing environment. Further, the techniques may include performing the cloud computing action on behalf of the internal service based on identifying the existing principal and possession of the existing permission.Type: ApplicationFiled: September 28, 2023Publication date: April 3, 2025Inventors: Ram Kumar Donthula, Amber Bhargava, Anand Rengasamy, Wilco Gerardus Bernardus Bauwer, Grzegorz Andrzej Zygmunt, Jagdish Singh
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Patent number: 12267310Abstract: A system disclosed herein may receive, from an application associated with a client identification, a request to perform a cryptographic operation with a specified application key, identify a gateway associated with the client identification, identify a respective characteristic of each self-encrypting key management service of a plurality of self-encrypting key management services that correspond to the gateway, identify a self-encrypting key management service with a characteristic satisfying a threshold criterion, and send the request to the identified self-encrypting key management service.Type: GrantFiled: December 27, 2022Date of Patent: April 1, 2025Assignee: Fortanix, Inc.Inventors: Ambuj Kumar, Anand Kashyap, Jethro Gideon Beekman, Faisal Faruqui
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Piecewise correction of errors over temperature without using on-chip temperature sensor/comparators
Patent number: 12265414Abstract: A temperature dependent correction circuit includes a first supply source, a second supply source, a rectifying circuit, and a reference. The first supply source is configured to supply a first signal that varies with temperature along a first constant or continuously variable slope. The second supply source is configured to supply a second signal that varies with temperature along a second constant or continuously variable slope. The rectifying circuit is configured to receive the first and second signal, rectify the first signal to produce a first rectified signal, and add the first rectified signal to the second signal to produce a correction signal. The reference is configured to receive the correction signal.Type: GrantFiled: July 19, 2022Date of Patent: April 1, 2025Assignee: Texas Instruments IncorporatedInventors: Praful Kumar Parakh, Anand Kannan, Sunil Rafeeque -
Patent number: 12266422Abstract: A communications circuit with an input port, a switching circuit coupled to the input port, and a first and second memory coupled to the switching circuit. The communications circuit also includes controlling circuitry adapted to operate the switching circuit to couple data received at the input port to the first memory while the second memory is disabled from power and to couple data received at the input port to the second memory once the first memory is filled with valid data.Type: GrantFiled: March 20, 2024Date of Patent: April 1, 2025Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Veeramanikandan Raju, Anand Kumar G
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Publication number: 20250104703Abstract: An apparatus may comprise a memory communicatively coupled to a processor. The processor may be configured to receive a request to perform multiple data processing operations and determine multiple sub-dialogues corresponding to the request. The sub-dialogues are part of a plurality of IVR operations. The processor may be further configured to route the request to a microservice of the microservices based at least in part upon the sub-dialogues. The microservice may be configured to fulfill the request. The processor may generate a response to the request associated with the microservice, update publishing commands in accordance with one or more rules and policies in response to generating the response, and publish the first microservice. The publishing commands associated with the microservice may be updated in isolation from the rest of the microservices.Type: ApplicationFiled: September 27, 2023Publication date: March 27, 2025Inventors: Amiya R Sahoo, Scott S Randrup, Robert E Lutzkow, Sergey Alexandrov, Nipun Mahajan, Yogesh Raghuvanshi, Anand Daniel, Dinesh Kumar Agrawal, Dhiraj Jain, Chung Han, Ruma Balse, Sivakumar P Nagarajan
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Publication number: 20250100711Abstract: Vehicle systems and methods are provided for visually alerting a vehicle operator to a potential obstacle in the vicinity of a vehicle using an external lighting system associated with the vehicle. An exemplary method involves identifying an analysis portion of image data captured for a region external to the vehicle based at least in part on current status information associated with the vehicle, identifying an obstacle within the analysis portion of the image data based at least in part on ranging data for the analysis portion, and in response to identifying the obstacle, automatically adjusting an illumination axis associated with a lighting system to illuminate the obstacle, determining a current value for a contrast ratio associated with the obstacle relative to the analysis portion of the image data, and automatically adjusting one or more characteristics of the lighting system based at least in part on the current value.Type: ApplicationFiled: November 15, 2023Publication date: March 27, 2025Applicant: HONEYWELL INTERNATIONAL INC.Inventors: Saravana Venkatesh Narayana Samy, Gobinathan Baladhandapani, Anand Kutuva, Sunit Kumar Saxena
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Patent number: 12261568Abstract: Systems and methods for controlled application of hysteresis in crystal oscillator circuits are discussed. In various embodiments, an Integrated Circuit (IC) may include: an inverter comparator coupled to a crystal oscillator, where the inverter comparator is configured to: (i) receive an input of the crystal oscillator, and (ii) output a clock signal; and a hysteresis control circuit coupled to the inverter comparator, wherein the inverter comparator is configured to: (i) start up with hysteresis disabled, and (ii) enable hysteresis in response to a hysteresis enable signal provided by the hysteresis control circuit.Type: GrantFiled: November 14, 2023Date of Patent: March 25, 2025Assignee: NXP USA, Inc.Inventors: Anand Kumar Sinha, Siyaram Sahu, Ateet Omer, Vishwajit Babasaheb Bugade, Harish Eleendram, Nagaraju Sunkara
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Publication number: 20250098179Abstract: An IC device may include a CMOS layer and memory layers at the frontside and backside of the CMOS layer. The CMOS layer may include one or more logic circuits with MOSFET transistors. The CMOS layer may also include memory cells, e.g., SRAM cells. A memory layer may include one or more memory arrays. A memory array may include memory cells (e.g., DRAM cells), bit lines, and word lines. A logic circuit in the CMOS layer may control access to the memory cells. A memory layer may be bonded with the CMOS layer through a bonding layer that includes conductive structures coupled to a logic circuit in the CMOS layer or to bit lines or word lines in the memory layer. An additional conductive structure may be at the backside of a MOSFET transistor in the CMOS layer and coupled to a conductive structure in the bonding layer.Type: ApplicationFiled: September 15, 2023Publication date: March 20, 2025Inventors: Abhishek A. Sharma, Van H. Le, Fatih Hamzaoglu, Juan G. Alzate-Vinasco, Nikhil Jasvant Mehta, Vinaykumar Hadagali, Yu-Wen Huang, Honore Djieutedjeu, Tahir Ghani, Timothy Jen, Shailesh Kumar Madisetti, Jisoo Kim, Wilfred Gomes, Kamal Baloch, Vamsi Evani, Christopher Wiegand, James Pellegren, Sagar Suthram, Christopher M. Pelto, Gwang Soo Kim, Babita Dhayal, Prashant Majhi, Anand Iyer, Anand S. Murthy, Pushkar Sharad Ranade, Pooya Tadayon, Nitin A. Deshpande
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Publication number: 20250094549Abstract: Example aspects include techniques for providing a compliant and auditable approach for a user to perform an action without sufficient privileges. These techniques may include receiving, from a first user account, a first request to perform an action and determining that the first user account does not have permission to perform the action. In addition, the techniques may include identifying a second user account having permission to perform the action and transmitting, to the second user account, a second request for approval to perform the action. Further, the techniques may include performing in response to approval of the second request, the action without providing the permission to the first user account.Type: ApplicationFiled: September 20, 2023Publication date: March 20, 2025Inventors: Ram Kumar Donthula, Anand Rengasamy, Amber Bhargava, Braden Wade Watkins, Muaz Ahmed Mian, Umang Anandkumar Shah, Jordan Alexander Mryyan, Yulan He, Seunghwa Cha, Dhara Kishorkumar Patel
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Patent number: 12254423Abstract: Systems and methods are provided for dynamic selection of anomaly detection options for particular metric data. Metric data corresponding to one or more configuration items of an information technology (IT) infrastructure is collected. A selected anomaly detection action option that applies to the metric data is identified. An action is performed using the metric data, based upon the selected anomaly detection action option. A dashboard graphical user interface (GUI) display results of the action.Type: GrantFiled: August 8, 2022Date of Patent: March 18, 2025Assignee: ServiceNow, Inc.Inventors: Kanwaldeep K. Dang, Anand Nikhil Mehta, Kiran Kumar Bushireddy, Swapnesh Patel, Bnayahu Makovsky
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Publication number: 20250085730Abstract: In an example, a device includes a controller and a direct current (DC)-to-DC converter coupled to the controller and configured to provide a load current to a load. The device also includes a low-dropout (LDO) regulator coupled to the DC-to-DC converter. The controller includes digital logic, and the digital logic is configured to determine the load current. The digital logic is configured to turn on the LDO regulator if the load current is above a predetermined threshold. The digital logic is also configured to turn off the LDO regulator if the load current is below the predetermined threshold.Type: ApplicationFiled: November 22, 2024Publication date: March 13, 2025Inventors: Rinu MATHEW, Vineet KHURANA, Anand Kumar G, Aniruddha PERIYAPATNA NAGENDRA, Venkatesh KADLIMATTI, Torjus Lyng KALLERUD
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Publication number: 20250081035Abstract: Disclosed are systems and techniques for wireless communications. For example, a network device can divide a data package into a plurality of segments. The network device can transmit, to a plurality of wireless communication devices, a broadcast message indicating a first time to start receiving a plurality of subframes comprising the plurality of segments, a total number of the plurality of segments, and a total number of the plurality of subframes for the data package. The network device can transmit, to the plurality of wireless communication devices starting at the first time, the plurality of subframes comprising the plurality of segments.Type: ApplicationFiled: September 6, 2023Publication date: March 6, 2025Inventors: Rahul SANGWAN, Robin ROBIN, Deep Shikha AGGARWAL, Nicolas GRAUBE, Randhir KUMAR, Sonu LNU, Maitreyi GUPTA, Anand Mohan SINGH
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Publication number: 20250076966Abstract: A video headset comprises a left earphone assembly, a right earphone assembly, and a headband assembly having a headband frame. The headband frame comprises a left end portion movably coupled to the left earphone assembly and a right end portion movably coupled to the right earphone assembly. The headset comprises a video screen module connected to each earphone assembly via a boom module. The video screen module comprises video screens including a first video screen and a second video screen pivotally connected to a second video screen. The second video screen faces in an opposite direction from the first video screen. The headset enables to stream both audio and video data at the video screen module. The headset is further configured to connect with external devices and stream data from different external devices on different video screens. The headset has multiple cameras on the headset to enable 360 degree viewing.Type: ApplicationFiled: August 29, 2024Publication date: March 6, 2025Inventor: Anand Kumar Chavakula
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Patent number: 12242403Abstract: A system is presented that includes two data processing systems that are coupled via a network, each data processing system including a reconfigurable processor with a reconfigurable processor memory, a host that is coupled to the reconfigurable processor and that includes a host processor and a host memory that is coupled to the host processor, and a network interface controller (NIC) that is operatively coupled to the reconfigurable processor and to the host processor. The reconfigurable processor of one of the data processing systems is configured to implement a virtual function that uses a virtual address for a memory access operation. An application programming interface (API) in the host processor translates the virtual address into a physical address, and the NIC uses the physical address to initiate a direct memory access operation at the reconfigurable processor memory or the host memory of the other data processing system.Type: GrantFiled: March 14, 2023Date of Patent: March 4, 2025Assignee: SambaNova Systems, Inc.Inventors: Conrad Alexander Turlik, Sudhakar Dindukurti, Anand Misra, Arjun Sabnis, Milad Sharif, Ravinder Kumar, Joshua Earle Polzin, Arnav Goel, Steven Dai
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Publication number: 20250072110Abstract: A chip includes a merger cell including a first p-type length of diffusion (LOD) region extending in a first direction, a first n-well underneath the first p-type LOD region, a first supply rail configured to receive a first supply voltage, and a first n-tap coupling the first n-well to the first supply rail. The merger cell also includes a second p-type length of diffusion (LOD) region extending in the first direction, a second n-well underneath the second p-type LOD region, a second supply rail configured to receive a second supply voltage different from the first supply voltage, and a second n-tap coupling the second n-well to the second supply rail.Type: ApplicationFiled: August 23, 2023Publication date: February 27, 2025Inventors: Kamesh MEDISETTI, Sharad Kumar GUPTA, Sudesh Chandra SRIVASTAVA, Somesh AGARWAL, Udayakiran Kumar YALLAMARAJU, Anand Ashok BALIGATTI, Girish T P, Ankur MEHROTRA, Gousulu KANDUKURU, Abhinav CHAUHAN, Amit KASHYAP, Parissa NAJDESAMII
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Patent number: 12228680Abstract: Methods, apparatus, systems and articles of manufacture to compensate radar system calibration are disclosed. A radio-frequency (RF) subsystem having a transmit channel, a receive channel, and a loopback path comprising at least a portion of the transmit channel and at least a portion of the receive channel, a loopback measurer to measure a first loopback response of the RF subsystem for a first calibration configuration of the RF subsystem, and to measure a second loopback response of the RF subsystem for a second calibration configuration of the RF subsystem, and a compensator to adjust at least one of a transmit programmable shifter or a digital front end based on a difference between the first loopback response and the second loopback response to compensate for a loopback response change when the RF subsystem is changed from the first calibration configuration to the second calibration configuration.Type: GrantFiled: July 12, 2022Date of Patent: February 18, 2025Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Karthik Subburaj, Shankar Narayanamoorthy, Karthik Ramasubramanian, Anand Gadiyar, Dheeraj Kumar Shetty, Shailesh Joshi
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Publication number: 20250055446Abstract: A method for quadrature phase shifted clock generation with duty cycle correction includes A reference clock is delayed with a delay circuit to generate a delayed clock, wherein a delay of the delay circuit is proportional to a control value, and each of the reference clock and the delayed clock comprise a plurality of states comprising a first state and a second state. A first edge value is increased or decreased in response to a respective combination of states of the reference clock and the delayed clock. A second edge value is increased or decreased in response to a respective combination of states of the reference clock and the delayed clock. The control value is driven to the first edge value during the second state of the delayed clock and to the second edge value during the first state of the delayed clock.Type: ApplicationFiled: July 12, 2024Publication date: February 13, 2025Inventors: Vishwajit Babasaheb Bugade, Anand Kumar Sinha, Krishna Thakur, Siyaram Sahu
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Patent number: 12224710Abstract: A low power crystal oscillator circuit having a high power part and a low power part. Oscillation is initialized using the high power part. Once the crystal is under stable oscillation, the circuit switches to the low power part and continue operation for a long duration.Type: GrantFiled: September 7, 2023Date of Patent: February 11, 2025Assignee: STMicroelectronics International N.V.Inventors: Anand Kumar, Nitin Jain