Patents by Inventor Andre Schaefer

Andre Schaefer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit configuration
    Patent number: 6525977
    Abstract: A circuit configuration prevents a transfer of interference signals present on an input line to a processing section. Electrical input signals are evaluated in an analysis circuit which is connected in parallel with the actual reception circuit in a protection device. If an interference signal is present, a transfer circuit is controlled such that a transfer to the processing section is prevented.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: February 25, 2003
    Assignee: Infineon Technologies AG
    Inventor: Andre Schäfer
  • Wafer handling device
    Publication number: 20030033981
    Abstract: The present invention provides a wafer handling device having a base plate (G; G′), which has a first and a second supporting surface for a respective wafer (W1, W2) to be laid on; and a fixing device (K1, K2, S; K1′, K2′, S′) for the detachable fixing of the respective wafer (W1, W2) on the first and second supporting surface; the fixing device (K1, K2, S; K1′, K2′, S′) being configured in such a way that it contacts the respective wafer (W1, W2) only in the outer edge region of the side facing away from the supporting surface.
    Type: Application
    Filed: August 20, 2002
    Publication date: February 20, 2003
    Inventors: Andre Schaefer, Andrea Zuckerstaetter
  • Evaluation device for assessing a digital data signal, in particular a data signal for a semiconductor memory circuit
    Publication number: 20020196868
    Abstract: The invention relates to an evaluation device for assessing a digital data signal having a sampling device, a processing unit and a data memory. The sampling device is configured to sample the data signal multiply in a temporally offset manner within a predetermined time period and to store the samples of the data signal in the data memory. The processing unit is configured to output a data value of the data signal in a manner dependent on the samples at an output of the evaluation device.
    Type: Application
    Filed: June 24, 2002
    Publication date: December 26, 2002
    Inventors: Hermann Ruckerbauer, Andre Schaefer
  • Circuit configuration with protection device
    Patent number: 6476658
    Abstract: The circuit configuration, in particular a DRAM element, has a protection device for suppressing the formation and/or emission of a reflection signal caused by a received supply input signal. An active signal matching device is provided, with which it is possible to prevent the formation of a reflection signal by using the input signal.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: November 5, 2002
    Assignee: Infineon Technologies AG
    Inventor: Andre Schäfer
  • Voltage supply for semiconductor memory arrangement
    Publication number: 20020141274
    Abstract: The invention relates to a voltage supply arrangement for a semiconductor memory with a bus system (2) which is terminated on one side, wherein a terminating voltage supply (Vttn) and a terminating resistor (Rtermn) are integrated into a DRAM (Dn).
    Type: Application
    Filed: October 30, 2001
    Publication date: October 3, 2002
    Inventors: Martin Gall, Andre Schaefer
  • Method for masking DQ bits
    Publication number: 20020076872
    Abstract: A method for masking DQ bits that are input into a semiconductor memory by a memory controller is described. In this case, the bits to be masked are provided with an increased level and therefore cannot be read into the semiconductor memory due to the increased voltage level which functions as a deactivating voltage level.
    Type: Application
    Filed: October 16, 2001
    Publication date: June 20, 2002
    Inventors: Martin Gall, Andre Schaefer