Abstract: A method of aligning a wafer when lithographically fabricating a light-emitting diode (LED). The method includes forming on the wafer at least one roughened alignment mark having a root-mean-square (RMS) surface roughness ?S. The roughened alignment mark is formed as a consequence of forming a plasma etch to roughen a LED surface on which the wafer alignment mark resides. The method also includes imaging the at least one roughened wafer alignment mark with alignment light having a wavelength ?A that is in the range from about 2 ?S to about 8 ?S. The method also includes comparing the detected image to an alignment reference to establish wafer alignment. Once wafer alignment is established, p-contacts and n-contacts can be formed on the LED upper surface in their proper locations.

Abstract: Methods of performing laser spike annealing (LSA) in forming gallium nitride (GaN) light-emitting diodes (LEDs) as well as GaN LEDs formed using LSA are disclosed. An exemplary method includes forming atop a substrate a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method also includes performing LSA by scanning a laser beam over the p-GaN layer. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.

Abstract: Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with reach other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat treated, the initial microstructure of the circuit layer having unsuitable properties is transformed into one that exhibits electronic properties suitable for forming circuit feature therein. Also provided are three-dimensional circuit structures optionally formed by the inventive systems and/or processes.

Abstract: Sub-field enhanced global alignment (SEGA) methods for aligning reconstituted wafers in a lithography process are disclosed. The SEGA methods provide the ability to accommodate chip placement errors for chips supported by a reconstituted wafer when performing a lithographic process having an overlay requirement. The SEGA methods include measuring chip locations to determine sub-fields of the reconstituted wafer over which enhanced global alignment (EGA) can be performed on the chips therein to within the overlay requirement. The SEGA methods further included individually performing EGA over the respective sub-fields. The SEGA methods take advantage of the benefits of both EGA and site-by-site alignment and are particularly applicable to wafer-level packing lithographic processes such as fan-out wafer-level packaging.

Abstract: An LED-based UV illuminator is disclosed that includes a plurality of LED light sources that emit UV light, and a plurality of dichroic mirrors. The dichroic mirrors are arranged relative to the LED light sources and configured to direct the UV light along a common optical path. A light homogenizer, such as a light pipe, is arranged along the common optical path and acts to homogenize the UV light. The UV illuminator has a collection efficiency of greater than 50% and an illumination output equal to or greater than 850 mW/mm2. Lithography systems that utilize the LED-based UV illuminator are also disclosed.

Abstract: Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with reach other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat treated, the initial microstructure of the circuit layer having unsuitable properties is transformed into one that exhibits electronic properties suitable for forming circuit feature therein. Also provided are three-dimensional circuit structures optionally formed by the inventive systems and/or processes.

Abstract: Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a scan path. A first image may serve to effect spike annealing of the substrates while another may be used to provide auxiliary heat treatment to the substrates before and/or after the spike annealing. Control over the temperature profile of the prespike and/or postspike may also reduce stresses and strains generated in the wafers. Also provided are microelectronic devices formed using the inventive apparatuses and methods.

Abstract: Provided are methods for forming an electrically conductive structure of a desired three-dimensional shape on a substantially planar surface of a substrate, e.g., a semiconductor wafer. Typically, the particulate matter is deposited in a layer-by-layer manner and adhered to selected regions on the substrate surface. The particulate matter may be deposited to produce a mold for forming the structure and/or to produce the structure itself. A three-dimensional printer with associated electronic data may be used without the need of a lithographic mask or reticle.

Abstract: Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential.

Abstract: Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential.

Abstract: Apparatuses and methods are provided for processing a surface of a substrate. The substrate may have a surface pattern that exhibits directionally and/or orientationally different reflectivities relative to radiation of a selected wavelength and polarization. The apparatus may include a radiation source that emits a photonic beam of the selected wavelength and polarization directed toward the surface at orientation angle and incidence angle selected to substantially minimize substrate surface reflectivity variations and/or minimize the maximum substrate surface reflectivity during scanning. Also provided are methods and apparatuses for selecting an optimal orientation and/or incidence angle for processing a surface of a substrate.

Abstract: Methods and apparatuses are provided for improving the intensity profile of a beam image used to process a semiconductor substrate. At least one photonic beam may be generated and manipulated to form an image having an intensity profile with an extended uniform region useful for thermally processing the surface of the substrate. The image may be scanned across the surface to heat at least a portion of the substrate surface to achieve a desired temperature within a predetermined dwell time. Such processing may achieve a high efficiency due to the large proportion of energy contained in the uniform portion of the beam.

Abstract: Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential.

Abstract: Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential.

Abstract: Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential.

Abstract: A method of this invention includes annealing at least one region of a substrate with a short pulse of particles. The particles can be electrons, protons, alpha particles, other atomic or molecular ions or neutral atoms and molecules. The substrate can be composed of a semiconductor material, for example. The particles can include dopant atoms such as p-type dopant atoms such as boron (B), aluminum (Al), gallium (Ga), or indium (In), and n-type dopant atomic species including arsenic (As), phosphorus (P), or antimony (Sb). The particles can also include silicon (Si) or germanium (Ge) atoms or ionized gas atoms including those of hydrogen (He), oxygen (O), nitrogen (N), neon (Ne), argon (Ar), or krypton (Kr). The particles can be used to anneal dopant atoms previously implanted into the substrate.

Abstract: A radiation shield device (100) and method, the apparatus comprising either an absorbing shield (130), a scattering shield (200) or an absorbing and scattering shield (300) arranged in a processing tool (50) that irradiates a workpiece (70) with high-irradiance radiation (80) from a light source (78). The processing tool has a tool portion (66) having an irradiance damage threshold (IDT). The radiation shield device is designed to intercept a portion of the high-irradiance radiation that would otherwise be incident the tool portion, and to ensure that radiation exiting the particular shield comprising the radiation shield device and incident the tool portion has an irradiance below the tool portion irradiance damage threshold. The method includes using the radiation shield device in processing a workpiece using a processing tool.

Abstract: A method of, and apparatus for, defining disk tracks in magnetic recording media. The track-writing apparatus (20) is capable of forming tracks (340) with a track width (TW) and track spaces (350) with a space width (SW) on a magnetic media disk (70) having an upper surface (70S), wherein the disk comprises a magnetic medium with a thermal diffusion length (X). The apparatus comprises, in order along an optical axis (A1), a laser light source (30) capable of providing a pulsed laser light beam (B1), a light pipe (32), and illumination shaping optical system (40) that provides substantially uniform illumination over an exposure region (ER), and a phase plate (60) having a phase grating (210) with a grating period (p), arranged proximate and substantially parallel to the upper surface of the disk so as to form an periodic irradiance distribution (380) at the surface of the disk when the phase plate is illuminated with the exposure region.

Abstract: Method for controlling heat transferred to a workpiece (W) process region (30) from laser radiation (10) using a thermally induced reflectivity switch layer (60). A film stack (6) is formed having an absorber layer (50) atop the workpiece with a portion covering the process region. The absorber layer absorbs and converts laser radiation into heat. Reflective switch layer (60) is deposited atop the absorber layer. The reflective switch layer comprises one or more layers, e.g. thermal insulator and reflectivity transition layers. The reflective switch layer covering the process region has a temperature related to the temperature of the process region. Reflectivity of the switch layer changes from a low to a high reflectivity state at a critical temperature of the process region, limiting radiation absorbed by the absorber layer by reflecting incident radiation when switched. This limits the amount of heat transferred to the process region from the absorber layer.

Abstract: A radiation shield device (100) and method, the apparatus comprising either an absorbing shield (130), a scattering shield (200) or an absorbing and scattering shield (300) arranged in a processing tool (50) that irradiates a workpiece (70) with high-irradiance radiation (80) from a light source (78). The processing tool has a tool portion (66) having an irradiance damage threshold (IDT). The radiation shield device is designed to intercept a portion of the high-irradiance radiation that would otherwise be incident the tool portion, and to ensure that radiation exiting the particular shield comprising the radiation shield device and incident the tool portion has an irradiance below the tool portion irradiance damage threshold. The method includes using the radiation shield device in processing a workpiece using a processing tool.