Patents by Inventor Ariel Navon

Ariel Navon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220327244
    Abstract: A data storage device includes a memory device, an always on (AON) application specific integrated circuit (ASIC), and a controller coupled to the memory device and the AON ASIC. When the data storage device enters a low power state, the controller generates and stores security data associated with context data in a power management integrated circuit (PMIC). The context data is stored in both the memory device and a host memory buffer (HMB). A location of the context data in the HMB is stored in the PMIC with the security data. When the data storage device exits the low power state, the address stored in the PMIC is utilized to retrieve the context data from the HMB. The retrieved context data is verified against the security data by the controller.
    Type: Application
    Filed: April 7, 2021
    Publication date: October 13, 2022
    Inventors: Shay BENISTY, Judah Gamliel HAHN, Ariel NAVON
  • Patent number: 11449428
    Abstract: In the context of data storage, an approach to pre-fetching data prior to a read request involves receiving a read request and a next read request, and updating metadata corresponding to the read request with a next data storage address corresponding to the next read request. Responsive to again receiving the read request at a later time, the next data storage address can be read from the read request metadata and the next data can be pre-fetched from the next data storage address in advance of processing a following read request. Furthermore, the next data can be pre-fetched during read queue idle time and stored in a cache buffer, in anticipation of another incoming next read request, responsive to which the next data can be returned to the host from the buffer rather than from a read of non-volatile memory.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: September 20, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Shay Benisty, Ariel Navon, Tomer Eliash
  • Patent number: 11435914
    Abstract: A storage device includes a controller that can dynamically adjust the zone active limit (ZAL) for a zoned namespace (ZNS). Rather than assuming a worst-case scenario for the ZNS, the ZAL can be dynamically adjusted, even after providing the ZAL to a host device. In so doing, device behavior changes due to factors such as temperature, failed or flipped bit count, and device cycling can be considered as impacting the ZAL. The ZAL can then be adjusted over time, and the new ZAL can be communicated to the host device. As such, rather than a fixed, worst-case ZAL, the host device will receive updated ZAL values over time as the device performs.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: September 6, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alexander Bazarsky, Tomer Eliash, Judah Gamliel Hahn, Ariel Navon, Shay Benisty
  • Publication number: 20220261255
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. During a boot operation, the controller is configured to determine whether the boot is a device boot or a host boot. The controller includes a boot optimization unit. The boot optimization unit or the controller is configured to collect statistics of the fetched data, predict the data to be fetched next, and speculatively fetch the data. The controller further includes a rearrangement unit. The controller or the rearrangement unit is configured to rearrange data in the memory device based on the collect statistics of the fetched data so that the next boot operation is more optimized than the current boot operation.
    Type: Application
    Filed: February 12, 2021
    Publication date: August 18, 2022
    Inventors: Eran SHARON, Shay BENISTY, Ariel NAVON
  • Patent number: 11416263
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. During a boot operation, the controller is configured to determine whether the boot is a device boot or a host boot. The controller includes a boot optimization unit. The boot optimization unit or the controller is configured to collect statistics of the fetched data, predict the data to be fetched next, and speculatively fetch the data. The controller further includes a rearrangement unit. The controller or the rearrangement unit is configured to rearrange data in the memory device based on the collect statistics of the fetched data so that the next boot operation is more optimized than the current boot operation.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: August 16, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Eran Sharon, Shay Benisty, Ariel Navon
  • Patent number: 11416171
    Abstract: The present disclosure generally relate to dynamically changing predictive latency related attributes to increase the deterministic window (DTWIN) of operation. The host device workload characteristics as well as the memory device's current condition provide valuable information for the duration of the DTWIN. If the memory device is near the end of life, then the DTWIN duration will be smaller. Additionally, if the workload from the host device is heavy, then the DTWIN duration will also be smaller. Rather than utilizing a fixed DTWIN duration based upon worst case scenarios for host device workload and memory device condition, dynamically adjusting the DTWIN duration based upon the workload and condition will provide a DTWIN duration that can gradually decrease over time from a much longer DTWIN duration than is currently available.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: August 16, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Shay Benisty, Ariel Navon, Alexander Bazarsky, Judah Gamliel Hahn
  • Publication number: 20220245242
    Abstract: An apparatus, system, and method for detecting compromised firmware in a non-volatile storage device. A control bus of a non-volatile storage device is monitored. The non-volatile storage device includes a processor and electronic components coupled to the control bus. Signal traffic on the control bus is analyzed for events and/or triggers related to storage operations initiated on the control bus by the processor. Storage operations include one or more commands directed to at least one of the electronic components. If the latency for the storage operation satisfies an alert threshold a host is notified of compromised firmware.
    Type: Application
    Filed: April 22, 2022
    Publication date: August 4, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Judah Gamliel HAHN, Shay Benisty, Ariel Navon
  • Publication number: 20220229566
    Abstract: The present disclosure generally relates to data storage devices, such as solid state drives, and effective power management of the data storage device. The data storage device includes a controller, where the controller is configured to predict when a host device will send a command to enter a low power state, prepare the data storage device to enter the low power state, and receive a command to enter the low power state after the predicting and preparing. If the data storage device is idled for greater than a threshold value, then the data storage device prepares to transition to a low power state but will wait to enter the lower power state until receiving a request from a host device.
    Type: Application
    Filed: February 25, 2021
    Publication date: July 21, 2022
    Inventors: Shay BENISTY, Judah Gamliel HAHN, Ariel NAVON
  • Publication number: 20220221999
    Abstract: Systems and methods for deduplication of storage device encoded data are described. The storage device may initiate a deduplication process and determine a encoded target data block and at least one encoded comparison data block. The storage device may compare the encoded target data block to the encoded comparison data blocks to determine similarity values. Based on the similarity values, the storage device may determine duplicate data units and eliminate extra duplicate data units.
    Type: Application
    Filed: February 23, 2021
    Publication date: July 14, 2022
    Inventors: Ariel Navon, Shay Benisty
  • Publication number: 20220221997
    Abstract: Systems and methods for allocating storage based on aggregate performance of duplicate data are described. A number of duplicates of a host data unit in a storage medium may be determined, such as by a storage device and/or host device. Operation parameters for the duplicate host data may be aggregated into aggregate operation parameters. The aggregate operation parameters may be used to allocate storage in the storage medium, such as by determining target duplicate numbers and performance thresholds for deduplication and tiering decisions. Duplicate host data units may be stored, moved, or deleted based on the aggregate operation parameters.
    Type: Application
    Filed: February 23, 2021
    Publication date: July 14, 2022
    Inventors: Ariel Navon, Shay Benisty
  • Patent number: 11386203
    Abstract: An apparatus, system, and method for detecting compromised firmware in a non-volatile storage device. A control bus of a non-volatile storage device is monitored. The non-volatile storage device includes a processor and electronic components coupled to the control bus. Signal traffic on the control bus is analyzed for events and/or triggers related to storage operations initiated on the control bus by the processor. Storage operations include one or more commands directed to at least one of the electronic components. If the latency for the storage operation satisfies an alert threshold a host is notified of compromised firmware.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: July 12, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Judah Gamliel Hahn, Shay Benisty, Ariel Navon
  • Publication number: 20220214835
    Abstract: An adaptive-feedback-based read-look-ahead management system and method are provided. In one embodiment, a method for stream management is presented that is performed in a storage system. The method comprises performing a read look ahead operation for each of a plurality of streams; determining a success rate of the read look ahead operation of each of the plurality of streams; and allocating more of the memory for a stream that has a success rate above a threshold than for a stream that has a success rate below the threshold. Other embodiments are provided.
    Type: Application
    Filed: March 22, 2022
    Publication date: July 7, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Shay Benisty, Ariel Navon, Alexander Bazarsky
  • Patent number: 11379031
    Abstract: An apparatus includes memory arrays and a power-performance-endurance manager module. The power-performance-endurance manager module stores a power-endurance state descriptor data structure, which includes endurance levels associated with power-endurance modes. The manager module dynamically configures the apparatus to operate the memory arrays according to one of the power-endurance modes based on a desired endurance level.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: July 5, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ariel Navon, Eran Sharon, Shay Benisty
  • Patent number: 11366749
    Abstract: A storage system has a volatile memory, a non-volatile memory, and a controller. The controller of the storage system can implement various mechanisms for improving random read performance. These mechanisms include improved read prediction cache management, using a pattern length for read prediction, and a time-based enhancement for read prediction. Each of these mechanisms can be used alone on in combination with some or all of the other mechanisms.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: June 21, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Shay Benisty, Ariel Navon, Eran Sharon
  • Patent number: 11354454
    Abstract: An apparatus and method of providing direct access to a non-volatile memory of a non-volatile memory device and detecting potential security violations are provided. A method for providing access to a non-volatile memory of a non-volatile memory device may include tracking a parameter related to a plurality of direct access transactions of the non-volatile memory. A threshold behavior pattern of the host activity may be determined based upon the tracked parameters. The direct access transactions may be reviewed to determine whether the threshold behavior pattern is exceeded.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: June 7, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alon Marcu, Ariel Navon, Shay Benisty
  • Publication number: 20220171716
    Abstract: A storage system and method for providing a dual-priority credit system are disclosed. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to receive, from a host, a plurality of credits for sending messages to the host; allocate a first portion of the plurality of credits for non-urgent messages; and allocate a second portion of the plurality of credits for urgent messages. Other embodiments are provided.
    Type: Application
    Filed: February 18, 2021
    Publication date: June 2, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Shay Benisty, Ariel Navon, Judah Gamliel Hahn, Alon Marcu
  • Patent number: 11340810
    Abstract: Methods and apparatus for managing and optimizing data storage devices that include non-volatile memory (NVM) are described. One such method involves deriving a hint for one or more logical block addresses (LBAs) of a storage device based on information received from a host device and/or physical characteristics of the storage device, such as LBAs that are invalidated together; grouping the LBAs into one or more clusters of LBAs based on the derived hint and a statistical analysis of the physical characteristics of the storage devices; allocating available physical block addresses (PBAs) in the storage device to one of the LBAs based on the one or more clusters of LBAs to achieve optimization of a data storage device.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: May 24, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Ariel Navon, Alexander Bazarsky, Judah Gamliel Hahn, Karin Inbar, Rami Rom, Idan Alrod, Eran Sharon
  • Patent number: 11334280
    Abstract: Systems and methods for compacting and anonymizing telemetry data in a storage system. A controller of a storage device may generate telemetry data based on collected features indicative of the performance of the storage device. The controller may store the telemetry data in the telemetry memory of the storage device. The controller may then transform the telemetry data into transformed telemetry data based on a dimension reduction algorithm, and transmit the transformed telemetry data to the host device.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: May 17, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ariel Navon, Alexander Bazarsky, Judah Gamliel Hahn
  • Publication number: 20220147282
    Abstract: A storage system and method for implementing an encoder, decoder, and/or buffer using a field programmable gate array are provided. In one embodiment, a storage system is provided with a field programmable gate array and a memory that stores sets of instruction code for the field programmable gate array. The sets of instruction code can be for different error decoder implementations, for providing an additional encoder and/or decoder, or for implementing a host memory buffer or a controller memory buffer.
    Type: Application
    Filed: January 24, 2022
    Publication date: May 12, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Ariel Navon, Ran Zamir, Shay Benisty
  • Publication number: 20220147440
    Abstract: A storage system has a volatile memory, a non-volatile memory, and a controller. The controller of the storage system can implement various mechanisms for improving random read performance. These mechanisms include improved read prediction cache management, using a pattern length for read prediction, and a time-based enhancement for read prediction. Each of these mechanisms can be used alone on in combination with some or all of the other mechanisms.
    Type: Application
    Filed: February 23, 2021
    Publication date: May 12, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Shay Benisty, Ariel Navon, Eran Sharon