Abstract: Systems and methods for pre-fetching data in a memory device are disclosed. The method may include receiving a current read command and determining whether the current read command is a random read command, for example based on a data chunk length identified by the current read command. The method may further include updating a prior read command data structure with the current read command, for random read commands; determining a predicted next read command from the prior read command data structure based on the current read command; and pre-fetching data associated with the predicted next read command. Functionality for prediction of next read commands, or pre-fetch of predicted next read commands, may be turned on or off based on resource availability or prediction success rate measurements.

Abstract: In a method for address table cache management, a first logical address associated with a first read command may be received. The first logical address may be associated with a first segment of an address mapping table. A second logical address associated with a second read command may then be received. The second logical address may be associated with a second segment of the address mapping table. A correlation metric associating the first segment to the second segment may be increased in response to receiving the first logical address before the second logical address. The first logical address and second logical address may each map to a physical address within the address mapping table, and a mapping table cache may be configured to store two or more segments. The mapping table cache may then be managed based on the correlation metric.

Abstract: Apparatuses and methods of directly accessing a memory space of a storage device by a host are provided. In one embodiment, a method of driverless access of a non-volatile memory of a non-volatile memory device by a host includes initializing a PCIe memory space mapping a portion of the non-volatile memory of the non-volatile memory device to a host memory space. The non-volatile memory is mapped through a PCIe link between the host and the non-volatile memory device. Load/store commands are sent to the PCIe memory space for driverless access. The method further includes negotiating an alignment size of the minimum transaction packet size to complete the load/store commands.

Abstract: Technology is disclosed for reading non-volatile memory when a host does not need perfect data. By allowing the memory to return data with some errors, the data will be provided to the host much quicker. Therefore, in response to one or more host read commands, the memory system returns multiple copies of the data over time, progressively getting better so that later in time copies of the data have lower number of errors. The host decides when the error rate is good enough and stops the process (or ignores the rest of the results).

Abstract: A storage system and method are provided for hit-rate-score-based selective prediction of future random read commands. In one embodiment, a storage system is provided comprising a memory configured to store a prior read command data structure, the prior read command data structure comprising a hit-rate score field. The storage system receives a current read command; generates a search sequence of read commands comprising the current read command and at least one prior read command; calculates an index value based on the search sequence; reads a hit-rate score from the hit-rate score field of an entry of the prior read command data structure identified by the index value; determines whether the hit-rate score is less than a threshold; and in response to determining that the hit-rate score is less than the threshold, updates the prior read command data structure with the search sequence. Other embodiments are provided.

Abstract: A method and apparatus for cache management and eviction polices using unsupervised reinforcement learning schemes is disclosed.

Abstract: A non-volatile storage device includes a compact and efficient filter of data samples for a monitored statistic about operation of the storage device. The non-volatile storage device comprises a plurality of non-volatile memory cells and a control circuit connected to the non-volatile memory cells. The control circuit is configured to maintain at the non-volatile storage device a sum of samples of the statistic for a moving window of the samples such that during operation new samples are added to the sum and contributions from old samples are removed from the sum by the control circuit multiplying the sum by a weight when adding the new samples.

Abstract: A memory system configured to decode a data set may pause a convergence process to update reliability metric values. The memory system may utilize a positive feedback system that updates the reliability metric values by analyzing current a posteriori reliability metric values to calculate average estimated reliability characteristic values associated with a memory error model. The updates to the reliability metric values may provide increased error correction capability and faster decoding.

Abstract: Apparatuses and methods of directly accessing a memory space of a storage device by a host are provided. In one embodiment, a method of driverless access of a non-volatile memory of a non-volatile memory device by a host includes initializing a PCIe memory space mapping a portion of the non-volatile memory of the non-volatile memory device to a host memory space. The non-volatile memory is mapped through a PCIe link between the host and the non-volatile memory device. Load/store commands are sent to the PCIe memory space for driverless access. The method further includes negotiating an alignment size of the minimum transaction packet size to complete the load/store commands.

Abstract: A system and method are disclosed for handling logical-to-physical mapping and increasing the amount of mapping table information that may be stored in a cache in volatile memory. The system includes a storage device having non-volatile memory, an input/output interface, a cache manager, a cache utilization manager, a cache swap manager, and a storage controller configured to service a storage command using a physical address provided by the cache manager. The method includes receiving a storage command comprising a logical address, the logical address comprising a partition identifier, implementing a cache eviction policy in response to determining that a mapping table cache does not have a cache entry that matches the logical address. The method also includes evicting the cache entry with a ranking, or score, that satisfies a cache eviction threshold and loading a replacement cache entry from an address mapping table stores on non-volatile memory.

Abstract: A controller for a phase change memory forms a dedicated burst write partition in the phase change memory and initializes memory cells of the dedicated burst write partition to a SET state. Programming of selected memory cells in the dedicated burst write partition is carried out using only RESET pulses.

Abstract: Systems and methods for predicting the next host source of a command directed to a storage device, and configuring the storage device with the host memory configuration parameters of that predicted host, are disclosed. A predictive model may be used to identify which of a plurality of different actual or virtual hosts will be sending a next command based on a pattern of prior host origins of commands. The storage device may include a plurality of different memory configuration parameters associated with each different host source and may update the current memory configuration based on the predicted next host origin prior to actual receipt of a next command.

Abstract: A system and method for optimization of non-volatile storage operational parameters is provided. The method may utilize a crowdsourcing server to gather performance data for multiple storage devices connected to respective remotely located host systems. The performance data may be transmitted at regular intervals or at predefined events and the crowdsourcing server may aggregate and determine improved operating parameters for each different type of storage device based on the data gathered for multiple instances of that type of storage device. The optimized operating parameters may be selected from pre-stored and pre-qualified operating parameter sets on the respective storage devices that the crowdsourcing server is aware of. The system includes a non-volatile memory and a controller that is configured to log performance data and transmit at least a portion of that logged data to the crowdsourcing server.

Abstract: An open block management apparatus, system, and method for non-volatile memory devices is disclosed herein, providing improved performance for namespace-based host applications. The namespace identifier is applied to determine the open blocks to which to direct data from storage commands. One benefit of the disclosed technique is fewer de-fragmentation operations and more efficient memory garbage collection. Another benefit is the ability to secure private allocations of physical memory without needing to assign a partition or implement hardware isolation.

Abstract: A system and method are disclosed for handling logical-to-physical mapping and increasing the amount of mapping table information that may be stored in a cache in volatile memory. The system includes a storage device having non-volatile memory, an input/output interface, a cache manager, a cache utilization manager, a cache swap manager, and a storage controller configured to service a storage command using a physical address provided by the cache manager. The method includes receiving a storage command comprising a logical address, the logical address comprising a partition identifier, implementing a cache eviction policy in response to determining that a mapping table cache does not have a cache entry that matches the logical address. The method also includes evicting the cache entry with a ranking, or score, that satisfies a cache eviction threshold and loading a replacement cache entry from an address mapping table stores on non-volatile memory.

Abstract: In the context of data storage, an approach to pre-fetching data prior to a read request involves receiving a read request and a next read request, and updating metadata corresponding to the read request with a next data storage address corresponding to the next read request. Responsive to again receiving the read request at a later time, the next data storage address can be read from the read request metadata and the next data can be pre-fetched from the next data storage address in advance of processing a following read request. Furthermore, the next data can be pre-fetched during read queue idle time and stored in a cache buffer, in anticipation of another incoming next read request, responsive to which the next data can be returned to the host from the buffer rather than from a read of non-volatile memory.

Abstract: A non-volatile storage system, configured to use a protocol that supports predictable latency, including: a memory array storing a data in a block of memory; a controller coupled to the memory array, where the controller is configured to: in response to determining that predictable latency is enabled, operate the storage system using a first mode for a duration of time, where during the first mode, the storage system operates such that a read latency is below a read latency threshold; and after the duration of time, operate, the storage system using a second mode for a second duration of time, where during the second mode: the storage system performs a management operation based on a second set of thresholds that are different from a first set of threshold used during the first mode.

Abstract: A storage system and method are provided for hit-rate-score-based selective prediction of future random read commands. In one embodiment, a storage system is provided comprising a memory configured to store a prior read command data structure, the prior read command data structure comprising a hit-rate score field. The storage system receives a current read command; generates a search sequence of read commands comprising the current read command and at least one prior read command; calculates an index value based on the search sequence; reads a hit-rate score from the hit-rate score field of an entry of the prior read command data structure identified by the index value; determines whether the hit-rate score is less than a threshold; and in response to determining that the hit-rate score is less than the threshold, updates the prior read command data structure with the search sequence. Other embodiments are provided.

Abstract: Methods and apparatus are disclosed for implementing data augmentation within a storage controller of a data storage device based on machine learning data read from a non-volatile memory (NVM) array of a memory die. Some particular aspects relate to configuring the storage controller to generate augmented versions of training images for use in training a Deep Learning Accelerator of an image recognition system by rotating, translating, skewing, cropping, etc., a set of initial training images obtained from a host device and stored in the NVM array. Other aspects relate to controlling components of the memory die to generate noise-augmented images by, for example, storing and then reading training images from worn regions of the NVM array to inject noise into the images. Data augmentation based on data read from multiple memory dies is also described, such as image data spread across multiple NVM arrays or multiple memory dies.

Abstract: Methods and apparatus are disclosed for implementing machine learning data augmentation within the die of a non-volatile memory (NVM) apparatus using on-chip circuit components formed on or within the die. Some particular aspects relate to configuring under-the-array or next-to-the-array components of the die to generate augmented versions of images for use in training a Deep Learning Accelerator of an image recognition system by rotating, translating, skewing, cropping, etc., a set of initial training images obtained from a host device. Other aspects relate to configuring under-the-array or next-to-the-array components of the die to generate noise-augmented images by, for example, storing and then reading training images from worn regions of a NAND array to inject noise into the images.