Abstract: Apparatus, systems, methods, and computer program products for adaptive power balancing in memory device operations are disclosed. One apparatus includes a power balancing component for the memory device. A power balancing component is configured to determine a first amount of power consumed by each respective operation in a set of operations for a memory device for at least one previous iteration of each respective operation. A power balancing component utilizes a second amount of power to perform a next iteration of each respective operation based on a first amount of power consumed by each respective operation in at least one previous iteration.

Abstract: Apparatus, systems, methods, and computer program products for adaptive power balancing in memory device operations are disclosed. One apparatus includes a power balancing component for the memory device. A power balancing component is configured to determine a first amount of power consumed by each respective operation in a set of operations for a memory device for at least one previous iteration of each respective operation. A power balancing component utilizes a second amount of power to perform a next iteration of each respective operation based on a first amount of power consumed by each respective operation in at least one previous iteration.

Abstract: Embodiments of the present disclosure generally relate to a storage device and method of managing flash memory read operations of a storage device. In one embodiment, a method of retrieving information stored in a storage device comprises determining a timing of a next host read command for a flash memory die. If there is a storage device initiated read request for the flash memory die is determined. In response to an identification of the storage device initiated read request, a random cache read operation is initiated with the storage device initiated read request bound with the next host read command.

Abstract: Apparatuses and methods of directly accessing a memory space of a storage device by a host are provided. In one embodiment, a method of driverless access of a non-volatile memory of a non-volatile memory device by a host includes initializing a PCIe memory space mapping a portion of the non-volatile memory of the non-volatile memory device to a host memory space. The non-volatile memory is mapped through a PCIe link between the host and the non-volatile memory device. Load/store commands are sent to the PCIe memory space for driverless access. The method further includes negotiating an alignment size of the minimum transaction packet size to complete the load/store commands.

Abstract: An apparatus and method of providing direct access to a non-volatile memory of a non-volatile memory device and detecting potential security violations are provided. A method for providing access to a non-volatile memory of a non-volatile memory device may include tracking a parameter related to a plurality of direct access transactions of the non-volatile memory. A threshold behavior pattern of the host activity may be determined based upon the tracked parameters. The direct access transactions may be reviewed to determine whether the threshold behavior pattern is exceeded.

Abstract: Storage devices that can perform adaptive management of intermediate storage memory, and methods for use therewith, are described herein. Such a storage device includes non-volatile memory, wherein a portion thereof is designated as intermediate storage (IS) memory and another portion thereof designated as main storage (MS) memory. The IS memory has lower write and read latencies, greater endurance, and lower storage density and capacity than the MS memory. In certain embodiments, a host activity pattern is predicted, a relocation schemes is selected based on the predicted host activity pattern, and the selected relocation scheme is executed to thereby selectively relocate one or more portions of the data from the IS memory to the MS memory in accordance with the selected relocation scheme. The relocation scheme that is selected and executed can change over time. Additionally relocation schemes can be generated based on activity log(s) and thereafter selected for execution.

Abstract: Systems and methods are described for compacting operating parameter sets in a data storage device. Data storage device may be configured to maintain multiple operating parameter sets, each of which stores various parameters for interacting with different memory elements within the device. The data storage device may further be limited in the total number of operating parameter sets that can be maintained in the device at any given time. Thus, the data storage device may be required at various times to combine two or more operating parameter sets, to enable creation of a new operating parameter set. Because each operating parameter set can contain a number of parameters, identification of similar sets for combination can be computationally intensive. To identify similar sets in an efficient manner, a device as disclosed herein is enabled to reduce a dimensionality of each set, and locate similar sets under that reduced dimensionality.

Abstract: Systems and methods are described for generating location-based read voltage offsets in a data storage device. Optimal read voltage thresholds vary across memory elements of a device. However, data storage devices are often limited in the number of read voltage thresholds that can be maintained in the device. Thus, it may not be possible to maintain optimal read voltage parameters for each memory element within a device. The systems and methods described herein provide for increased accuracy of read voltage thresholds when applied to memory elements within a specific location in a device, by enabling the use of location-based read voltage offsets, depending on a relative location of the memory element being read from. The read voltage offsets can be determined based on application of a neural network to data regarding optimal read voltage thresholds determined from at least a sample of memory elements in a device.

Abstract: A system and method for reducing performance penalties of a host that is supplying a host memory buffer (HMB) for use by a storage device. The method may include modeling desired HMB access timing by the storage device in an initial offline analysis for multiple classes of workloads, periodically updating the access timing data stored in the storage device based on actual use and using the current HMB access timing information to modify storage device access to the HMB on the host. The system may include a storage device controller that quantifies different HMB access timing for different host workloads based on individual HMB regions.

Abstract: A device includes a memory, an error correction code (ECC) decoder, and an ECC input adjuster. The ECC decoder is configured to perform a first decode operation to decode a first portion of a representation of data read from the memory based on one or more decode parameters and to perform a second decode operation to decode a second portion of the representation of data based on one or more adjusted decode parameters. The ECC input adjuster is configured to adjust one or more decode parameters to set the one or more adjusted decode parameters based on a count of bits of the first portion that are erroneous.

Abstract: A method of transitioning between a sleep mode for a storage device to reduce power consumption and to increase responsiveness includes collecting one or more recent parameters related to host-storage device workload. The host-storage device workload is correlated to project a next host idle time. A transition between a storage sleep mode is determined.

Abstract: A data storage device includes a shaping engine and a compression engine. The shaping engine is configured to shape first data to generate second data. The compression engine is configured to compress the second data to generate third data.

Abstract: A device includes a non-volatile memory, a traffic analyzer, and a parameter adjuster. The traffic analyzer is configured to generate a traffic type indicator based on one or more read requests from an access device to access data at the non-volatile memory. The traffic type indicator has a first value responsive to the one or more read requests corresponding to a first traffic type and has a second value responsive to the one or more read requests corresponding to a second traffic type. The parameter adjuster is configured to designate one or more decode parameter values based on the traffic type indicator.

Abstract: A non-volatile memory system receives a request to read data. That request includes a quality of service indication. The memory system performs a read process that satisfies the quality of service indication and identifies a set of data with errors. The memory system returns the set of data with errors in response to the request.

Abstract: A memory system is configured to perform a test operation to determine a deviation of a target storage location's bit error rate response relative to a model. The memory system determines the deviation level by measuring data sets stored in the target storage location to determine an actual bit error rate value and another actual parameter value used to estimate bit error rate. The memory system obtains an estimated value from the model based on the actual values and identifies the deviation by comparing the estimated value with the actual values.

Abstract: A data storage device may include a memory and a controller that includes an error correction coding (ECC) decoder configured to operate in a plurality of decoding modes. The controller also includes a bit error rate estimator configured to determine, based on data received from the memory, bit error rate estimates for ECC codewords from the memory. The controller also includes a data path management unit configured to reorder the codewords based on the bit error rate estimates and to provide the reordered codewords to the ECC decoder.

Abstract: Systems and methods are described for generating location-based read voltage offsets in a data storage device. Optimal read voltage thresholds vary across memory elements of a device. However, data storage devices are often limited in the number of read voltage thresholds that can be maintained in the device. Thus, it may not be possible to maintain optimal read voltage parameters for each memory element within a device. The systems and methods described herein provide for increased accuracy of read voltage thresholds when applied to memory elements within a specific location in a device, by enabling the use of location-based read voltage offsets, depending on a relative location of the memory element being read from. The read voltage offsets can be determined based on application of a neural network to data regarding optimal read voltage thresholds determined from at least a sample of memory elements in a device.

Abstract: Systems and methods are described for compacting operating parameter sets in a data storage device. Data storage device may be configured to maintain multiple operating parameter sets, each of which stores various parameters for interacting with different memory elements within the device. The data storage device may further be limited in the total number of operating parameter sets that can be maintained in the device at any given time. Thus, the data storage device may be required at various times to combine two or more operating parameter sets, to enable creation of a new operating parameter set. Because each operating parameter set can contain a number of parameters, identification of similar sets for combination can be computationally intensive. To identify similar sets in an efficient manner, a device as disclosed herein is enabled to reduce a dimensionality of each set, and locate similar sets under that reduced dimensionality.

Abstract: A system and method for optimization of non-volatile storage operational parameters is provided. The method may utilize a crowdsourcing server to gather performance data for multiple storage devices connected to respective remotely located host systems. The performance data may be transmitted at regular intervals or at predefined events and the crowdsourcing server may aggregate and determine improved operating parameters for each different type of storage device based on the data gathered for multiple instances of that type of storage device. The optimized operating parameters may be selected from pre-stored and pre-qualified operating parameter sets on the respective storage devices that the crowdsourcing server is aware of. The system includes a non-volatile memory and a controller that is configured to log performance data and transmit at least a portion of that logged data to the crowdsourcing server.

Abstract: Technology is described herein for learning parameters for a parameterized iterative message passing decoder, and to a corresponding parameterized iterative message passing decoder. Learning the parameters may adapt the decoder to statistical dependencies introduced by the specific code's graph. Taking into account the statistical dependencies may allow the code to be shorter and/or denser. Note that the statistical dependencies in the graph may be extremely complex. Machine learning may be used to learn the parameters. The parameters may be learned when decoding data stored in the memory device. Learning the parameters may adapt the decoder to properties of data stored in the memory device, physical properties of the memory device, and/or patterns in host data.