Patents by Inventor Armin Willmeroth

Armin Willmeroth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7126186
    Abstract: A compensation component and a process for production thereof includes a semiconductor body having first and second electrodes, a drift zone disposed therebetween, and areas of a first conductivity type and a second conductivity type opposite the first conductivity type disposed in the drift zone. Higher doped zones of the first type are inlaid in a weaker doped environment of the second type closer to the first electrode and higher doped zones of the second type are inlaid in a weaker doped environment of the first type closer to the second electrode. The drift zone is complementary so that, in a direction between the electrodes, a more highly doped zone of the first type adjoins a more weakly doped environment of the first type, and a more weakly doped environment of the second type adjoins a more highly doped zone of the second type.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: October 24, 2006
    Assignee: Infineon Technolgies AG
    Inventors: Hans Weber, Armin Willmeroth, Uwe Wahl, Markus Schmitt
  • Patent number: 7112868
    Abstract: An IGBT with monolithic integrated antiparallel diode has one or more emitter short regions forming the diode cathode in the region of the high-voltage edge. The p-type emitter regions of the IGBT have no emitter shorts. The counterelectrode of the diode exclusively comprises p-type semiconductor wells on the front side of the device. Particularly in applications, such as lamp ballast, in which the diode of the IGBT is firstly forward-biased, hard commutation is not effected and the current reversal takes place relatively slowly. The emitter short regions may be strips or points below the high-voltage edge. The horizontal bulk resistance is increased and the snapback effect is reduced without reducing the robustness in the edge region. In a second embodiment, the IGBT is produced using thin wafer technology and the thickness of the substrate defining the inner zone is less than 200 ?m. The thickness of the emitter region or of the emitter regions and short region(s) is less than 1 ?m.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: September 26, 2006
    Assignee: Infineon Technologies AG
    Inventors: Armin Willmeroth, Hans-Joachim Schulze, Holger Huesken, Erich Griebl
  • Publication number: 20060118862
    Abstract: A lateral trench transistor has a semiconductor body having a source region, a source contact, a body region, a drain region, and a gate trench, in which a gate electrode which is isolated from the semiconductor body is embedded. A heavily doped semiconductor region is provided within the body region or adjacent to it, and is electrically connected to the source contact, and whose dopant type corresponds to that of the body region.
    Type: Application
    Filed: October 28, 2005
    Publication date: June 8, 2006
    Applicant: Infineon Technologies AG
    Inventors: Franz Hirler, Uwe Wahl, Thorsten Meyer, Michael Rub, Armin Willmeroth, Markus Schmitt, Carolin Tolksdorf, Carsten Schaffer
  • Patent number: 7038272
    Abstract: In a method for forming a channel zone in field-effect transistors, a polysilicon layer is patterned above the channel zone to be formed. The polysilicon layer serves as a mask substrate for the subsequent doping of the channel zone. The expedient patterning of the polysilicon layer with holes in a gate region and pillars in a source region enables the channel zone to be doped more lightly. In another embodiment, the novel method is used for a channel width shading of a PMOS transistor cell.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: May 2, 2006
    Assignee: Infineon Technologies AG
    Inventors: Hans Weber, Dirk Ahlers, Uwe Wahl, Jenö Tihanyi, Armin Willmeroth
  • Publication number: 20060006386
    Abstract: A semiconductor component is described. In one embodiment, the semiconductor component includes a semiconductor body with a first side and a second side. A drift zone is provided, which is arranged in the semiconductor body below the first side and extends in a first lateral direction of the semiconductor body between a first and a second doped terminal zone. At least one field electrode is provided, which is arranged in the drift zone, extends into the drift zone proceeding from the first side and is configured in a manner electrically insulated from the semiconductor body.
    Type: Application
    Filed: August 25, 2004
    Publication date: January 12, 2006
    Inventors: Franz Hirler, Armin Willmeroth, Markus Schmitt, Carolin Tolksdorf, Uwe Wahl, Gerald Deboy, Ralf Henninger
  • Patent number: 6940126
    Abstract: A semiconductor component has at least one first terminal zone of a first conductivity type in a semiconductor body. The first terminal zone is contact-connected by a first terminal electrode. A drift zone of the first conductivity type is adjoined by a second terminal zone of the second conductivity type. A channel zone of a second conductivity type is formed between the at least one first terminal zone and the drift zone. A control electrode is insulated from the semiconductor body and adjacent to the channel zone. A first channel is formed by the channel zone in a region adjacent to the control electrode, the first channel conducts only upon application of a control voltage that is not equal to zero between the control electrode and the first terminal zone. The first terminal electrode is connected to the drift zone via at least one second channel of the first conductivity type, which already conducts in the event of a control voltage equal to zero.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: September 6, 2005
    Assignee: Infineon Technologies AG
    Inventors: Gerald Deboy, Uwe Wahl, Armin Willmeroth
  • Patent number: 6914297
    Abstract: The invention relates to a configuration for generating a low-voltage signal proportional to the high voltage present between the source and the drain of a power transistor. For this purpose, a capacitive voltage divider including the source-gate capacitance serving as a low-voltage tap and the source-drain capacitance serving as a high-voltage element is situated in a voltage sense region.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: July 5, 2005
    Assignee: Infineon Technologies AG
    Inventors: Gerald Deboy, Armin Willmeroth
  • Publication number: 20050110077
    Abstract: A semiconductor component and also a method for producing it are disclosed. In one embodiment, the semiconductor component includes a surface region or a modified doping region is provided alternatively or simultaneously in the edge region of the cell array, in which surface region or modified doping region the doping concentration is lowered and/or in which surface region or modified doping region the conductivity type is formed such that it is opposite to the conductivity type of the actual semiconductor material region, or in which a field plate region is provided.
    Type: Application
    Filed: September 10, 2004
    Publication date: May 26, 2005
    Inventors: Markus Zundel, Rudolf Zelsacher, Franz Hirler, Dietmar Kotz, Hermann Peri, Armin Willmeroth
  • Publication number: 20050045922
    Abstract: The invention relates to a semiconductor power device with charge compensation structure and monolithic integrated circuit, and method for fabricating it. In the case of this semiconductor power device, zones (6) in charge compensation cells (27) that are arranged vertically and doped complementarily to the semiconductor chip volume (5) are arranged in the entire chip volume, the complementarily doped zones (6) extending right into surface regions (11) of the semiconductor power elements (7) and not projecting into surface regions (12) of semiconductor surface elements (1).
    Type: Application
    Filed: August 26, 2004
    Publication date: March 3, 2005
    Inventors: Dirk Ahlers, Miguel Marion, Uwe Wahl, Armin Willmeroth
  • Patent number: 6861723
    Abstract: The invention relates to a Schottky diode in which p-doped regions (4, 5) are incorporated in the Schottky contact area. At least one (5) of these regions (4, 5) has a greater minimum extent, in order to initiate a starting current.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: March 1, 2005
    Assignee: Infineon Technologies AG
    Inventor: Armin Willmeroth
  • Publication number: 20050029581
    Abstract: A semiconductor component has at least one first terminal zone of a first conductivity type in a semiconductor body. The first terminal zone is contact-connected by a first terminal electrode. A drift zone of the first conductivity type is adjoined by a second terminal zone of the second conductivity type. A channel zone of a second conductivity type is formed between the at least one first terminal zone and the drift zone. A control electrode is insulated from the semiconductor body and adjacent to the channel zone. A first channel is formed by the channel zone in a region adjacent to the control electrode, the first channel conducts only upon application of a control voltage that is not equal to zero between the control electrode and the first terminal zone. The first terminal electrode is connected to the drift zone via at least one second channel of the first conductivity type, which already conducts in the event of a control voltage equal to zero.
    Type: Application
    Filed: September 4, 2003
    Publication date: February 10, 2005
    Inventors: Gerald Deboy, Uwe Wahl, Armin Willmeroth
  • Publication number: 20050024925
    Abstract: The invention relates to a configuration for generating a low-voltage signal proportional to the high voltage present between the source and the drain of a power transistor. For this purpose, a capacitive voltage divider including the source-gate capacitance serving as a low-voltage tap and the source-drain capacitance serving as a high-voltage element is situated in a voltage sense region.
    Type: Application
    Filed: July 29, 2003
    Publication date: February 3, 2005
    Inventors: Gerald Deboy, Armin Willmeroth
  • Patent number: 6838729
    Abstract: The invention relates to a semiconductor component with enhanced avalanche ruggedness. At the nominal current of this semiconductor component, in the event of an avalanche the voltage applied between two electrodes is 6 % or more above the static reverse voltage at the same temperature.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: January 4, 2005
    Assignee: Infineon Technologies AG
    Inventors: Andreas Schlögl, Markus Schmitt, Hans-Joachim Schulze, Markus Vossebürger, Armin Willmeroth
  • Patent number: 6831327
    Abstract: A vertically structured semiconductor power component is described. A layer thickness of a substrate of the power module between a pn junction and a metallized back is chosen in such a manner that a space charge region produced in the semiconductor component extends as far as the back when a blocking voltage between a source and a drain electrode is applied before a field strength produced by the applied blocking voltage reaches a critical value.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: December 14, 2004
    Assignee: Infineon Technologies AG
    Inventors: Gerald Deboy, Jens-Peer Stengl, Hans Weber, Armin Willmeroth
  • Patent number: 6812524
    Abstract: A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: November 2, 2004
    Assignee: Infineon Technologies AG
    Inventors: Dirk Ahlers, Jens-Peer Stengl, Jenoe Tihanyi, Hans Weber, Gerald Deboy, Helmut Strack, Armin Willmeroth
  • Publication number: 20040173801
    Abstract: The invention relates to a Schottky diode in which p-doped regions (4, 5) are incorporated in the Schottky contact area. At least one (5) of these regions (4, 5) has a greater minimum extent, in order to initiate a starting current.
    Type: Application
    Filed: December 19, 2003
    Publication date: September 9, 2004
    Applicant: Infineon Technologies AG
    Inventor: Armin Willmeroth
  • Publication number: 20040144992
    Abstract: An IGBT with monolithic integrated antiparallel diode has one or more emitter short regions forming the diode cathode in the region of the high-voltage edge. The p-type emitter regions of S the IGBT have no emitter shorts. The counterelectrode of the diode exclusively comprises p-type semiconductor wells on the front side of the device. Particularly in applications, such as lamp ballast, in which the diode of the IGBT is firstly forward-biased, hard commutation is not effected and the 10 current reversal takes place relatively slowly. The emitter short regions may be strips or points below the high-voltage edge. The horizontal bulk resistance is increased and the snapback effect is reduced without reducing the robustness in the edge region. In a second embodiment, the IGBT is produced 15 using thin wafer technology and the thickness of the substrate defining the inner zone is less than 200 &mgr;m. The thickness of the emitter region or of the emitter regions and short region(s) is less than 1 &mgr;m.
    Type: Application
    Filed: October 30, 2003
    Publication date: July 29, 2004
    Inventors: Armin Willmeroth, Hans-Joachim Schulze, Holger Huesken, Erich Griebl
  • Publication number: 20040065909
    Abstract: In a method for forming a channel zone in field-effect transistors, a polysilicon layer is patterned above the channel zone to be formed. The polysilicon layer serves as a mask substrate for the subsequent doping of the channel zone. The expedient patterning of the polysilicon layer with holes in a gate region and pillars in a source region enables the channel zone to be doped more lightly. In another embodiment, the novel method is used for a channel width shading of a PMOS transistor cell.
    Type: Application
    Filed: July 31, 2003
    Publication date: April 8, 2004
    Inventors: Hans Weber, Dirk Ahlers, Uwe Wahl, Jeno Tihanyi, Armin Willmeroth
  • Patent number: 6667514
    Abstract: A semiconductor component includes a charge compensation structure wherein locations with a maximum local field strength are positioned in a compensation edge region of the charge compensation structure. Thus, an electrical parameter such as the on resistance of the semiconductor component can be substantially improved without influencing or impairing further parameters such as the breakdown voltage and the robustness with respect to TRAPATT oscillations. Methods of fabricating a semiconductor component with a charge compensation structure are also provided.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: December 23, 2003
    Assignee: Infineon Technologies AG
    Inventors: Dirk Ahlers, Gerald Deboy, Hans Weber, Armin Willmeroth
  • Patent number: 6639272
    Abstract: Charge balancing is achieved in a compensation component by creating compensation regions having different thickness. In this manner, the ripple of the electric field can be chosen to have approximately the same magnitude in all of the compensation regions.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: October 28, 2003
    Assignee: Infineon Technologies AG
    Inventors: Dirk Ahlers, Armin Willmeroth, Hans Weber