Patents by Inventor Arthur Wang

Arthur Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090241723
    Abstract: This invention relates to a folding structure for carrier's handlebar, wherein it essentially comprises: a first joint (2) fixed in the front end of a carrier body (1) and having positioning teeth (25) formed on the sidewall in the interior thereof, and a second joint (3) pivotally provided in the first joint (2); a rail block (33) being fixed in the interior of the second joint (3), the rail block (33) being formed with a sliding rail (331), a slider (34) being formed in the sliding rail (331), occluding teeth (341) being formed on the bottom end of the slider (34) to mesh with the positioning teeth (25) of the first joint (2), a wire body (35) and an elastic member (36) being provided on the top end of the slider (34), and a dragon head handlebar (12) being provided on the second joint (3). In this manner, it is convenient for user to adjust the angle of the dragon head handlebar.
    Type: Application
    Filed: April 1, 2008
    Publication date: October 1, 2009
    Inventor: Arthur Wang
  • Patent number: 7472923
    Abstract: A cart has an assistant stand mechanism, which includes two first casters, a pair of metallic angle plates, a support rod, and a second caster with a brake; each of the first casters is fitted to one of two rear lateral straight parts of a chassis; the metallic angle plates are each screwed onto a respective one of the rear lateral straight parts of the chassis; the support rod is secured to the metallic angle plates at two ends such that it crosses the cart, and is normally perpendicular to the ground where the cart stands; the second caster is fitted to the support rod; further, there are two sloping rods, each connected to the support rod at one end, and connected to a corresponding metallic angle plate at the other end; thus, the cart can stand on the casters with the chassis in upright position.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: January 6, 2009
    Assignee: Freerider Corp.
    Inventor: Arthur Wang
  • Publication number: 20080309046
    Abstract: A person carrying vehicle includes a main frame, a seat pivoted on the main frame, a front frame, an articulate supporting member connecting the main frame and the front frame, and a telescopic steering mechanism pivoted on the front frame; by means of pivoting supporting rods of the seat downwards, folding the articulate supporting member as well as shorting and pivoting the steering mechanism, the vehicle can be reduced into a not-in-use configuration, wherein the supporting rods and a seat pad are received in a hollow holding portion of the main frame, a footrest board of the front frame hidden under the main frame, and a tube part of the steering mechanism is received in grooves on the seat; the vehicle has a lift handle at a front, and auxiliary casters at a rear, which are used for the vehicle to be moved in a sloping position on the floor.
    Type: Application
    Filed: June 12, 2007
    Publication date: December 18, 2008
    Inventor: Arthur Wang
  • Patent number: 7408212
    Abstract: An electrically programmable, non-volatile resistive memory includes an array of memory cells, a plurality of bit lines, and a plurality of word lines. Each memory cell comprises a resistive element and a Schottky diode coupled in series and having first and second terminals. Each bit line couples to the first terminal of all memory cells in a respective column of the array. Each word line couples to the second terminal of all memory cells in a respective row of the array. The resistive element for each memory cell may be formed with a film of a perovskite material (e.g., Pr0.7Ca0.3MnO3). The Schottky diode for each memory cell may be formed by a thin film of amorphous silicon. The films for the resistive element and Schottky diode for each memory cell may be stacked in a compact island at the cross point between a bit line and a word line.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: August 5, 2008
    Assignee: Winbond Electronics Corporation
    Inventors: Harry S. Luan, Jein-Chen Young, Arthur Wang, Kai-Cheng Chou, Kenlin Huang
  • Publication number: 20080179869
    Abstract: A vehicle chassis includes a front chassis with a rear inverted-U-shaped member, a rear chassis, and a locking mechanism on the rear chassis for locking the inverted-U-shaped member to secure the front and the rear chassises together; the locking mechanism includes a housing with a gap, a pivotal locking piece next to one side of the gap, and a pivotal detaining piece next to other side of the gap; the locking piece will be automatically pivoted to a locking position to detain the inverted-U-shaped member when the inverted-U-shaped member is passed into the gap; the locking and the detaining pieces are subjected to first and second elastic return forces respectively; the first elastic return force biases the locking piece towards a non-locking position; the second elastic force biases the detaining piece such that the detaining piece will engage the locking piece when the inverted-U-shaped member is passed into the gap.
    Type: Application
    Filed: January 31, 2007
    Publication date: July 31, 2008
    Inventor: Arthur Wang
  • Publication number: 20080166844
    Abstract: A stack of two polysilicon layers is formed over a semiconductor body region. A DDD implant is performed to form a DDD source region in the semiconductor body region along a source side of the polysilicon stack but not along a drain side of the polysilicon stack. Off-set spacers are formed along opposing side-walls of the polysilicon stack. A source/drain implant is performed to form a drain region in the semiconductor body region along the drain side of the polysilicon stack and to form a highly doped region within the DDD source region such that the extent of an overlap between the polysilicon stack and each of the drain region and the highly doped region is inversely dependent on a thickness of the off-set spacers, and a lateral spacing directly under the polysilicon stack between adjacent edges of the DDD source region and the highly doped region is directly dependent on the thickness of the off-set spacers.
    Type: Application
    Filed: March 20, 2008
    Publication date: July 10, 2008
    Applicant: Hynix Semiconductor, Inc.
    Inventors: Peter Rabkin, Hsingya Arthur Wang, Kai-Cheng Chou
  • Publication number: 20080005982
    Abstract: A satellite ready building comprises a plurality of studs and satellite wires positioned adjacent to the studs having a first termination and a second termination. A connector is coupled to the second termination of the wires. The first termination is coupled through the roof or the siding of the building. Drywall is installed in the house after the wires are installed. The first termination may be installed in a radome positioned on the roof of the building.
    Type: Application
    Filed: January 4, 2007
    Publication date: January 10, 2008
    Inventor: Arthur Wang
  • Patent number: 7250341
    Abstract: A non-volatile memory device includes a substrate having a first active region and a second active region. A first floating gate is provided over the first active region and having an edge, the first floating gate being made of a conductive material. A first spacer is connected to the edge of the first floating gate and being made of the same conductive material as that of the first floating gate. A control gate is provided proximate to the floating gate.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: July 31, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hsingya Arthur Wang, Kai-Cheng Chou, Peter Rabkin
  • Publication number: 20070126052
    Abstract: A method of manufacturing a non-volatile semiconductor memory. The method includes forming a word gate poly layer on a substrate, wherein an upper surface of the substrate defines a plane of the substrate. The method also includes forming a first dielectric layer coupled to the word gate poly layer and patterning the word gate poly layer and the first dielectric layer to form an array of word gate structures. The method further includes forming a poly plug layer and patterning the poly plug layer to form a plurality of poly plugs surrounded in the plane of the substrate on three sides, forming a plurality of control gates, forming a second dielectric layer, planarizing the second dielectric layer using a chemical-mechanical polishing process, and depositing a metal layer to provide electrical contact to the word gate structures.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 7, 2007
    Applicant: Winbond Electronics Corporation America
    Inventors: Harry Luan, J.C. Young, Arthur Wang, K.C. Chou, Kenlin Huang
  • Publication number: 20070117509
    Abstract: A communication system has a plurality of ground stations and a plurality of satellites located in a first orbit with respect to the earth. The satellites generate a plurality of beams corresponding to a respective plurality of cell. The plurality of beams has widths that vary relative to position in the orbit to maintain a cell size of the plurality of cells. A plurality of user terminals within the cells receives communication signals from the satellite.
    Type: Application
    Filed: January 16, 2007
    Publication date: May 24, 2007
    Inventor: Arthur Wang
  • Patent number: 7202134
    Abstract: A gate electrode is formed over but insulated from a semiconductor body region for each of first and second transistors. A DDD implant is carried out to from DDD source and DDD drain regions in the body region for the first transistor. After the DDD implant, off-set spacers are formed along side-walls of the gate electrode of each of the first and second transistors. After forming the off-set spacers, a LDD implant is carried out to from LDD source and drain regions in the body region for the second transistor. After the LDD implant, main spacers are formed adjacent the off-set spacers of at least the second transistor. After forming the main spacers, a source/drain implant is carried out to form a highly doped region within each of the DDD drain and source regions and the LDD drain and source regions.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: April 10, 2007
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Peter Rabkin, Hsingya Arthur Wang, Kai-Cheng Chou
  • Publication number: 20070072603
    Abstract: A method and apparatus for mitigating communications interference between satellite communications systems in different orbits is disclosed. The method comprises the steps of evaluating a geometrical relationship between a second ground station and the satellites in the second satellite constellation, and directing communications between the second ground station and the second satellite according to the evaluated geometrical relationship. In one embodiment communications are handed over from a first satellite to another satellite when the first satellite is no longer at the highest elevation angle of visible satellites. In another embodiment, handover occurs when the first satellite drops below a minimum elevation angle.
    Type: Application
    Filed: September 26, 2006
    Publication date: March 29, 2007
    Inventor: Arthur Wang
  • Patent number: 7186658
    Abstract: A high selectivity and etch rate with innovative approach of inductively coupled plasma source. Preferably, the invention includes a method using plasma chemistry that is divided into main etch step of (e.g., Cl2+HBr+C4F8) gas combination and over etch step of (e.g., HBr+Ar). The main etch step provides a faster etch rate and selectivity while the over etch step will decrease the etch rate and ensure the stringer and residue removal without attacking the under layer.
    Type: Grant
    Filed: May 24, 2004
    Date of Patent: March 6, 2007
    Assignee: Winbond Electronics Corporation
    Inventors: Kenlin Huang, Kaicheng Chou, Harry Luan, Jein-Chen Young, Arthur Wang
  • Patent number: 7172939
    Abstract: An MONOS integrated circuit device. The device has a semiconductor substrate comprising a silicon bearing material and a shallow trench isolation region formed within the substrate. A P-type well region is formed within the substrate and adjacent to the shallow trench isolation region. The first word gate comprising a first edge and a second edge. The first word gate comprises a first control gate coupled to the first edge and a second control gate coupled to the second edge. Preferably, the second word gate comprises a first edge and a second edge. The second word gate comprises a first control gate coupled to the first edge and a second control gate coupled to the second edge. A common buried bit line is formed within the P-type well region and between the second edge of the first word gate and the first edge of the second word gate.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: February 6, 2007
    Assignee: Winbond Electronics Corporation
    Inventors: Kai Cheng Chou, Harry Laun, Kenlin Huang, J. C. Young, Arthur Wang
  • Publication number: 20070026606
    Abstract: An MONOS integrated circuit device. The device has a semiconductor substrate comprising a silicon bearing material and a shallow trench isolation region formed within the substrate. A P-type well region is formed within the substrate and adjacent to the shallow trench isolation region. The first word gate comprising a first edge and a second edge. The first word gate comprises a first control gate coupled to the first edge and a second control gate coupled to the second edge. Preferably, the second word gate comprises a first edge and a second edge. The second word gate comprises a first control gate coupled to the first edge and a second control gate coupled to the second edge. A common buried bit line is formed within the P-type well region and between the second edge of the first word gate and the first edge of the second word gate.
    Type: Application
    Filed: November 15, 2005
    Publication date: February 1, 2007
    Applicant: Winbond Electronics Corporation
    Inventors: Kai Chou, Harry Laun, Kenlin Huang, J.C. Young, Arthur Wang
  • Patent number: 7160774
    Abstract: In accordance with an embodiment of the present invention, a semiconductor structure includes an undoped polysilicon layer, a doped polysilicon layer in contact with the undoped polysilicon layer, and an insulating layer in contact with the undoped polysilicon layer. The undoped polysilicon layer is sandwiched between the doped polysilicon layer and the insulating layer.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: January 9, 2007
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Peter Rabkin, Hsingya Arthur Wang, Kai-Cheng Chou
  • Patent number: 7154141
    Abstract: A flash EEPROM array having a double-diffused source junction that can be used for source side programming. The flash EEPROM array, when programmed from the source side exhibits fast programming rates. Additionally, source side programming of arrays having different physical characteristics (e.g. transistor cell channel length) exhibit tighter program rate distributions than for the same arrays in which drain side programming is used.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: December 26, 2006
    Assignee: Hyundai Electronics America
    Inventors: Hsingya Arthur Wang, Yuan Tang, Haike Dong, Ming Sang Kwan, Peter Rabkin
  • Publication number: 20060175780
    Abstract: A cart has an assistant stand mechanism, which includes two first casters, a pair of metallic angle plates, a support rod, and a second caster with a brake; each of the first casters is fitted to one of two rear lateral straight parts of a chassis; the metallic angle plates are each screwed onto a respective one of the rear lateral straight parts of the chassis; the support rod is secured to the metallic angle plates at two ends such that it crosses the cart, and is normally perpendicular to the ground where the cart stands; the second caster is fitted to the support rod; further, there are two sloping rods, each connected to the support rod at one end, and connected to a corresponding metallic angle plate at the other end; thus, the cart can stand on the casters with the chassis in upright position.
    Type: Application
    Filed: January 20, 2006
    Publication date: August 10, 2006
    Inventor: Arthur Wang
  • Publication number: 20050260857
    Abstract: A high selectivity and etch rate with innovative approach of inductively coupled plasma source. Preferably, the invention includes a method using plasma chemistry that is divided into main etch step of (e.g., Cl2+HBr+C4F8) gas combination and over etch step of (e.g., HBr+Ar). The main etch step provides a faster etch rate and selectivity while the over etch step will decrease the etch rate and ensure the stringer and residue removal without attacking the under layer.
    Type: Application
    Filed: May 24, 2004
    Publication date: November 24, 2005
    Applicant: Winbond Electronics Corporation
    Inventors: Kenlin Huang, K.C. Chou, Harry Luan, J.C. Young, Arthur Wang
  • Publication number: 20050186739
    Abstract: A non-volatile memory device includes a substrate having a first active region and a second active region. A first floating gate is provided over the first active region and having an edge, the first floating gate being made of a conductive material. A first spacer is connected to the edge of the first floating gate and being made of the same conductive material as that of the first floating gate. A control gate is provided proximate to the floating gate.
    Type: Application
    Filed: April 5, 2005
    Publication date: August 25, 2005
    Applicant: Hynix Semiconductor Inc.
    Inventors: Hsingya Arthur Wang, Kai-Cheng Chou, Peter Rabkin