Abstract: Systems and methods for configuring a robot to scan for features are disclosed herein. According to at least one non-limiting exemplary embodiment, a robot may be configured to scan for features within an environment by producing various computer-readable maps which may be annotated to facilitate organized and accurate feature scanning.

Abstract: An approach for modifying in real-time by removing or reinforcing stroboscopic effect from images associated with a viewing experience is disclosed. The approach includes identifying video clips, detecting environmental parameters and calculating display setting. The approach also analyzes display setting using recommendation from GAN, output displaying setting on an AR display and receiving feedback from user.

Abstract: A computer receives determines a mobile device requires a recharge, where the mobile device have a solar cell and an imaging device. The computer identifies an object with a low diffusion rate. The computer recharges the mobile device, based on determining that the mobile device receiving the solar energy from the identified object.

Abstract: To increase the efficiency of electronic design automation, a register transfer level debug application client entity requests, from a register transfer level source navigator server, combined register transfer level and hardware aspect metadata including debug instrumentation. The register transfer level debug application client entity receives, from the register transfer level source navigator server, the combined register transfer level and hardware aspect metadata including the debug instrumentation. The register transfer level debug application client entity transforms the combined register transfer level and hardware aspect metadata including the debug instrumentation. The register transfer level debug application client entity renders the transformed combined register transfer level and hardware aspect metadata including the debug instrumentation.

Abstract: A method, computer program product, and/or system is disclosed for testing integrated circuits, e.g., processors, that includes: generating a software design prototype of the functional behavior of an integrated circuit to be tested; creating a lab All-Events-Trace (AET) normalized model of the integrated circuit, wherein the normalized model captures the functions of the integrated circuit and not the non-functional aspects of the integrated circuit; generating a lab scenario using the software design prototype and the AET normalized model of the integrated circuit for a particular cycle of interest, wherein the lab scenario contains initialization for all signals that have hardware information; and generating a replayed lab normalized AET for the particular cycle of interest.

Abstract: A method, programming product, and/or system is disclosed for identifying flaws in integrated circuits, e.g., processors, that includes: selecting from a list of a plurality of timing issues in an integrated circuit, where each timing issue on the list is represented by one or more VHDL code lines, a particular timing issue to investigate; tracing back the selected one or more VHDL code lines, corresponding to the selected particular timing issue to investigate, to one or more selected physical design VHDL (PD-VHDL) code lines; logically navigating across the one or more selected PD-VHDL code lines to one or more corresponding normalized VHDL (NVDHL) code lines; and tracing back the one or more corresponding NHVDL code lines to one or more short-hand VHDL (SVHDL) code lines to identify one or more code lines, written by a code designer, responsible for the particular timing issue being investigated.

Abstract: A method includes communicating a first stream of a video comprising first and second objects to a device. The first stream has a first resolution. The method also includes communicating a second stream to the device. The second stream indicates that the first object is contextual and that the second object is non-contextual. The method further includes, after a decrease in bandwidth, communicating a third stream of the video to the device. The third stream has a second resolution that is lower than the first resolution. When the video is presented for display using the third stream and based on the second stream indicating that the first object is contextual and that the second object is non-contextual, the first object is presented in the first resolution and the second object is presented in the second resolution.

Abstract: An approach for modifying in real-time by removing or reinforcing stroboscopic effect from images associated with a viewing experience is disclosed. The approach includes identifying video clips, detecting environmental parameters and calculating display setting. The approach also analyzes display setting using recommendation from GAN, output displaying setting on an AR display and receiving feedback from user.

Abstract: A method for collaborative logic designing and debugging of a circuit includes initiating, via a session manager, a hardware debug session that includes a plurality of instances of client applications that can access one or more source-codes associated with a logic design of the circuit, the plurality of instances of client applications configured to replicate an execution state of the logic design. The method also includes analyzing, using an instance of a first client application from the plurality of instances of client applications, a defect in the logic design based on the execution state of the logic design. The method also includes editing, using an instance of a second client application from the plurality of instances of client applications, the one or more source-codes, to repair the defect in the logic design.

Abstract: To increase the efficiency of electronic design automation, a register transfer level debug application client entity requests, from a register transfer level source navigator server, combined register transfer level and hardware aspect metadata including debug instrumentation. The register transfer level debug application client entity receives, from the register transfer level source navigator server, the combined register transfer level and hardware aspect metadata including the debug instrumentation. The register transfer level debug application client entity transforms the combined register transfer level and hardware aspect metadata including the debug instrumentation. The register transfer level debug application client entity renders the transformed combined register transfer level and hardware aspect metadata including the debug instrumentation.

Abstract: A method, computer program product, and/or system is disclosed for testing integrated circuits, e.g., processors, that includes: generating a software design prototype of the functional behavior of an integrated circuit to be tested; creating a lab All-Events-Trace (AET) normalized model of the integrated circuit, wherein the normalized model captures the functions of the integrated circuit and not the non-functional aspects of the integrated circuit; generating a lab scenario using the software design prototype and the AET normalized model of the integrated circuit for a particular cycle of interest, wherein the lab scenario contains initialization for all signals that have hardware information; and generating a replayed lab normalized AET for the particular cycle of interest.

Abstract: A method includes communicating a first stream of a video comprising first and second objects to a device. The first stream has a first resolution. The method also includes communicating a second stream to the device. The second stream indicates that the first object is contextual and that the second object is non-contextual. The method further includes, after a decrease in bandwidth, communicating a third stream of the video to the device. The third stream has a second resolution that is lower than the first resolution. When the video is presented for display using the third stream and based on the second stream indicating that the first object is contextual and that the second object is non-contextual, the first object is presented in the first resolution and the second object is presented in the second resolution.

Abstract: A computer receives determines a mobile device requires a recharge, where the mobile device have a solar cell and an imaging device. The computer identifies an object with a low diffusion rate. The computer recharges the mobile device, based on determining that the mobile device receiving the solar energy from the identified object.

Abstract: Generating a contributor-based power abstract for a device, including: identifying a clock power component for each of a plurality of clock gating domains, identifying a switching characteristic for each of the clock gating domains, combining the switching characteristics for all of the clock gating domains into a domain combination list, performing a per-case simulation based at least on the domain combination list, calculating an effective capacitance for each of the clock gating domains based at least on the per-case simulation, and generating a power abstract for each of the clock gating domains based at least on the effective capacitance.

Abstract: Aspects of the invention include acoustic signature generation via user sentiment embedding. An example method includes an audio signal of user speech, obtaining a user context and a user state space for at least one user, generating a sentiment vector from the user context and the user state space, generating a set of sentiment signals for based on the sentiment vector, and embedding the audio signal with the set of sentiment signals to generate an embedded sentiment signal.

Abstract: A method for collaborative logic designing and debugging of a circuit includes initiating, via a session manager, a hardware debug session that includes a plurality of instances of client applications that can access one or more source-codes associated with a logic design of the circuit, the plurality of instances of client applications configured to replicate an execution state of the logic design. The method also includes analyzing, using an instance of a first client application from the plurality of instances of client applications, a defect in the logic design based on the execution state of the logic design. The method also includes editing, using an instance of a second client application from the plurality of instances of client applications, the one or more source-codes, to repair the defect in the logic design.

Abstract: Embodiments relate to monitoring computing hardware in a computing infrastructure facility. Image data and environmental data are received and a current operational status for a computing hardware component is determined from the image data. A hardware operational status tracking model and environment tracking model for the computing hardware component are updated. Embodiments can perform a root cause analysis if the current operational status is a fault status to determine if the fault status was caused by environmental conditions.

Abstract: A method, computer system, and computer program product for human relationship-aware augmented display are provided. The embodiment may include identifying one or more potential viewers utilizing real-time sensor data. The embodiment may also include extracting relationship information related to relationships among each identified viewer and one or more companions based on a plurality of data from a plurality of databases. The embodiment may further include creating a relationship graph based on the extracted relationship information. The embodiment may also include determining a relationship model based on the created relationship graph. The embodiment may further include mapping the determined relationship model to content. The embodiment may also include augmenting display systems with the content. The embodiment may further include displaying the augmented content on one or more display systems.

Abstract: Method, apparatus and computer program product for hierarchical power analysis using improved activity abstraction and capacitance abstraction by accounting for design heterogeneity extremities comprising extracting design heterogeneity extremities from an RTL design; accounting for the design heterogeneity extremities during macro clock and data signals activity abstraction to generate improved macro activity abstractions; accounting for the design heterogeneity extremities during macro clock and data switching capacitance abstraction to generate improved macro capacitance abstractions; and using improved macro activity abstractions and improved macro capacitance abstractions during hierarchical chip power analysis.

Abstract: Method, apparatus and computer program product for hierarchical power analysis using improved activity abstraction and capacitance abstraction by accounting for design heterogeneity extremities comprising extracting design heterogeneity extremities from an RTL design; accounting for the design heterogeneity extremities during macro clock and data signals activity abstraction to generate improved macro activity abstractions; accounting for the design heterogeneity extremities during macro clock and data switching capacitance abstraction to generate improved macro capacitance abstractions; and using improved macro activity abstractions and improved macro capacitance abstractions during hierarchical chip power analysis.