Abstract: A device includes a USB-C controller instantiated as a first integrated circuit that includes a first set of host terminals coupled to host controllers and a second set of terminals coupled to sets of D+/D? terminals of a type-C receptacle. A D+/D? multiplexer is to selectively couple the first set of host terminals to the second set of terminals. An electrostatic discharge (ESD) protection circuit is coupled between the D+/D? multiplexer and the second set of terminals. A charger detector circuit is coupled between a positive data system terminal and a negative data system terminal of the first set of terminals, the charger detector circuit to detect whether the second set of terminals is coupled to a USB charger through the type-C receptacle.

Abstract: An example electronic device includes a first switch and a second switch that are each coupled to an overvoltage detection and protection circuit. The first switch is configured to connect a first sideband use (SBU) terminal of a Universal Serial Bus Type-C (USB-C) controller to a SBU crossbar switch of the USB-C controller. The second switch is configured to connect a second SBU terminal of the USB-C controller to the SBU crossbar switch. The overvoltage detection and protection circuit is configured to deactivate the first switch or the second switch when a voltage exceeding a predetermined threshold is detected on a terminal of the first switch or the second switch.

Abstract: An electronic device includes a first switch configured to connect a VCONN supply terminal of a Universal Serial Bus Type-C (USB-C) controller to a first configuration channel (CC) terminal of the USB-C controller in response to a USB-C connector being in a first orientation. A first current may flow through the first switch. The electronic device also includes an overcurrent component coupled to the first switch. The overcurrent component includes a second switch associated with the first switch. The second switch has a second current associated with the first current. The overcurrent component is configured to determine whether the first current is greater than a threshold current based on the first current and the second current. The overcurrent component is also configured to close the first switch in response to determining that the first current is greater than the threshold current.

Abstract: A device includes a USB-C controller instantiated as a first integrated circuit, the USB-C controller comprising a first pair of terminals to communicate with a first communication protocol that is other than USB, a second pair of terminals to communicate with a second communication protocol that is other than USB, and a third pair of terminals, each of which is to be coupled to a corresponding SBU1 terminal or SBU2 terminal of a type-C receptacle. The controller further includes a multiplexer to selectively couple the first pair of terminals to the third pair of terminals and the second pair of terminals to the third pair of terminals. The controller further includes a series of cascaded, low-voltage n-type field-effect transistors (LVNFETs) coupled between the multiplexer and each terminal of the third pair of terminals.

Abstract: A device includes a USB-C controller instantiated as a first integrated circuit that includes a first set of host terminals coupled to host controllers and a second set of terminals coupled to sets of D+/D? terminals of a type-C receptacle. A D+/D? multiplexer is to selectively couple the first set of host terminals to the second set of terminals. An electrostatic discharge (ESD) protection circuit is coupled between the D+/D? multiplexer and the second set of terminals. A charger detector circuit is coupled between a positive data system terminal and a negative data system terminal of the first set of terminals, the charger detector circuit to detect whether the second set of terminals is coupled to a USB charger through the type-C receptacle.

Abstract: An electronic device includes a power switch configured to receive a voltage on a first terminal. The first terminal is coupled to a voltage regulator. The power switch is also configured to provide the voltage to a second terminal. The second terminal is coupled to a VBUS terminal of a Universal Serial Bus Type-C (USB-C) connector. The electronic device also includes a protection circuit comprising a comparison component coupled to the first terminal and the second terminal. The comparison component is configured to detect a first voltage at the first terminal detect a second voltage at the second terminal. The protection circuit is configured to determine whether the second voltage is within a threshold voltage of the first voltage and adjust operation of the power switch in response to determining that the second voltage is within the threshold voltage of the first voltage.

Abstract: An electronic device includes a first switch configured to connect a first configuration channel (CC) terminal of a Universal Serial Bus Type-C (USB-C) controller to a VCONN supply of the USB-C controller. The first CC terminal of the USB-C controller being is to directly connect to the first CC terminal of a USB-C receptacle. The electronic device includes a second switch configured to connect a second CC terminal of the USB-C controller to a control channel physical layer logic (PHY) of the USB-C controller. The second CC terminal is to directly connect to the second CC terminal of the USB-C receptacle. The electronic device includes an overvoltage detection and protection circuit configured to deactivate the first switch or the second switch when a voltage exceeding a predetermined threshold is detected. The first switch and the second switch are each coupled to the overvoltage detection and protection circuit.

Abstract: A line driver circuit can include an integrated circuit substrate of a first conductivity type having at least a first and a second well of a second conductivity type formed therein. The second well can be coupled to a first power supply node. A first transistor can be formed in the first well having a source coupled to a first input signal node, a drain coupled to a conductive line, and a gate coupled to a second input signal node. A second transistor can have a source coupled to a second power supply node, a drain coupled to the conductive line, and a gate coupled to the second input signal node. A third transistor can be formed in the second well and have a source coupled to the first power supply node, a drain coupled to the first well, and a gate coupled to receive a mode signal.

Abstract: An embodiment of the present invention is directed to a low power voltage reference circuit. The circuit includes a first circuit for generating a PTAT voltage without using an operational amplifier. The circuit also includes a second circuit for generating the reference voltage. The first and the second circuit do not utilize a resistor.

Abstract: An adaptive output driver has a number of transistors connected in series between a power supply and a ground. An adaptive bias input is coupled to a gate of one of the transistors.

Abstract: An embodiment of the present invention is directed to a low power voltage reference circuit. The circuit includes a first circuit for generating a PTAT voltage without using an operational amplifier. The circuit also includes a second circuit for generating the reference voltage. The first and the second circuit do not utilize a resistor.

Abstract: A line driver circuit can include an integrated circuit substrate of a first conductivity type having at least a first and a second well of a second conductivity type formed therein. The second well can be coupled to a first power supply node. A first transistor can be formed in the first well having a source coupled to a first input signal node, a drain coupled to a conductive line, and a gate coupled to a second input signal node. A second transistor can have a source coupled to a second power supply node, a drain coupled to the conductive line, and a gate coupled to the second input signal node. A third transistor can be formed in the second well and have a source coupled to the first power supply node, a drain coupled to the first well, and a gate coupled to receive a mode signal.