Patents by Inventor Arvind Kumar

Arvind Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12707649
    Abstract: A semiconductor module includes a first semiconductor die, which comprises (i) a power support structure and (ii) a first cache region; and a second semiconductor die, which is mounted on top of the first semiconductor die and comprises (i) a logic core, which overlies and is electrically connected to the power support structure, and (ii) a second cache region, which overlies and is electrically connected to the first cache region.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: August 11, 2026
    Assignee: International Business Machines Corporation
    Inventors: Arvind Kumar, Todd Edward Takken, John W Golz, Joshua M. Rubin
  • Publication number: 20260226234
    Abstract: The invention relates to a batch process for preparing a polyether alcohol P having a hydroxyl number of greater than 115 mg KOH/g by reacting starter compound S1 and starter compound S2, which starter compounds have one active hydrogen atom or a plurality of active hydrogen atoms, with one or more alkylene oxides in the presence of a composite metal cyanide complex catalyst, comprising a) forming a starter mixture comprising starter compound S1 and the catalyst and activating the catalyst by adding more than 10 wt.
    Type: Application
    Filed: February 27, 2024
    Publication date: August 6, 2026
    Inventors: Paul DAVIS, Sandip TALWALKAR, Prshant Anil TATAKE, Saikiran MALEPPAGARI, Rama Tejaswi KARIPEDDI, Prem Kumar DHANAPAL, Arvind KUMAR
  • Publication number: 20260226233
    Abstract: A batch process for preparing a polyether alcohol P having a hydroxyl number of greater than 115 mg KOH/g. The process starts by a) forming a starter mixture comprising starter compound S1 and a composite metal cyanide complex catalyst and activating the catalyst by adding an alkylene oxide, followed by b) continuously adding an alkylene oxide; and c) continuously adding starter compound S2.; No alkylene oxide is added between steps a) and b), and the continuous addition of alkylene oxide in step b) is not interrupted before the total weight of alkylene oxide needed to prepare polyether alcohol P has been added; step c) is stopped before step b) is stopped and once less than 80% of the total weight of alkylene oxide needed to prepare polyether alcohol P has been added in step b).
    Type: Application
    Filed: February 27, 2024
    Publication date: August 6, 2026
    Inventors: Paul DAVIS, Sandip Shripad TALWALKAR, Prashant Anil TATAKE, Saikiran MALEPPAGARI, Rama Tejaswi KARIPEDDI, Prem Kumar DHANAPAL, Arvind KUMAR
  • Patent number: 12694154
    Abstract: Methods, apparatus, and systems are disclosed for container attestation in client-based workloads. An example apparatus includes at least one memory, machine readable instructions, and processor circuitry to at least one of instantiate or execute the machine readable instructions to access a container attestation and an owner policy, the container attestation including a first signature and the owner policy including a second signature, determine that the first signature and the second signature are valid, iterate through configuration sets of the owner policy to identify a match between a claim of the container attestation and a configuration set, identify a resource constraint associated with the configuration set, and generate a resource description based on the resource constraint, the resource description to determine execution of a container workload on a client-based platform.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: July 28, 2026
    Assignee: Intel Corporation
    Inventors: Garritt Binder, Mousumi Hazra, Arvind Kumar, Curtis Jutzi, Rakshmi Bhatia
  • Publication number: 20260207686
    Abstract: The present invention relates to efficient delivery of antibiotic activity, immunomodulatory factors, or growth-promoting biomolecules directly to the digestive tract of an animal via a live delivery platform. The live delivery platform can be a genetically modified microorganism. Delivery can be accomplished with a Lactobacillus sp which colonizes the gastrointestinal tract. The anti-infective activity can be a bacteriocidal or bacteriostatic peptide, an antibody or fragment thereof which specifically recognizes a pathogen, or a phage, or a lytic peptide from a phage which specifically targets a certain pathogen.
    Type: Application
    Filed: March 12, 2026
    Publication date: July 23, 2026
    Inventors: Dharanesh Mahimapura GANGAIAH, Arvind KUMAR, Lin LIU, Shrinivasrao Peerajirao MANE, Valerie Elyse RYAN
  • Publication number: 20260201105
    Abstract: The invention relates to a batch process for preparing a polyether alcohol P having a hydroxyl number of equal to or lower than 115 mg KOH/g by reacting starter compound S1 and starter compound S2, which starter compounds have one active hydrogen atom or a plurality of active hydrogen atoms, with one or more alkylene oxides in the presence of a composite metal cyanide complex catalyst, comprising a) forming a starter mixture comprising starter compound S1 and the catalyst and activating the catalyst by adding an alkylene oxide, followed by b) continuously adding an alkylene oxide; and c) continuously adding starter compound S2; wherein no alkylene oxide is added between steps a) and b), and the continuous addition of alkylene oxide in step b) is not interrupted before the total weight of alkylene oxide needed to prepare polyether alcohol P has been added; and step c) starts before step b).
    Type: Application
    Filed: December 13, 2023
    Publication date: July 16, 2026
    Inventors: Paul DAVIS, Sandip Shripad TALWALKAR, Prashant Anil TATAKE, Saikiran MALEPPAGARI, Rama Tejaswi KARIPEDDI, Prem Kumar DHANAPAL, Arvind KUMAR
  • Patent number: 12667012
    Abstract: An apparatus includes a chip package that has a chip connection surface and has an array of micro-bumps on the chip connection surface. The array of micro-bumps includes a plurality of subarrays of micro-bumps. Micro-bumps within each subarray are spaced apart by a chip pitch and the subarrays within the array are spaced apart by a card pitch that is an integer multiple of the chip pitch. The apparatus also includes a laminate circuit card that has a card connection surface that faces the chip connection surface of the chip package and that has an array of card pads adjacent to the card connection surface. The card pads are spaced apart by the card pitch, and each of the card pads is aligned to and electrically connected with a corresponding subarray of micro-bumps. In some embodiments, an interposer connects the card pads to the micro-bumps, and may include decoupling capacitors.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: June 23, 2026
    Assignee: International Business Machines Corporation
    Inventors: David Michael Audette, Grant Wagner, Steven Paul Ostrander, Hubert Harrer, Arvind Kumar, Thomas Anthony Wassick, Matthew Sean Grady, Sungjun Chun
  • Publication number: 20260170510
    Abstract: Systems and methods for processing and evaluation of electronic documents are disclosed. A digital twin machine learning model is trained using a product taxonomy, a criteria knowledge base, and previous applications of the criteria to previous sets of digital files. A set of digital files is received and image processing is applied to the set of digital files to identify contents in each of the set of digital files. The set of digital files is analyzed using the digital twin machine learning model to identify one of a set of completion criteria to evaluate the set of digital files. For each of the set of digital files determine the classification in accordance with the product taxonomy and determine whether the digital file has a required classification. In response to determining a document does not meet completion criteria, identification of a required action for satisfying the document completion criteria is displayed.
    Type: Application
    Filed: December 12, 2024
    Publication date: June 18, 2026
    Applicant: C T Corporation System
    Inventors: Abhishek Mittal, Amit Gupta, Rajiv Arora, Varun Dixit, Arvind Kumar, Yogesh Kumar
  • Publication number: 20260172083
    Abstract: Systems and methods described provide a multiple-input multiple-output (MIMO) optimization service. A network device in a RAN predicts high usage thresholds and available per-service resources for supporting MIMO transmissions. The network device identifies, based on the predicted usage thresholds, user equipment (UE) devices that have a high-throughput session and have high usage levels on a cell. The network device assigns, based on the predicted available per-service resources, sounding reference signal (SRS)-based MIMO resources to the UE devices in the cell and assigns codebook-based MIMO resources to other UE devices in the cell.
    Type: Application
    Filed: January 29, 2026
    Publication date: June 18, 2026
    Inventors: Arvind Kumar, Sachin Vargantwar
  • Patent number: 12656390
    Abstract: A semiconductor integrated circuit device includes: an active bridge; a first chiplet and a second chiplet mounted onto the active bridge; and a short-to-long converter circuit (SLCC) that has analog and digital portions. The active bridge includes at least the analog portion of the SLCC, which is electrically connected to at least the first chiplet; and a short-reach physical layer that electrically connects the first chiplet and the second chiplet. The first chiplet includes a first logic core; a first chiplet interface that is electrically connected between the first logic core and the SLCC; and a second chiplet interface that is electrically connected between the first logic core and the second chiplet. The second chiplet includes a second logic core; and a third chiplet interface that is electrically connected between the second logic core and the second chiplet interface. The active bridge also can include a built-in-self-test (BIST) circuit.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: June 16, 2026
    Assignee: International Business Machines Corporation
    Inventors: Arvind Kumar, Ramachandra Divakaruni, Mukta Ghate Farooq, John W Golz, Jin Ping Han, Mounir Meghelli
  • Publication number: 20260158815
    Abstract: The present invention discloses an instrument for solving problems of geometry, including a primary unit, a secondary unit and a tab set. The primary unit includes a plurality of outer edges and an inner edge defining a hollow space. A bar defines a gap with respect to a solid edge of the secondary unit The tab set is slidably disposed within the gap. A first section of the tab set includes one or more holes to enable a user to draw on a drawing surface. A second section of the tab set slides over the solid edge. The inner edge of the primary unit is configured to sit flush over a peripheral edge of the secondary unit.
    Type: Application
    Filed: March 25, 2022
    Publication date: June 11, 2026
    Inventors: ARVIND KUMAR, RIMJHIM SHARMA
  • Publication number: 20260150146
    Abstract: A method, a network device, and a non-transitory computer-readable storage medium are described in relation to a reestablishment connectivity service. The reestablishment connectivity service may include generating and providing minimum receive level cell information used only for reestablishment by end devices. The minimum receive level cell information may include a minimum receive level value, such as a qRXLevMin value associated with a cell selection criterion. The minimum receive level cell information may include correlated data, such as a Fifth Generation Quality of Service Identifier (5QI) value, an application service identifier, a category of an application service, or a traffic characteristic value. The minimum receive level value may differ from a minimum receive level value for non-reestablishment by end devices.
    Type: Application
    Filed: November 27, 2024
    Publication date: May 28, 2026
    Inventors: Arvind Kumar, Sachin Vargantwar, Robert Walley
  • Publication number: 20260137736
    Abstract: The present invention provides probiotic compositions and methods for improving animal health. The probiotic compositions include one or more isolated strains of Lactobacillus reuteri which colonizes the gastrointestinal tract to increase the health of an animal, including to alleviate the effects of chronic alcohol consumption, leaky gut, increased intestinal permeability and inflammation and treat or prevent alcohol-associated intestinal dysbiosis, leaky gut, increased intestinal permeability and inflammation, including intestinal inflammation associated with inflammatory bowel disease.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 21, 2026
    Inventors: Arvind Kumar, Dharanesh Mahimapura Gangaiah
  • Publication number: 20260119630
    Abstract: Systems and methods for multi-modal user device authentication are disclosed. An example electronic device includes a first sensor, a microphone, a first camera, and a confidence analyzer to authenticate a subject as the authorized user in response to a user presence detection analyzer detecting a presence of the subject and one or more of (a) an audio data analyzer detecting a voice of an authorized user or (b) an image data analyzer detecting a feature of the authorized user. The example electronic device includes a processor to cause the electronic device to move from a first power state to a second power state in response to the confidence analyzer authenticating the user as the authorized user. The electronic device is to consume a greater amount of power in the second power state than the first power state.
    Type: Application
    Filed: December 27, 2024
    Publication date: April 30, 2026
    Applicant: Intel Corporation
    Inventors: Aleksander Magi, Barnes Cooper, Arvind Kumar, Julio Zamora Esquivel, Vivek Paranjape, William Lewis, Marko Bartscherer, Giuseppe Raffa
  • Publication number: 20260107704
    Abstract: Exemplary semiconductor processing methods may include forming a barrier layer on a first source/drain material disposed on a substrate housed within a processing region of a semiconductor processing chamber. The first source/drain material may be doped with a dopant. The methods may include growing an epitaxial silicon-containing material on the barrier layer. The barrier layer may reduce an amount of diffusion of the dopant from the first source/drain material into the epitaxial silicon-containing material.
    Type: Application
    Filed: November 26, 2024
    Publication date: April 16, 2026
    Applicant: Applied Materials, Inc.
    Inventors: Arvind Kumar, Arkka Bhattacharyya, Zuoming Zhu, Abhishek Dube
  • Patent number: 12599637
    Abstract: The present invention relates to efficient delivery of anti-infective activity, immunomodulatory factors, or growth-promoting biomolecules directly to the digestive tract of an animal via a live delivery platform. The live delivery platform can be a genetically modified microorganism. Delivery can be accomplished with a Lactobacillus sp which colonizes the gastrointestinal tract. The anti-infective activity can be a bacteriocidal or bacteriostatic peptide, an antibody or fragment thereof which specifically recognizes a pathogen, or a phage, or a lytic peptide from a phage which specifically targets a certain pathogen.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: April 14, 2026
    Assignee: BiomEdit, Inc.
    Inventors: Dharanesh Mahimapura Gangaiah, Arvind Kumar, Lin Liu, Shrinivasrao Peerajirao Mane, Valerie Elyse Ryan
  • Publication number: 20260099332
    Abstract: An integrated circuit includes a host die and a base die, both of which are disposed on an interposer. The host die includes multiple processors, and the base die includes at least two high-bandwidth memory (HBM) stacks that are disposed on the base die and communicate with the host die through the base die and the interposer. The at least two HBM stacks and the host die are arranged in a row with the host die at one end of the row. The base die further includes compute circuitry to receive data from one or both of the HBM stacks and to execute instructions received from the host die. At least a portion of the compute circuitry is disposed on the base die between the two HBM stacks.
    Type: Application
    Filed: May 23, 2025
    Publication date: April 9, 2026
    Inventors: Arvind Kumar, Mahesh K. Kumashikar, Ankireddy Nalamalpu
  • Patent number: 12595251
    Abstract: Compounds and methods for the treatment of a bacterial infection or the potentiation of an antibiotic in treating a bacterial infection are described herein.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: April 7, 2026
    Assignee: GEORGIA STATE UNIVERSITY RESEARCH FOUNDATION, INC.
    Inventors: Binghe Wang, David W. Boykin, Manjusha Roy Choudhary, Arvind Kumar, Bingchen Yu, Mengyuan Zhu
  • Publication number: 20260093618
    Abstract: A memory controller in an integrated circuit system includes a receiver circuit that performs oversampling in time and voltage. The receiver circuit receives a data signal with pulse amplitude modulation (PAM) having N signal levels from a memory module over a data lane, N > 2. The receiver circuit generates K samples by sampling the data signal at a sequence of time points in a unit time interval. The receiver circuit uses R voltage comparator blocks to generate R signal level estimates from the same sample out of the K samples. The voltage comparator blocks compare the same sample against (N-1) voltage thresholds with different offsets configured for different voltage comparator blocks. The receiver circuit identifies one of the N signal levels to which the data signal is mapped based on all signal level estimates generated from the K samples, and outputs a symbol corresponding to the identified signal level.
    Type: Application
    Filed: September 23, 2025
    Publication date: April 2, 2026
    Inventors: Arvind Kumar, Mahesh K. Kumashikar, Ankireddy Nalamalpu
  • Patent number: D1130403
    Type: Grant
    Filed: September 13, 2023
    Date of Patent: June 16, 2026
    Assignee: Intel Corporation
    Inventors: Jim Okuley, Murali Veeramoney, Prosenjit Ghosh, Denica N Larsen, Martin Bone, Gregory Germe, Hong W. Wong, Arvind Kumar