Patents by Inventor Arvind Kumar

Arvind Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240306391
    Abstract: Two-dimensional (2D) materials formed in very thin layers improve the operation of semiconductor devices. However, forming a contact on 2D material tends to damage and penetrate the 2D material. A relatively gentle etch process has been developed that is very selective to the 2D material and allows vertical holes to be etched down to the 2D material without damaging or penetrating the 2D material. A low-power deposition process forms a protective liner when performing the metal fill to further prevent damage to the 2D material when forming the metal contacts in the holes. These processes allow a vertical metal contact to be formed on a planar 2D material or a vertical sidewall contact be formed in a 3D NAND without damaging the 2D material. This increases the contact area, reduces the contact resistance, and improves the performance of the 2D material in the device.
    Type: Application
    Filed: March 6, 2024
    Publication date: September 12, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Hao-Ling Tang, Arvind Kumar, Mahendra Pakala, Keith Tatseun Wong, Yi-Hsuan Hsiao, Dongqing Yang, Mark Conrad, Rio Soedibyo, Minrui Yu
  • Patent number: 12081162
    Abstract: A method and associated system provide grid-forming mode (GFM) control of an inverter-based renewable energy source having an asynchronous machine connected to a power grid. The method includes deriving a power error signal (PER) between a real power output (PB) from the renewable energy source and a power reference (PREF) representing a desired power output of the renewable energy source. With an inertial power regulator, a phase shift angle (?IT) is generated from the power error signal (PER) to provide virtual synchronous machine (VSM) control functionality to the GFM control of the renewable energy source. A power angle compensation (??) is applied to the phase shift angle (?IT) from the inertial power regulator to dampen power oscillations and load fluctuations during transient power events.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: September 3, 2024
    Assignee: General Electric Renovables Espana, S.L.
    Inventors: Rupam Basak, Arvind Kumar Tiwari, Veena Padmarao, Rabisankar Roy
  • Patent number: 12074530
    Abstract: A method of operating a wind converter is provided. The method includes receiving a plurality of forecasted datasets. The forecasted datasets include event signals for the wind converter during fast transient operating conditions (OCs) and operational data for the wind converter having a low sampling rate. The method further includes estimating a converter life consumption during normal OCs and a converter life consumption during the fast transient OCs. Further, the method includes computing a total converter life consumption of the wind converter. Moreover, the method includes predicting, using a remaining useful life (RUL) prediction module, an RUL for the wind converter based on the total converter life consumption. The method further includes adjusting operation of the wind converter by adjusting operating variables of the wind converter.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: August 27, 2024
    Assignee: GENERAL ELECTRIC RENOVABLES ESPAÑA, S.L.
    Inventors: Lijun He, Honggang Wang, Alexandre Lagarde, Virginie Peron, Raphael de Rocca-Serra, Arvind Kumar Tiwari, Liwei Hao
  • Publication number: 20240250070
    Abstract: Embodiments of the present invention are directed to processing methods and resulting structures for three-dimensional integrated circuits (3D ICs) having facilitator dies in a hierarchical configuration. In a non-limiting embodiment, a method includes forming a plurality of stacked dies. The plurality of stacked dies includes a bottom die having a first die type, a plurality of upper dies having a second die type different than the first die type, and a facilitator die having a third die type different than the first die type and the second die type. At least one of a signal connection and a power distribution line are formed hierarchically between the bottom die, the plurality of upper dies, and the facilitator die.
    Type: Application
    Filed: January 25, 2023
    Publication date: July 25, 2024
    Inventors: Kyu-hyoun Kim, Arvind Kumar, Joshua M. Rubin, John W. Golz, Mounir Meghelli
  • Publication number: 20240248128
    Abstract: A method for preventing damage in a bearing of a generator of an electrical power system having a power conversion assembly with a first converter coupled to a second converter, and the power conversion assembly electrically coupled to the generator. Further, the method includes monitoring a phase current and voltage of the first converter. The method also includes calculating a common mode power using the phase current and the voltage of the first converter. Moreover, the method includes comparing the common mode power to a predefined power threshold. The method also includes determining whether the common mode power is indicative of degradation in at least one of a bearing insulation or a ground brush based on the comparison of the common mode power to the predefined power threshold.
    Type: Application
    Filed: January 24, 2023
    Publication date: July 25, 2024
    Inventors: Kapil Jha, Rupam Mukherjee, Arvind Kumar Tiwari
  • Publication number: 20240222223
    Abstract: An exemplary apparatus includes a substrate; a plurality of chips mounted onto the substrate; a plurality of cold plates corresponding to the plurality of chips; means for pressing each of the cold plates toward a corresponding one of the chips; means for delivering coolant flow to the cold plates; and means for adjusting the cooling power of the plurality of cold plates, responsive to at least one sensed parameter of the plurality of chips.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Inventors: Timothy J. Chainer, Todd Edward Takken, Joshua M. Rubin, Arvind Kumar
  • Publication number: 20240213217
    Abstract: An apparatus includes a chip package that has a chip connection surface and has an array of micro-bumps on the chip connection surface. The array of micro-bumps includes a plurality of subarrays of micro-bumps. Micro-bumps within each subarray are spaced apart by a chip pitch and the subarrays within the array are spaced apart by a card pitch that is an integer multiple of the chip pitch. The apparatus also includes a laminate circuit card that has a card connection surface that faces the chip connection surface of the chip package and that has an array of card pads adjacent to the card connection surface. The card pads are spaced apart by the card pitch, and each of the card pads is aligned to and electrically connected with a corresponding subarray of micro-bumps. In some embodiments, an interposer connects the card pads to the micro-bumps, and may include decoupling capacitors.
    Type: Application
    Filed: December 21, 2022
    Publication date: June 27, 2024
    Inventors: David Michael Audette, Grant Wagner, Steven Paul Ostrander, Hubert Harrer, Arvind Kumar, Thomas Anthony Wassick, Matthew Sean Grady, Sungjun Chun
  • Publication number: 20240215270
    Abstract: Heterogeneous integration semiconductor packages with voltage regulation are described. A semiconductor device can include a chip including a memory device and a plurality of through-silicon-vias (TSVs). The semiconductor device can further include a processor arranged on top of the chip. The processor can be configured to communicate with the memory device via a plurality of interconnects. The semiconductor device can further include at least one voltage regulator arranged on top of the chip. The at least one voltage regulator can be configured to regulate power being provided from the plurality of TSVs to the processor.
    Type: Application
    Filed: December 22, 2022
    Publication date: June 27, 2024
    Inventors: Mukta Ghate Farooq, Arvind Kumar
  • Publication number: 20240205269
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to improve device connectivity. An example system includes an electronic device to broadcast a message including a uniform resource indicator (URI), the URI corresponding to the electronic device, and an endpoint device to, after obtaining the message, launch a user interface to display a request for authorization to connect to the electronic device, after obtaining the authorization, retrieve an instance of a container based on the URI, and execute a service with the container based on data obtained from the electronic device.
    Type: Application
    Filed: December 20, 2022
    Publication date: June 20, 2024
    Inventors: Arvind Kumar, Duncan Glendinning, Chia-Hung S. Kuo, Anand Rangarajan, Gautam Singh
  • Patent number: 12015275
    Abstract: A hybrid power plant including a plurality of power sources and controllers, a hybrid plant controller, and a computing system. The controllers operate the power sources according to operating set points. The hybrid plant controller transmits the operating set points to the controllers. The computing system is coupled to the hybrid plant controller and receives a first set of input parameters from a first subscriber, and carries out a first level of services to which the first subscriber subscribes to determine operating parameters for the first subscriber. The computing system receives a second set of input parameters from a second subscriber and carries out a second level of services to which the second subscriber subscribes to determine operating parameters for the second subscriber. The computing system then computes the operating set points based on aggregate operating parameters for the first and second subscribers.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: June 18, 2024
    Assignee: General Electric Company
    Inventors: Rajni Burra, Deepak Raj Sagi, Arvind Kumar Tiwari
  • Publication number: 20240185170
    Abstract: Disclosed are systems, apparatuses, methods, and computer readable medium, and circuits for tracking shipment services. A method includes: obtaining, from a mobile computing device, a shipment information associated with a booking of a load and asset information corresponding to a physical asset associated with transport of the load; identifying one or more sources of location data for the physical asset based on the asset information; and generating tracking information for the load by associating the one or more sources of location data for the physical asset with the shipment information associated with the booking of the load.
    Type: Application
    Filed: February 16, 2024
    Publication date: June 6, 2024
    Applicant: FourKites, Inc.
    Inventors: Mathew Elenjickal, Jason Eversole, Courtland Halbrook, Jyoti Prakash Mishra, Karthik Arvind Kumar, Karthikeyan Somanathan, Thamizh Pandian, Sathish Kuppuswamy, Kirubakaran Kathirvel, Hemavathi JN
  • Publication number: 20240162192
    Abstract: A semiconductor module includes a first semiconductor die, which comprises (i) a power support structure and (ii) a first cache region; and a second semiconductor die, which is mounted on top of the first semiconductor die and comprises (i) a logic core, which overlies and is electrically connected to the power support structure, and (ii) a second cache region, which overlies and is electrically connected to the first cache region.
    Type: Application
    Filed: November 15, 2022
    Publication date: May 16, 2024
    Inventors: Arvind Kumar, Todd Edward Takken, John W Golz, Joshua M. Rubin
  • Patent number: 11974423
    Abstract: Examples herein relate to three-dimensional (3D) dynamic random access memory (DRAM) devices and replacement channel processes for fabricating 3D DRAM devices. In an example, a gate dielectric layer is formed on a sacrificial material, and a gate electrode is formed on the gate dielectric layer. After the gate electrode is formed, the sacrificial material is removed and replaced by a semiconductor material. A channel region of a device (e.g., a transistor) that includes the gate dielectric layer and gate electrode is formed in the semiconductor material. The channel region can be vertical or horizontal with respect to a main surface of a substrate on which the device is formed. A capacitor can be formed, such as before or after the semiconductor material is formed, and is electrically connected to the semiconductor material. The device and the capacitor together can form at least part of a 3D DRAM cell.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: April 30, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Fredrick Fishburn, Arvind Kumar, Sony Varghese
  • Publication number: 20240111341
    Abstract: Methods and apparatus to operate closed-lid portable computers are disclosed. An example portable computer includes a first display on a lid of the portable computer, the first display to be deactivated when the lid is in a closed position; a second display distinct from the first display, the second display to be visible when the lid is in the closed position; instructions; and processor circuitry to execute the instructions to cause activation of the first display in response to a user interaction with the second display while the lid is in the closed position.
    Type: Application
    Filed: November 30, 2023
    Publication date: April 4, 2024
    Inventors: Barnes Cooper, Aleksander Magi, Arvind Kumar, Giuseppe Raffa, Wendy March, Marko Bartscherer, Irina Lazutkina, Duck Young Kong, Meng Shi, Vivek Paranjape, Vinod Gomathi Nayagam, Glen J. Anderson
  • Publication number: 20240103065
    Abstract: A semiconductor integrated circuit device includes: an active bridge; a first chiplet and a second chiplet mounted onto the active bridge; and a short-to-long converter circuit (SLCC) that has analog and digital portions. The active bridge includes at least the analog portion of the SLCC, which is electrically connected to at least the first chiplet; and a short-reach physical layer that electrically connects the first chiplet and the second chiplet. The first chiplet includes a first logic core; a first chiplet interface that is electrically connected between the first logic core and the SLCC; and a second chiplet interface that is electrically connected between the first logic core and the second chiplet. The second chiplet includes a second logic core; and a third chiplet interface that is electrically connected between the second logic core and the second chiplet interface. The active bridge also can include a built-in-self-test (BIST) circuit.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 28, 2024
    Inventors: Arvind Kumar, Ramachandra Divakaruni, Mukta Ghate Farooq, John W. Golz, JIN PING HAN, Mounir Meghelli
  • Patent number: 11934700
    Abstract: Aspects of a storage device are provided that handle pairing and atomic processing of fused commands received from submission queues based on data structures such as a linked lists which the controller respectively associates with each submission queue. A memory of the storage device includes a plurality of data structures each associated with a different submission queue. A controller of the storage device receives a first command for a fused operation from a submission queue, stores the first command in a data structure, receives a second command for the fused operation from the submission queue, determines whether the second command corresponds to the fused operation, stores the second command in the data structure in response to the determination, and performs the fused operation in response to storing the second command. As a result, fused command handling may be achieved with minimal impact to queue arbitration logic and command latency.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: March 19, 2024
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Rahul Jain, Arvind Kumar V M
  • Publication number: 20240089136
    Abstract: Methods, computer systems, and computer-storage media, and graphical user interfaces are provided for facilitating efficient meeting management, according to embodiments of the present technology. In one embodiment, engagement data associated with an attendee of an online meeting is obtained. Thereafter, an engagement metric is generated using the engagement data, the engagement metric indicating an extent of engagement of the attendee to the online meeting. Based on the engagement metric indicating that the extent of engagement of the attendee to the online meeting falls below an engagement threshold, a request is provided to disconnect or throttle an audio and/or video stream of the online meeting to and/or from an attendee device associated with the attendee of the online meeting. Efficient meeting management may also be performed by clustering related messages.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Pranavasthitha TANDRA, Hitesh Kumar JHAMB, Vikram GUPTA, Arvind Kumar SINGH, Anubhuti ARUN, Ashutosh TRIPATHI, Kausik GHATAK, Aman RASTOGI
  • Patent number: 11921871
    Abstract: Systems, apparatuses and methods may provide for detecting an identifier communication from a writing implement and transitioning a previously modified interior page of an electronic notepad from a locked state to an unlocked state if the identifier communication corresponds to one or more stored identifiers. Moreover, a plurality of additional interior pages of the electronic notepad may be maintained in the locked state while the previously modified interior page is in the unlocked state.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: March 5, 2024
    Assignee: Intel Corporation
    Inventors: Arvind Kumar, James M. Okuley
  • Patent number: 11923783
    Abstract: A method for operating a multi-level bridge power converter includes arranging a plurality of switching devices including at least four inner switching devices and at least two outer switching devices in an active neutral point clamped topology. The method also includes determining whether any of the switching devices is experiencing a failure condition by implementing a failure detection algorithm. The failure detection algorithm includes generating a blocking state logic signal by comparing a switching device voltage and a threshold reference voltage for each of the switching devices, determining an expected voltage blocking state for each of the switching devices based on gate drive signals of the switching devices and an output current direction, and detecting whether a failure condition is present in any of the switching devices based on the blocking state logic signals and the expected voltage blocking states of the switching devices.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: March 5, 2024
    Assignee: General Electric Renovables Espana, S.L.
    Inventors: Kapil Jha, Fernando Arturo Ramirez Sanchez, Nathaniel Robert Michener, Arvind Kumar Tiwari, Robert Gregory Wagoner, Joseph Kiran Banda
  • Publication number: 20240072698
    Abstract: A method and associated system provide grid-forming mode (GFM) control of an inverter-based renewable energy source having an asynchronous machine connected to a power grid. The method includes deriving a power error signal (PER) between a real power output (PB) from the renewable energy source and a power reference (PREF) representing a desired power output of the renewable energy source. With an inertial power regulator, a phase shift angle (?IT) is generated from the power error signal (PER) to provide virtual synchronous machine (VSM) control functionality to the GFM control of the renewable energy source. A power angle compensation (??) is applied to the phase shift angle (?IT) from the inertial power regulator to dampen power oscillations and load fluctuations during transient power events.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Rupam Basak, Arvind Kumar Tiwari, Veena Padmarao, Rabisankar Roy