Patents by Inventor Atsuo Isobe

Atsuo Isobe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110114964
    Abstract: To provide a liquid crystal display device having high quality display by obtaining a high aperture ratio while securing a sufficient storage capacitor (Cs), and at the same time, by dispersing a load (a pixel writing-in electric current) of a capacitor wiring in a timely manner to effectively reduce the load. A scanning line is formed on a different layer from a gate electrode and the capacitor wiring is arranged so as to be parallel with a signal line. Each pixel is connected to the individually independent capacitor wiring via a dielectric. Therefore, variations in the electric potential of the capacitor wiring caused by a writing-in electric current of a neighboring pixel can be avoided, whereby obtaining satisfactory display images.
    Type: Application
    Filed: January 24, 2011
    Publication date: May 19, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hiroshi SHIBATA, Atsuo ISOBE
  • Patent number: 7943885
    Abstract: By laser beam being slantly incident to the diffractive optics, an aberration such as astigmatism or the like is occurred, and the shape of the laser beam is made linear on the irradiation surface or in its neighborhood. Since the device has a very simple configuration, the optical adjustment is easier, and the device becomes compact in size. Furthermore, since the beam is slantly incident with respect to the irradiated body, the return beam can be prevented.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: May 17, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro Tanaka, Hidekazu Miyairi, Aiko Shiga, Akihisa Shimomura, Atsuo Isobe
  • Patent number: 7923778
    Abstract: A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substrate. A TFT having a sidewall is formed over the base insulating film, and a metal film is formed to cover the TFT. Annealing is conducted by RTA or the like at such a temperature that does not cause shrinkage of the substrate, and a high-resistant metal silicide layer is formed in source and drain regions. After removing an unreacted metal film, laser irradiation is conducted for the second annealing; therefore a silicide reaction proceeds and the high-resistant metal silicide layer becomes a low-resistant metal silicide layer.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: April 12, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuji Yamaguchi, Atsuo Isobe, Satoru Saito
  • Publication number: 20110049588
    Abstract: An object of an embodiment of the disclosed invention is to provide a semiconductor device including a photoelectric conversion element with excellent characteristics. An object of an embodiment of the disclosed invention is to provide a semiconductor device including a photoelectric conversion device with excellent characteristic through a simple process. A semiconductor device is provided, which includes a light-transmitting substrate; an insulating layer over the light-transmitting substrate; and a photoelectric conversion element over the insulating layer.
    Type: Application
    Filed: August 17, 2010
    Publication date: March 3, 2011
    Inventors: Atsuo Isobe, Noriko Harima, Noriko Matsumoto, Akihisa Shimomura, Kosei Noda, Kazuko Yamawaki, Yoshiyuki Kurokawa, Takayuki Ikeda, Takashi Hamada
  • Publication number: 20110033990
    Abstract: It is an object of an invention disclosed in the present specification to provide a transistor having low contact resistance. In the transistor, a semiconductor film including an impurity element imparting P-type or N-type conductivity, an insulating film formed thereover, and an electrode or a wiring that is electrically connected to the semiconductor film through a contact hole formed at least in the insulating film are included; the semiconductor film has a first range of a concentration of the impurity element (1×1020/cm3 or less) that is included in a deeper region than predetermined depth, and a second range of a concentration of the impurity element (more than 1×1020/cm3) that is included in a shallower region than the predetermined depth; and a deeper region than a portion in contact with the electrode or the wiring in the semiconductor film is in the first range of the concentration of the impurity element.
    Type: Application
    Filed: October 20, 2010
    Publication date: February 10, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Atsuo ISOBE, Keiko SAITO, Tomohiko SATO
  • Publication number: 20110031561
    Abstract: The present invention provides a semiconductor device which suppresses a short circuit and a leakage current between a semiconductor film and a gate electrode generated by a break or thin thickness of a gate insulating film in an end portion of a channel region of the semiconductor film, and the manufacturing method of the semiconductor device. Plural thin film transistors which each have semiconductor film provided over a substrate continuously, conductive films provided over the semiconductor film through a gate insulating film, source and drain regions provided in the semiconductor film which are not overlapped with the conductive films, and channel regions provided in the semiconductor film existing under the conductive films and between the source and drain regions. And impurity regions provided in the semiconductor film which is not overlapped with the conductive film and provided adjacent to the source and drain regions.
    Type: Application
    Filed: October 21, 2010
    Publication date: February 10, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tamae TAKANO, Atsuo ISOBE
  • Patent number: 7868328
    Abstract: The present invention provides a semiconductor device capable of being mass-produced and a manufacturing method of the semiconductor device. The present invention also provides a semiconductor device using an extreme thin integrated circuit and a manufacturing method of the semiconductor device. Further, the present invention provides a low power consumption semiconductor device and a manufacturing method of the semiconductor device. According to one aspect of the present invention, a semiconductor device that has a semiconductor nonvolatile memory element transistor over an insulating surface in which a floating gate electrode of the memory transistor is formed by a plurality of conductive particles or semiconductor particles is provided.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: January 11, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Atsuo Isobe, Tetsuji Yamaguchi, Hiromichi Godo
  • Patent number: 7867873
    Abstract: A method of manufacturing a semiconductor substrate is demonstrated, which enables the formation of a single crystal semiconductor layer on a substrate having an insulating surface. The manufacturing method includes the steps of: ion irradiation of a surface of a single-crystal semiconductor substrate to form a damaged region; laser light irradiation of the single-crystal semiconductor substrate; formation of an insulating layer on the surface of the single-crystal semiconductor substrate; bonding the insulating layer with a substrate having an insulating surface; separation of the single-crystal semiconductor substrate at the damaged region, resulting in a thin single-crystal semiconductor layer on the surface of the substrate having the insulating surface; and laser light irradiation of the surface of the single-crystal semiconductor layer which is formed on the substrate having the insulating surface.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: January 11, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Hiromichi Godo, Atsuo Isobe
  • Publication number: 20100297809
    Abstract: It is an object to form a high quality gate insulating film which is dense and has a strong insulation resistance property, and to propose a high reliable organic transistor in which a tunnel leakage current is little. One mode of the organic transistor of the present invention has a step of forming the gate insulating film by forming the conductive layer which becomes the gate electrode activating oxygen (or gas including oxygen) or nitrogen (or gas including nitrogen) or the like using dense plasma in which density of electron is 1011 cm?3 or more, and electron temperature is a range of 0.2 eV to 2.0 eV with plasma activation, and reacting directly with a portion of the conductive layer which becomes the gate electrode to be insulated.
    Type: Application
    Filed: August 5, 2010
    Publication date: November 25, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Ryota IMAHAYASHI, Shinobu FURUKAWA, Atsuo ISOBE, Yasuyuki ARAI, Shunpei YAMAZAKI
  • Patent number: 7829394
    Abstract: The present invention provides a semiconductor device which suppresses a short circuit and a leakage current between a semiconductor film and a gate electrode generated by a break or thin thickness of a gate insulating film in an end portion of a channel region of the semiconductor film, and the manufacturing method of the semiconductor device. Plural thin film transistors which each have semiconductor film provided over a substrate continuously, conductive films provided over the semiconductor film through a gate insulating film, source and drain regions provided in the semiconductor film which are not overlapped with the conductive films, and channel regions provided in the semiconductor film existing under the conductive films and between the source and drain regions. And impurity regions provided in the semiconductor film which is not overlapped with the conductive film and provided adjacent to the source and drain regions.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: November 9, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tamae Takano, Atsuo Isobe
  • Publication number: 20100237418
    Abstract: It is an object of the present invention to manufacture a thin film transistor having a required property without complicating steps and devices. It is another object of the present invention to provide a technique for manufacturing a semiconductor device having high reliability and better electrical characteristics with a higher yield at lower cost. In the present invention, a lightly doped impurity region is formed in a source region side or a drain region side of a semiconductor layer covered with a gate electrode layer in a thin film transistor. The semiconductor layer is doped diagonally to the surface thereof using the gate electrode layer as a mask to form the lightly doped impurity region. Therefore, the properties of the thin film transistor can be minutely controlled.
    Type: Application
    Filed: June 3, 2010
    Publication date: September 23, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Atsuo ISOBE, Tetsuji YAMAGUCHI, Hiromichi GODO
  • Publication number: 20100237354
    Abstract: It is an object of the present invention to provide a method of separating a thin film transistor, and circuit or a semiconductor device including the thin film transistor from a substrate by a method different from that disclosed in the patent document 1 and transposing the thin film transistor, and the circuit or the semiconductor device to a substrate having flexibility. According to the present invention, a large opening or a plurality of openings is formed at an insulating film, a conductive film connected to a thin film transistor is formed at the opening, and a peeling layer is removed, then, a layer having the thin film transistor is transposed to a substrate provided with a conductive film or the like. A thin film transistor according to the present invention has a semiconductor film which is crystallized by laser irradiation and prevents a peeling layer from exposing at laser irradiation not to be irradiated with laser light.
    Type: Application
    Filed: June 4, 2010
    Publication date: September 23, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshiaki YAMAMOTO, Koichiro TANAKA, Atsuo ISOBE, Daisuke OHGARANE, Shunpei YAMAZAKI
  • Publication number: 20100230754
    Abstract: An object is to provide a semiconductor device which solves a problem that can occur when a substrate having an insulating surface is used. The semiconductor device includes a base substrate having an insulating surface; a conductive layer over the insulating surface; an insulating layer over the conductive layer; a semiconductor layer having a channel formation region, a first impurity region, a second impurity region, and a third impurity region provided between the channel formation region and the second impurity region over the insulating layer; a gate insulating layer configured to cover the semiconductor layer; a gate electrode over the gate insulating layer; a first electrode electrically connected to the first impurity region; and a second electrode electrically connected to the second impurity region. The conductive layer is held at a given potential.
    Type: Application
    Filed: March 10, 2010
    Publication date: September 16, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Atsuo Isobe, Hiromichi Godo, Satoshi Shinohara
  • Patent number: 7795734
    Abstract: To provide a semiconductor device composed of a semiconductor element or a group of semiconductor elements, in which a crystalline semiconductor film having as few grain boundaries as possible in a channel formation region is formed on an insulating surface, which can operate at high speed, which have high current drive performance, and which are less fluctuated between elements.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: September 14, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Shunpei Yamazaki, Chiho Kokubo, Koichiro Tanaka, Akihisa Shimomura, Tatsuya Arao, Hidekazu Miyairi
  • Patent number: 7785947
    Abstract: In order to manufacture a highly reliable and compact TFT, it is an object of the present invention to provide a method for manufacturing a semiconductor device for forming a gate electrode, a source wiring and a drain wiring with high reliability, and a semiconductor device. In the method for manufacturing a semiconductor device, a semiconductor film is formed over a substrate having an insulated surface, a gate insulating film is formed over the semiconductor film, a gate electrode is formed over the gate insulating film, and a nitride film is formed over the surface of the gate electrode by nitriding the surface of the gate electrode by using high-density plasma.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: August 31, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Satoshi Murakami, Shunpei Yamazaki
  • Publication number: 20100187524
    Abstract: A manufacturing method of a semiconductor device of the present invention includes the steps of forming a stacked body in which a semiconductor film, a gate insulating film, and a first conductive film are sequentially stacked over a substrate; selectively removing the stacked body to form a plurality of island-shaped stacked bodies; forming an insulating film to cover the plurality of island-shaped stacked bodies; removing a part of the insulating film to expose a surface of the first conductive film, such that a surface of the first conductive film almost coextensive with a height of the insulating film; forming a second conductive film over the first conductive film and a left part of the insulating film; forming a resist over the second conductive film; selectively removing the first conductive film and the second conductive film using the resist as a mask.
    Type: Application
    Filed: March 31, 2010
    Publication date: July 29, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Atsuo ISOBE, Tamae TAKANO, Yasuyuki ARAI, Fumiko TERASAWA
  • Patent number: 7749818
    Abstract: An objective is to provide a method of manufacturing a semiconductor device, and a semiconductor device manufactured by using the manufacturing method, in which a laser crystallization method is used that is capable of preventing the formation of grain boundaries in TFT channel formation regions, and is capable of preventing conspicuous drops in TFT mobility, reduction in the ON current, and increases in the OFF current, all due to grain boundaries. Stripe shape or rectangular shape unevenness or opening is formed. Continuous wave laser light is then irradiated to a semiconductor film formed on an insulating film. Note that although it is most preferable to use continuous wave laser light at this point, pulse wave oscillation laser light may also be used.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: July 6, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Shunpei Yamazaki, Chiho Kokubo, Koichiro Tanaka, Akihisa Shimomura, Tatsuya Arao, Hidekazu Miyairi, Mai Akiba
  • Patent number: 7745293
    Abstract: It is an object of the present invention to manufacture a thin film transistor having a required property without complicating steps and devices. It is another object of the present invention to provide a technique for manufacturing a semiconductor device having high reliability and better electrical characteristics with a higher yield at lower cost. In the present invention, a lightly doped impurity region is formed in a source region side or a drain region side of a semiconductor layer covered with a gate electrode layer in a thin film transistor. The semiconductor layer is doped diagonally to the surface thereof using the gate electrode layer as a mask to form the lightly doped impurity region. Therefore, the properties of the thin film transistor can be minutely controlled.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: June 29, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Shunpei Yamazaki, Atsuo Isobe, Tetsuji Yamaguchi, Hiromichi Godo
  • Patent number: 7736964
    Abstract: It is an object of the present invention to provide a method of separating a thin film transistor, and circuit or a semiconductor device including the thin film transistor from a substrate by a method different from that disclosed in the patent document 1 and transposing the thin film transistor, and the circuit or the semiconductor device to a substrate having flexibility. According to the present invention, a large opening or a plurality of openings is formed at an insulating film, a conductive film connected to a thin film transistor is formed at the opening, and a peeling layer is removed, then, a layer having the thin film transistor is transposed to a substrate provided with a conductive film or the like. A thin film transistor according to the present invention has a semiconductor film which is crystallized by laser irradiation and prevents a peeling layer from exposing at laser irradiation not to be irradiated with laser light.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: June 15, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiaki Yamamoto, Koichiro Tanaka, Atsuo Isobe, Daisuke Ohgarane, Shunpei Yamazaki
  • Patent number: 7737506
    Abstract: An objective is to provide a method of manufacturing a semiconductor device, and a semiconductor device manufactured by using the manufacturing method, in which a laser crystallization method is used that is capable of preventing the formation of grain boundaries in TFT channel formation regions, and is capable of preventing conspicuous drops in TFT mobility, reduction in the ON current, and increases in the OFF current, all due to grain boundaries. Depressions and projections with stripe shape or rectangular shape are formed. Continuous wave laser light is then irradiated to a semiconductor film formed on an insulating film along the depressions and projections with stripe shape of the insulating film, or along a longitudinal axis direction or a transverse axis direction of the rectangular shape. Note that although it is most preferable to use continuous wave laser light at this point, pulse wave laser light may also be used.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: June 15, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Shunpei Yamazaki, Chiho Kokubo, Koichiro Tanaka, Akihisa Shimomura, Tatsuya Arao, Hidekazu Miyairi, Mai Akiba