Abstract: A semiconductor integrated circuit device includes an element separating first and second grooves formed to surround active regions to be formed with a semiconductor element. In addition a third groove is formed to surround at least a portion of the first groove, when viewed from a plane view. In the semiconductor integrated circuit device, the active regions and an element separating region of a silicon layer are insulated from each other by the separating grooves extending from the main surface of the silicon layer to an underlying insulating layer, and are fed with a common fixed potential.

Abstract: In a method of fabricating a semiconductor device having a MISFET and/or bipolar transistor and/or a resistor formed with different surface portions of a single silicon semiconductor substrate in which a silicide layer is formed on each of source/drain regions of the MISFET and/or collector contact region and extrinsic base region of the bipolar transistor and/or contact regions of the resistor, the bipolar transistor has its emitter region formed by diffusing an impurity contained in doped polysilicon film serving as an emitter electrode of the bipolar transistor into a part of its base region. The resistor may have a resistive region formed in a surface portion of the substrate and may be covered with an insulating film and a doped polysilicon film thereon or may have a doped polysilicon film formed over a surface portion of the substrate as a resistor element.

Abstract: The gate electrodes of the driver MISFETs, transfer MISFETs and load MISFETS of the static random access memory (SRAM) are formed of the first-level conductive layer deposited over the main surface of the semiconductor substrate. The gate electrodes, power source voltage line, reference voltage line, local interconnection lines, and complementary data lines, all making up the conductive layers of the SRAM memory cell, are formed of different conductive layers, i.e. conductive layers of different levels. The local interconnection lines and the reference voltage line or power source voltage line are arranged, with respect to a plan view of the main surface of the substrate, to cross each other and a capacitance is formed in the intersecting regions.

Abstract: Disclosed is a bipolar-CMOS LSI manufactured by a simplified process and realizing a higher density of integration as well as a higher operating speed, in which a base lead-out electrode of a bipolar transistor and respective gate electrodes of a p-channel MISFET and an n-channel MISFET of CMOS transistors are made of an identical conductor film, and the conductor film of the gate electrode of the p-channel MISFET is of p-type, while that of the gate electrode of the n-channel MISFET is of n-type.

Abstract: An endless belt in which a fibrous material is dispersed in a substantially uniform manner all over an endless elastic body layer is provided. A non-woven tape is impregnated with a polyurethane elastomer material liquid and wound and layered on a supporting belt, and then, after curing the polyurethane elastomer material liquid to form an elastic body, it is removed from supporting belt.

Abstract: An improved arrangement is provided for forming a bipolar transistor on a substrate with CMOS elements. All of the transistors (i.e., the bipolar, P-MOS and N-MOS) are formed in regions having gradually decreasing impurity concentrations from the surface toward the substrate. In addition, a buried layer is provided under each of the regions of decreasing impurity concentration in which the transistors are formed. These buried layers have a significantly higher impurity concentration than the portion of the region of decreasing impurity concentration which they are respectively adjacent to. Using this arrangement, punch-through is prevented and excellent electrical operating characteristics are provided for both the bipolar transistors and the CMOS elements.

Abstract: A semiconductor device includes a plurality of semiconductor regions of a first conductive type and a plurality of semiconductor regions of a second conductive type. AMOS transistor having a channel of the second conductive type is formed in the semiconductor regions of the first conductive type, and a bipolar transistor and a MOS transistor having a channel of the first conductive type are formed in the semiconductor regions of the second conductive type.

Abstract: A novel gate circuit is disclosed. A first semiconductor switch includes a couple of main terminals connected between a first potential level and an output node, in which a high impedance state is held in response to an input signal having a first logic level and a second logic level, and the impedance state changes from high to low only during a transient period when the input signal changes substantially from the first to second logic level. A second semiconductor switch includes a couple of main terminals inserted between a second potential level different from the first potential level and the output node, in which a high impedance state is held in response to the input signal, and the impedance state changes from high to low only during a transient period when the input signal changes from the second to first logic level.

Abstract: A composite circuit device of bipolar transistors and MOS transistors has a series connection of an NPN transistor for pull-up and a PNP transistor for pull-down. The composite circuit device has independent base drive circuits so provided that the base of the NPN transistor for pull-up is electrically isolated from the base of the PNP transistor for pull-down during the on-off switching operation. The composite circuit device is also provided with base precharge circuitry for pre-charging the base of the PNP transistor during the off operation state thereof. A composite circuit is also provided with circuitry for enhancing the turn-on switching speed of the pull-down PNP transistor. Additionally, a composite circuit of bipolar transistors and MOS transistors is constituted by a switch having a high input impedance and low on-resistance which can be applied as a component of an electronic circuit.

Abstract: Disclosed is a bipolar-CMOS LSI manufactured by a simplified process and realizing a higher density of integration as well as a higher operating speed, in which a base lead-out electrode of a bipolar transistor and respective gate electrodes of a p-channel MISFET and an n-channel MISFET of CMOS transistors are made of an identical conductor film, and the conductor film of the gate electrode of the p-channel MISFET is of p-type, while that of the gate electrode of the n-channel MISFET is of n-type.

Abstract: A paper machine press roll comprising a metal core, a ground layer formed over the outer periphery of the core and made of a metal material having a small coefficient of expansion, and a mixture layer formed over the outer periphery of the ground layer and comprising a ceramic and a water retentivity imparting particulate substance such as mica. At least in a surface layer portion of the mixture layer, an organic high polymer such as synthetic resin or wax is filled in the interstices between particles of the ceramic and particles of the water retentivity imparting substance.

Abstract: This invention provides automatic measuring apparatus for measuring the amount of wax, oil and other substances applied on a specified portion of a workpiece. A controller unit controls cleaning, measuring and calculating operations. Under such control, the workpiece set in a cleaning device is automatically cleaned using an appropriate solvent. The solvent used for cleaning the workpiece is automatically supplied to a measuring device and the absorption spectrum of the solvent is measured. Based on the data of the absorption spectrum measured by the measuring device, a calculating device automatically calculates the application amount of the wax, the oil or the other substances applied over the workpiece. The automatic measuring apparatus thus enhances measuring precision and reduces the time period required for the measuring operation.

Abstract: The present invention relates to a numerically-controlled lathe, a numerically-controlled device therefore and a procedure for processing a workpiece thereby. An object of the invention is to provide a numerically-controlled lathe adapted to designate one of two spindles and three tool rests and a procedure for processing a workpiece thereby.

Abstract: Provided is a multistage method and apparatus for concentrating a solution by reverse osmosis, comprising the steps and means for: maximizing the concentration of absolute in a solution in a multistage apparatus having only standard capacity pumps, including steps of providing first concentrating means for concentrating a solution to a first concentration, said first concentrating means comprising at least one concentrating unit which positioned upstream with respect to a direction in which a solution to be concentrated flows, and providing second concentrating means for concentrating the solution that has been concentrated by first concentrating means to a second concentration which is higher than said first concentrating means comprising at least one concentrating unit which is positioned downstream with respect to said direction; said concentrating units comprising consisting essentially of respective membrane modules and respective standard capacity pumps, the membrane module of the concentrating unit of

Abstract: A hard roll is produced by a process utilizing the steps of winding a fiber material impregnated with a thermosetting resin around the outer peripheral surface of a metal roll core to form a fiber-reinforced lower winding layer, then injecting a thermosetting synthetic resin material into a mold of predetermined size and curing the material at a specified temperature to form an outer layer hollow cylinder separately from the first step. The next stepsave fitting the outer layer cylinder around the roll core covered with the winding layer, and injecting an adhesive of low viscosity into an annular clearance between the winding layer and the cylinder and then curing the adhesive at a specified temperature to bond the winding layer to the cylinder with the layer of adhesive.

Abstract: An infrared absorption enhanced spectroscopic apparatus includes a reflecting face of a high refractive-index prism shaped to retain a metal layer, such as a solid plasma of aluminum, in such a way that it can be pressed uniformly against the reflecting face of the prism. Both entrance and exit faces of the prism are made sufficiently flat to minimize the scattering of infrared light when it is admitted into or emerges from the prism. A thin layer (approximately 500 .ANG.) of a sample of interest is deposited on the surface of the metal layer, which overlays a flexible support member, such as a polyethylene terephthalate film having a thickness of approximately 50 .mu.m. The apparatus has a mechanism by which the metal layer and thin sample layer can be pressed into intimate contact with the reflecting face of the prism. The apparatus also has a mechanism for adjusting the angle of incidence of infrared light with respect to the reflecting face of the prism.

Abstract: Disclosed is a bipolar-CMOS LSI manufactured by a simplified process and realizing a higher density of integration as well as a higher operating speed, in which a base lead-out electrode of a bipolar transistor and respective gate electrodes of a p-channel MISFET and an n-channel MISFET of CMOS transistors are made of an identical conductor film, and the conductor film of the gate electrode of the p-channel MISFET is of p-type, while that of the gate electrode of the n-channel MISFET is of n-type.

Abstract: A semicondcutor device and a manufacturing method thereof are disclosed in which higher integration can be achieved without increasing the total manufacturing steps. The semiconductor device includes at least two MOS transistors having the same channel types, the gate electrodes of which are constructed of polycrystal silicon layers which contain an impurity, and a bipolar transistor, the base electrode of which is constructed of a polycrystal silicon layer which contains and impurity. In particular, the respective gate electrodes of the two MOS transistors contain impurities of different conductivity types from one another.

Abstract: An improved arrangement is provided for forming a bipolar transistor on a substrate with CMOS elements. All of the transistors (i.e., the bipolar, P-MOS and N-MOS) are formed in regions having gradually decreasing impurity concentrations from a surface toward the substrate. In addition, a buried layer is provided under each of the regions of decreasing impurity concentration in which the transistors are formed. These buried layers have a significantly higher impurity concentration than the portion of the region of decreasing impurity concentration which they are respectively adjacent to. Using this arrangement, punch-through is prevented and excellent electrical operating characteristics are provided for both the bipolar transistors and the CMOS elements.

Abstract: A monolithic complementary semiconductor device comprising n-type and p-type well regions separated by a dielectric isolation region extending from the surface into the substrate region. The well region includes a highly doped buried region which is located at the bottom of the well region and separates an active region in the wall from the substrate region. The isolation region is deeper than the buried region. The well-to-well isolation is enhanced by the combination of the buried region and the deep dielectric isolation region. Packing density and the high speed operation can also be improved.