Abstract: In a high breakdown voltage semiconductor element among elements integrated together on an SOI substrate in which its rated voltage is shared between an embedded oxide layer and a drain region formed by an element active layer, both high integration and high breakdown voltage are realized while also securing suitability for practical implementation and practical use. The high breakdown voltage is realized without hampering size reduction of the element by forming an electrically floating layer of a conductivity type opposite to that of the drain region at the surface of the drain region. Further, the thickness of the embedded oxide layer is reduced to a level suitable for the practical implementation and practical use by setting the thickness of the element active layer of the SOI substrate at 30 ?m or more.

Abstract: A manufacturing method of a silicon carbide semiconductor device includes the steps of: preparing a semiconductor substrate including a silicon carbide substrate, a drift layer and a first semiconductor layer; forming a plurality of first trenches in a cell portion; forming a gate layer on an inner wall of each first trench by an epitaxial growth method; forming a first insulation film on the surface of the semiconductor substrate; forming a gate electrode on the first insulation film for connecting to the gate layer electrically; forming a source electrode on the first insulation film for connecting to the first semiconductor layer in the cell portion; and forming a drain electrode connected to the silicon carbide substrate electrically.

Abstract: A papermaking belt, used for a shoe pressing belt, a calender belt and a sheet transfer belt, is prevented from cracking and inhibited from growth of a crack, and comprises a reinforcing substrate (6) embedded in a thermosetting polyurethane layer (7) so that the said reinforcing substrate (6) and the said thermosetting polyurethane layer (7) are integrated with each other and the outer peripheral surface and the inner peripheral surface of the belt are formed by polyurethane layers, the polyurethane layer forming the outer peripheral surface is made of a composition containing a urethane prepolymer having isocyanate groups on ends and a hardener containing dimethylthiotoluenediamine.

Abstract: A manufacturing method of a silicon carbide semiconductor device includes the steps of: preparing a semiconductor substrate including a silicon carbide substrate, a drift layer and a first semiconductor layer; forming a plurality of first trenches in a cell portion; forming a gate layer on an inner wall of each first trench by an epitaxial growth method; forming a first insulation film on the surface of the semiconductor substrate; forming a gate electrode on the first insulation film for connecting to the gate layer electrically; forming a source electrode on the first insulation film for connecting to the first semiconductor layer in the cell portion; and forming a drain electrode connected to the silicon carbide substrate electrically.

Abstract: A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel between a gate region formed along trench grooves, a gate contact layer and a gate electrode, which can be supplied with voltages from the outside, are formed on one surface of a semiconductor substrate or on the bottom of the trench groove. A metal conductor (virtual gate electrode) is formed in ohmic contact with a p++ contact layer of the gate region on the bottom of the trench grooves independently of the gate electrode. The virtual gate electrode is electrically isolated from the gate electrode and an external wire.

Abstract: A semiconductor device includes (a) a vertical field effect transistor, the vertical field effect transistor including a drain electrode formed on a first surface of a first conductivity type of a semiconductor, a pair of first trenches formed from a second surface of the semiconductor, control regions of a second conductivity type formed respectively along the first trenches, a source region of the first conductivity type formed along the second surface of the semiconductor between the first trenches, a source electrode joined to the source region, and a gate electrode adjacent to the control regions, (b) a pair of second trenches formed from the second surface of the semiconductor independently of the field effect transistor, (c) control regions of the second conductivity type formed along the second trenches, and (d) a diode having a junction formed on the second surface between the second trenches.

Abstract: A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.

Abstract: A SiC semiconductor device includes: a SiC substrate having a drain layer, a drift layer and a source layer stacked in this order; multiple trenches penetrating the source layer and reaching the drift layer; a gate layer on a sidewall of each trench; an insulation film on the sidewall of each trench covering the gate layer; a source electrode on the source layer; and a diode portion in or under the trench contacting the drift layer to provide a diode. The drift layer between the gate layer on the sidewalls of adjacent two trenches provides a channel region. The diode portion is coupled with the source electrode, and insulated from the gate layer with the insulation film.

Abstract: A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel between a gate region formed along trench grooves, a gate contact layer and a gate electrode, which can be supplied with voltages from the outside, are formed on one surface of a semiconductor substrate or on the bottom of the trench groove. A metal conductor (virtual gate electrode) is formed in ohmic contact with a p++ contact layer of the gate region on the bottom of the trench grooves independently of the gate electrode. The virtual gate electrode is electrically isolated from the gate electrode and an external wire.

Abstract: It is an object of the present invention to provide an integrated circuit device structured to uniformly apply a voltage to side oxide films formed in a trench at both sides in an SOI substrate. The semiconductor integrated circuit device of the present invention comprises a substrate which supports a first insulation layer below an active device region, trench formed in the active device region to come into contact with the first insulation layer, second insulation film formed on the trench side wall, polycrystalline silicon with which the trench is filled, and third insulation film formed on the polycrystalline silicon, wherein the thickness ratio of the third insulation film to the first insulation film is 0.25 or more to uniformly apply a voltage to the oxide insulation films formed in the trench at both sides.

Abstract: A structure is provided that ensures a low on-resistance and a better blocking effect. In a lateral type SIT (Static Induction Transistor) in which a first region is used as a p+ gate and a gate electrode is formed on the bottom of the first region, the structure is built such that the p+ gate and an n+ source are contiguous. An insulating film is formed on the surface of an n? channel, and an auxiliary gate electrode is formed on the insulating film. In addition, the auxiliary gate electrode and the source electrode are shorted.

Abstract: A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.

Abstract: A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel between a gate region formed along trench grooves, a gate contact layer and a gate electrode, which can be supplied with voltages from the outside, are formed on one surface of a semiconductor substrate or on the bottom of the trench groove. A metal conductor (virtual gate electrode) is formed in ohmic contact with a p++ contact layer of the gate region on the bottom of the trench grooves independently of the gate electrode. The virtual gate electrode is electrically isolated from the gate electrode and an external wire.

Abstract: A switching semiconductor device is provided, in which a negative gate voltage can be applied to the semiconductor device in an OFF state so as to increase a breakdown voltage of the gate junction without impairing a normally-off function of the semiconductor device and the ON-resistance. The switching semiconductor device is fabricated by using a semiconductor substrate with a band gap of 2.0 eV or more. In a JFET structure where a p+ type gate region and an n type source region are in contact so that a negative gate voltage can be applied, the p+ type gate region and an n+ type source region with a high impurity concentration are disposed with interposing an n type source region with an impurity concentration lower than that of the p+ type gate region and higher than that of a drift region of the JFET therebetween.

Abstract: A paper machine press roll comprises a core roll and a ceramics sprayed film formed on an outer periphery of the core roll, in which values of Rk and Vo which are characteristic evaluation parameters of a plateau-structure surface of the ceramics sprayed film are Rk?8.0 ?m and Vo?0.030 mm3/cm2. (Vo=(100?Mr2)×Rvk/2000 (mm3/cm2) where Rk, Mr2 and Rvk are a core level difference, a core load length ratio and a projecting valley depth, respectively which are defined in JIS B0671-2-2002 (ISO13565-2-1996).

Abstract: A press belt (2) comprises both-end corresponding regions B positioned so as to correspond to both ends of a press roll (1) or a press shoe (3) in a width direction and having a small thickness and a center region A positioned between the both-end corresponding regions B and having a thickness larger than that of the both-end corresponding region B.

Abstract: A basic manufacturing method of a resin roll includes a procedure in which a synthetic resin outer cylinder (1) molded in the shape of a cylinder is arranged so as to cover an outer surface of a metal core (2), a clearance formed between metal core (2) and outer cylinder 1 is filled with a thermoset adhesive (3), and adhesive (3) is hardened to integrate the constituents into one piece through bonding. The manufacturing method of a resin roll has a feature in that integration of the constituents into one piece through bonding is performed by first hardening of the adhesive in a state where outer cylinder (1) is held at a first temperature and adhesive (3) is thereafter heated at a second temperature higher than the first temperature for second hardening.

Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.

Abstract: A papermaking belt, used for a shoe pressing belt, a calender belt and a sheet transfer belt, is prevented from cracking and inhibited from growth of a crack, and comprises a reinforcing substrate (6) embedded in a thermosetting polyurethane layer (7) so that the said reinforcing substrate (6) and the said thermosetting polyurethane layer (7) are integrated with each other and the outer peripheral surface and the inner peripheral surface of the belt are formed by polyurethane layers, the polyurethane layer forming the outer peripheral surface is made of a composition containing a urethane prepolymer having isocyanate groups on ends and a hardener containing dimethylthiotoluenediamine.

Abstract: A shoe press belt capable of preventing the occurrence and growth of cracks therein and is used in a paper-making press apparatus containing a press roll, a belt, and a pressure shoe for pressing a material web, wherein the shoe press belt includes a reinforcing layer, a first elastic material layer, and a second elastic material layer. A plurality of grooves are formed at an exterior peripheral surface region of the first elastic material layer. The bottom of the grooves at an axial end region of the belt corresponding to at least one of an end-proximate region in an axial direction of the pressure shoe and an end-proximate region in an axial direction of the press roll extends toward the reinforcing layer relative to the bottom of the grooves at a region other than the end region.