Abstract: A plasma processing apparatus includes: a reaction chamber; a stage which is disposed inside the reaction chamber and on which a conveyance carrier is mountable; an electrostatic chuck mechanism including an electrode portion that is disposed inside the stage; a support portion which supports the conveyance carrier between a stage-mounted position on the stage and a transfer position that is distant from the stage upward; and an elevation mechanism which elevates and lowers the support portion relative to the stage. In a case in which the conveyance carrier is mounted on the stage by lowering the support portion, the electrostatic chuck mechanism starts applying a voltage to the electrode portion before contact of an outer circumferential portion of a holding sheet which holds the conveyance carrier to the stage.

Abstract: A plasma processing apparatus includes: a reaction chamber; a plasma generation unit; a stage disposed inside the reaction chamber; an electrostatic chuck mechanism including an electrode portion disposed inside the stage; a support portion which supports the conveyance carrier; and an elevation mechanism which elevates and lowers the support portion relative to the stage. In a case in which the conveyance carrier is mounted on the stage, the electrostatic chuck mechanism performs an operation of applying a voltage to the electrode portion after contact of an outer circumferential portion of a holding sheet of the conveyance carrier to the stage, the operation including a voltage varying operation of increasing and decreasing an absolute value of the voltage, and the plasma generation unit generates plasma after completion of the voltage varying operation.

Abstract: A plasma processing method to a substrate includes a first step of mounting a transfer carrier holding the substrate on a stage which is cooled and provided within a processing chamber; a second step of relatively moving the stage and a cover provided above the stage to cover a holding sheet and an annular frame of the transfer carrier with the substrate exposed from a window part formed at the cover, a third step of carrying out plasma processing on the substrate, a fourth step of cooling the cover, and a fifth step of unloading the transfer carrier holding the substrate from the processing chamber.

Abstract: A plasma processing method to a substrate includes a first step of mounting a transfer carrier holding the substrate on a stage which is cooled and provided within a processing chamber; a second step of relatively moving the stage and a cover provided above the stage to cover a holding sheet and an annular frame of the transfer carrier with the substrate exposed from a window part formed at the cover, a third step of carrying out plasma processing on the substrate, a fourth step of cooling the cover, and a fifth step of unloading the transfer carrier holding the substrate from the processing chamber.

Abstract: A plasma processing apparatus includes a processing chamber, a plasma source that generates plasma within the processing chamber, a transfer carrier that has a holding sheet and a frame, the holding sheet holding a substrate, and the frame being attached to the holding sheet so as to surround the substrate, a stage that is provided within the processing chamber and has a gas supply hole formed in a mounting area of the stage for mounting the transfer carrier thereon, an electrostatic chucking part that is provided within the stage and electrostatically attracts the transfer carrier, and a gas supply part that supplies gas through the gas supply hole of the stage to assist separation of the transfer carrier from the stage.

Abstract: A method of manufacturing semiconductor chips includes removing an insulating film in a dividing region by plasma etching to a front surface. Then, roughness on a resist mask formed on the front surface is removed by plasma treatment before a BG tape is attached. After a semiconductor wafer is thinned by grinding of a backside surface thereof, the BG tape is peeled. The semiconductor wafer is divided into individual semiconductor chips by plasma etching from the front surface thereof.

Abstract: The plasma processing apparatus is provided with a chamber 11, a plasma source 13 which generates plasma inside the chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a holding sheet 6 and a frame 7 and has a window 33 which is formed on a central part thereof to penetrate the cover 31 in the thickness direction, and a drive mechanism 38 which changes the position of the cover 31 relative to the stage 16 between a first position which is away from the stage 16 and allows the carrier 5 to be placed on and removed from the stage 16 and a second position which allows the cover 31 to cover the holding sheet 6 and the frame 7 of the carrier 5 placed on the stage 16 and a substrate 2 held on the holding sheet 6 to be exposed through the window 33.

Abstract: The plasma processing apparatus is provided with a plasma source 13 which generates plasma inside a chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a holding sheet 6 and a frame 7 and has a window 33 which is formed to penetrate the cover 31 in the thickness direction, and a drive mechanism 38 which changes the position of the cover 31 relative to the stage 16 between a first position and a second position. The second position does not allow the cover 31 to make contact with the holding sheet 6, the frame 7 and a substrate 2. The cover 31 includes at least a ceiling surface 36b which extends in parallel to the upper face of the frame 7 and an inclined surface 36c which is inclined to gradually come close to the upper face of the holding sheet 6 exposed at the inner diameter side of the frame 7.

Abstract: Provided is a method of manufacturing semiconductor chips superior in chip yield, reduction in chipping, and handling ability. An insulating film in a dividing region is removed by plasma etching to a front surface. Then, roughness on a resist mask formed on the front surface is removed by plasma treatment before a BG tape is attached. After a semiconductor wafer is thinned by grinding of a backside surface thereof, the BG tape is peeled. The semiconductor wafer is divided into individual semiconductor chips by plasma etching from the front surface thereof.

Abstract: To provide a method of segmenting a semiconductor wafer, which is capable of preventing chippings. A semiconductor wafer 1 is partitioned into a circumferential ring-shaped region 1a and a segmentation region placed in the inner side of the ring-shaped region 1a. The semiconductor wafer 1 included in the segmentation region is cut into the form of a lattice along a plurality of perpendicular cutting lines 4 and is segmented into a plurality of chips 2. On the other hand, the semiconductor wafer 1 included in the ring-shaped region 1a is cut along two partition lines 5 extending in parallel to the cutting lines 4 from the center O of the semiconductor wafer 1 and is partitioned into four independent regions.

Abstract: A plasma dicing apparatus in which a semiconductor wafer with a protective sheet stuck thereonto covering the entire circuit-forming surface and with an etching-resistant mask member stuck on the back surface opposite to the circuit-forming surface is mounted on a mounting stage; plasma etching is performed using the mask member as a mask; and the semiconductor wafer is diced into plural semiconductor chips. The plasma dicing apparatus includes a ring-shaped frame member retaining the outer circumference of the mask member extending off the outer circumference of the semiconductor wafer. The mounting stage is composed of a wafer supporting part supporting a semiconductor wafer and a frame member supporting part supporting the frame member. This facilitates carrying a semiconductor wafer into and out of the vacuum chamber.

Abstract: In a method in which a semiconductor wafer 1 having integrated circuits 3 formed in a plurality of chip regions and test patterns 4 formed in scribe lines 2a is divided by a plasma etching process so as to manufacture individual semiconductor chips, in the semiconductor wafer 1, a protection sheet 5 which constitutes a mask in the plasma etching process is adhered onto a front plane 1a thereof where the integrated circuits 3 have been formed; since laser light 9a is irradiated along the scribe lines 2a, only a predetermined width of the protection sheet 5 is removed so as to form a mask having a plasma dicing-purpose opening portion 5b; and also, the test patterns 4 are removed by the laser light 9a in combination with a front plane layer of the semiconductor wafer 1. As a result, the test patterns 4 can be removed in a higher efficiency and in simple steps, while the general purpose characteristic can be secured.

Abstract: To provide a method of segmenting a semiconductor wafer, which is capable of preventing chippings. A semiconductor wafer 1 is partitioned into a circumferential ring-shaped region 1a and a segmentation region placed in the inner side of the ring-shaped region 1a. The semiconductor wafer 1 included in the segmentation region is cut into the form of a lattice along a plurality of perpendicular cutting lines 4 and is segmented into a plurality of chips 2. On the other hand, the semiconductor wafer 1 included in the ring-shaped region 1a is cut along two partition lines 5 extending in parallel to the cutting lines 4 from the center O of the semiconductor wafer 1 and is partitioned into four independent regions.

Abstract: An object is to provide a semiconductor chip manufacturing method capable of removing test patterns in a higher efficiency in simple steps, while a general-purpose characteristic can be secured. In a method in which a semiconductor wafer 1 having integrated circuits 3 formed in a plurality of chip regions and test patterns 4 formed in scribe lines 2a is divided by a plasma etching process so as to manufacture individual semiconductor chips, laser light 5a is irradiated from the side of a circuit forming plane 1a so as to remove the test patterns 4; and thereafter, under such a condition that a circuit protection seat 6 is adhered onto a circuit forming plane 1a, a rear plane of the circuit forming plane 1a is mechanically thinned; a mask-purpose seat is adhered onto the rear plane 1b of the semiconductor wafer 1 after the plane thinning process; and then, a plasma dicing-purpose mask is work-processed by irradiating laser light.

Abstract: In a method in which a semiconductor wafer 1 having integrated circuits 3 formed in a plurality of chip regions and test patterns 4 formed in scribe lines 2a is divided by a plasma etching process so as to manufacture individual semiconductor chips, in the semiconductor wafer 1, a protection seat 5 which constitutes a mask in the plasma etching process is adhered onto a front plane 1a thereof where the integrated circuits 3 have been formed; since laser light 9a is irradiated along the scribe lines 2a, only a predetermined width of the protection seat 5 is removed so as to form a mask having a plasma dicing-purpose opening portion 5b; and also, the test patterns 4 are removed by the laser light 9a in combination with a front plane layer of the semiconductor wafer 1. As a result, the test patterns 4 can be removed in a higher efficiency and in simple steps, while the general purpose characteristic can be secured.

Abstract: A plasma dicing apparatus in which a semiconductor wafer with a protective sheet stuck thereonto covering the entire circuit-forming surface and with an etching-resistant mask member stuck on the back surface opposite to the circuit-forming surface is mounted on a mounting stage; plasma etching is performed using the mask member as a mask; and the semiconductor wafer is diced into plural semiconductor chips. The plasma dicing apparatus includes a ring-shaped frame member retaining the outer circumference of the mask member extending off the outer circumference of the semiconductor wafer. The mounting stage is composed of a wafer supporting part supporting a semiconductor wafer and a frame member supporting part supporting the frame member. This facilitates carrying a semiconductor wafer into and out of the vacuum chamber.

Abstract: An object is to provide a semiconductor chip manufacturing method capable of removing test patterns in a higher efficiency in simple steps, while a general-purpose characteristic can be secured. In a method in which a semiconductor wafer 1 having integrated circuits 3 formed in a plurality of chip regions and test patterns 4 formed in scribe lines 2a is divided by a plasma etching process so as to manufacture individual semiconductor chips, laser light 5a is irradiated from the side of a circuit forming plane 1a so as to remove the test patterns 4; and thereafter, under such a condition that a circuit protection seat 6 is adhered onto a circuit forming plane 1a, a rear plane of the circuit forming plane 1a is mechanically thinned; a mask-purpose seat is adhered onto the rear plane 1b of the semiconductor wafer 1 after the plane thinning process; and then, a plasma dicing-purpose mask is work-processed by irradiating laser light.

Abstract: A method is provided for forming plural kinds of wells on a single semiconductor substrate with an improved alignment accuracy and obviating the generation of step height between the wells. The method includes forming a selective etching film on the semiconductor substrate, forming openings on the selective etching film overlying a first well forming region and an alignment mark forming region using a first resist film as a mask for defining the first well forming region and the alignment mark forming region, implanting the first well forming region with a dopant of a first conductivity type and removing the first resist film, forming a second resist film to mask at least the first well forming region, having an opening overlying the alignment mark forming region larger than the opening of the selective etching film overlying the same region, and forming the alignment mark by performing an etching process using the second resist film and selective etching film as a mask.

Abstract: A semiconductor device includes a fuse element made of a metal wiring layer, the fuse element being fusable by laser irradiation; wherein the fuse element includes: a fusable metal part where the laser irradiation is applied so that the fusable metal part is cut; and a periphery metal part arranged around the fusable metal part and optically surrounding the fusable metal part.

Abstract: A method is provided for forming plural kinds of wells on a single semiconductor substrate with an improved alignment accuracy and obviating the generation of step height between the wells. The method includes forming a selective etching film on the semiconductor substrate, forming openings on the selective etching film overlying a first well forming region and an alignment mark forming region using a first resist film as a mask for defining the first well forming region and the alignment mark forming region, implanting the first well forming region with a dopant of a first conductivity type and removing the first resist film, forming a second resist film to mask at least the first well forming region, having an opening overlying the alignment mark forming region larger than the opening of the selective etching film overlying the same region, and forming the alignment mark by performing an etching process using the second resist film and selective etching film as a mask.