Patents by Inventor Atsushi Harikai

Atsushi Harikai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210287913
    Abstract: An etching method including: a preparation step of preparing a resin layer and an electronic component supported thereby; and a resin etching step of etching the resin layer. The electronic component has a first surface covered with a protective film, a second surface opposite thereto, and a sidewall therebetween. The second surface is facing the resin layer. The resin layer is larger than the electronic component when seen from the first surface side. The resin etching step includes: a deposition step of depositing a first film, using a first plasma, on a surface of the protective film and a surface of the resin layer; and a removal step of removing, using a second plasma, the first film deposited on the resin layer and at least part of the resin layer. The deposition and removal steps are alternately repeated, with the protective film allowed to continue to exist.
    Type: Application
    Filed: March 1, 2021
    Publication date: September 16, 2021
    Inventors: Shogo OKITA, Atsushi HARIKAI, Akihiro ITOU
  • Publication number: 20210202289
    Abstract: A plasma processing apparatus for plasma processing a substrate held on a conveying carrier, the carrier including a holding sheet and a frame supporting an outer periphery of the holding sheet. The apparatus includes a controller that controls a plasma generator, an electrostatic adsorption mechanism, and a lifting system, to sequentially execute: an adsorption step allowing the substrate to be adsorbed electrostatically to a stage; an etching step of exposing the substrate adsorbed electrostatically to the stage to an etching plasma; a frame separation step of lifting the support, to separate the frame away from the stage, with at least part of the holding sheet kept in contact with the stage; a holding sheet separation step of separating the holding sheet away from the stage; and a static elimination step of exposing the substrate separated away from the stage to a static elimination plasma.
    Type: Application
    Filed: December 9, 2020
    Publication date: July 1, 2021
    Inventors: Atsushi HARIKAI, Shogo OKITA
  • Publication number: 20210202207
    Abstract: A plasma processing method, including: a trenched substrate preparation process of preparing a trenched substrate having trenches having a bottom exposing an oxide film; and an oxide film removal process of exposing the trenched substrate to a plasma, to remove the oxide film. The oxide film removal process includes a plurality of cycles, each cycle including: an oxide film etching step of etching the oxide film; and a cleaning step of removing an attached matter on inner walls of the trenches, after the oxide film etching step.
    Type: Application
    Filed: December 8, 2020
    Publication date: July 1, 2021
    Inventors: Atsushi HARIKAI, Shogo OKITA
  • Patent number: 10964597
    Abstract: An element chip manufacturing method including: a preparing step of preparing a first conveying carrier including a holding sheet and a frame, and a substrate held on the holding sheet, the holding sheet having a first surface and a second surface opposite the first surface, the frame attached to at least part of a peripheral edge of the holding sheet; a placing step of placing the first conveying carrier holding the substrate, on a second conveying carrier; a preprocessing step of preprocessing the substrate, after the placing step; a removing step of removing the second conveying carrier, after the preprocessing step; and a dicing step of subjecting the substrate held on the first conveying carrier to plasma exposure, after the removing step, to form a plurality of element chips from the substrate.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: March 30, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Shogo Okita, Noriyuki Matsubara, Hidefumi Saeki, Akihiro Itou
  • Publication number: 20210057227
    Abstract: An element chip smoothing method including: an element chip preparation step of preparing at least one element chip including a first surface covered with a resin film, a second surface opposite the first surface, and a sidewall connecting the first surface to the second surface and having ruggedness; a sidewall cleaning step of exposing the element chip to a first plasma, to remove deposits adhering to the sidewall, with the resin film allowed to continue to exist; a sidewall oxidation step of exposing the element chip to a second plasma, after the sidewall cleaning step, to oxidize a surface of the sidewall, with the resin film allowed to continue to exist; and a sidewall etching step of exposing the element chip to a third plasma, after the sidewall oxidation step, to etch the sidewall, with the resin film allowed to continue to exist.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 25, 2021
    Inventors: Akihiro ITOU, Atsushi HARIKAI, Toshiyuki TAKASAKI, Shogo OKITA
  • Patent number: 10923357
    Abstract: Provided is a manufacturing process of an element chip, which comprises a preparation step, a setting step for setting the substrate on a stage, and a plasma-dicing step for dividing the substrate into a plurality of element chips, wherein the plasma-dicing step is achieved by repeatedly implementing etching routines each including an etching step for etching the second layer along the street regions to form a plurality of grooves and a depositing step for depositing a protective film on inner walls of the grooves, wherein the plasma-dicing step includes a first etching step for forming the grooves each having a first scallop on the inner wall thereof at a first pitch, and a second etching step for forming the grooves each having a second scallop on the inner wall thereof at a second pitch, and wherein the second pitch is greater than the first pitch.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: February 16, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Akihiro Itou, Atsushi Harikai, Noriyuki Matsubara, Shogo Okita
  • Patent number: 10923362
    Abstract: A manufacturing process of an element chip comprises steps of preparing a substrate including a plurality of etching regions and element regions each containing a plurality of convex and concave portions, holding the substrate and a frame with a holding sheet, forming a protective film by applying a first mixture to form a coated film above the substrate and by drying the coated film to form the protective film along the convex and concave portions, the first mixture containing a water-soluble first resin, water and a water-soluble organic solvent and has a vapor pressure higher than water, removing the protective film by irradiating a laser beam thereon to expose the substrate in the etching regions, plasma-etching the substrate along the etching regions while maintaining the protective film in the element regions to individualize the substrate, and removing the protective film by contacting the protective film with an aqueous rinse solution.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: February 16, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Noriyuki Matsubara, Shogo Okita, Hidehiko Karasaki
  • Patent number: 10892190
    Abstract: A manufacturing process of an element chip comprises steps of preparing a substrate including dicing regions and element regions, attaching a holding sheet held on a frame with a die attach film in between, forming a protective film covering the substrate, forming a plurality of grooves in the protective film along the dicing regions, plasma-etching the substrate to expose the die attach film and then die attach film along the dicing regions, and picking up each of the element chips along with the separated die attach film away from the holding sheet, wherein the die attach film has an area greater than that of the substrate, and wherein the protective film includes a first covering portion covering the substrate and a second covering portion covering at least a portion of the die attach film that extends beyond an outer edge of the substrate.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: January 12, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shogo Okita, Atsushi Harikai, Noriyuki Matsubara, Hidefumi Saeki, Akihiro Itou
  • Publication number: 20200406308
    Abstract: An element chip cleaning method including: an element chip preparation step of preparing at least one element chip having a first surface and a second surface opposite the first surface, the first surface covered with a resin film; a first cleaning step of bringing a first cleaning liquid into contact with the resin film, the first cleaning liquid including a solvent that dissolves at least part of a resin component contained in the resin film; and a second cleaning step of spraying a second cleaning liquid against the resin film from the first surface side of the element chip, after the first cleaning step.
    Type: Application
    Filed: June 9, 2020
    Publication date: December 31, 2020
    Inventors: Akihiro ITOU, Atsushi HARIKAI, Toshiyuki TAKASAKI, Hidefumi SAEKI, Shogo OKITA
  • Publication number: 20200381304
    Abstract: An element chip manufacturing method including: attaching a substrate via a die attach film (DAF) to a holding sheet; forming a protective film that covers the substrate; forming an opening in the protective film with a laser beam, to expose the substrate in the dicing region therefrom; exposing the substrate to a first plasma to etch the substrate exposed from the opening, so that a plurality of element chips are formed from the substrate and so that the DAF is exposed from the opening; exposing the substrate to a second plasma to etch the die attach film exposed from the opening, so that the DAF is split so as to correspond to the element chips; and detaching the element chips from the holding sheet, together with the split DAF. The DAF is larger than the substrate. The method includes irradiating the laser beam to the DAF protruding from the substrate.
    Type: Application
    Filed: May 22, 2020
    Publication date: December 3, 2020
    Inventors: Hidefumi SAEKI, Hidehiko KARASAKI, Shogo OKITA, Atsushi HARIKAI, Akihiro ITOU
  • Publication number: 20200357654
    Abstract: A manufacturing process of an element chip comprises steps of preparing a substrate including a plurality of etching regions and element regions each containing a plurality of convex and concave portions, holding the substrate and a frame with a holding sheet, forming a protective film by applying a first mixture to form a coated film above the substrate and by drying the coated film to form the protective film along the convex and concave portions, the first mixture containing a water-soluble first resin, water and a water-soluble organic solvent and has a vapor pressure higher than water, removing the protective film by irradiating a laser beam thereon to expose the substrate in the etching regions, plasma-etching the substrate along the etching regions while maintaining the protective film in the element regions to individualize the substrate, and removing the protective film by contacting the protective film with an aqueous rinse solution.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Inventors: Atsushi HARIKAI, Noriyuki MATSUBARA, Shogo OKITA, Hidehiko KARASAKI
  • Patent number: 10796960
    Abstract: A manufacturing process of an element chip, comprising a substrate preparing step for preparing a substrate having first and second sides opposed to each other, and including a plurality of dicing regions and element regions defined by the dicing regions, the first side being covered by a protective film, a first laser-grooving step for forming a plurality of grooves by irradiating a laser beam to the first side along the dicing regions, and a plasma-dicing step for plasma-etching the substrate along the grooves in depth through a plasma exposure, thereby to dice the substrate into a plurality of element chips, wherein the second side of the substrate and an annular frame are held on a holding sheet in the substrate preparing step, and wherein the laser beam is irradiated only in a region inside an outer edge of the substrate in the first laser-grooving step.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: October 6, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hidefumi Saeki, Atsushi Harikai
  • Publication number: 20200294791
    Abstract: An element chip manufacturing method including: a preparing step of preparing a substrate including a plurality of element regions and a dicing region defining the element regions, the substrate having a first surface and a second surface opposite the first surface; a laser scribing step of applying a laser beam to the dicing region from a side of the first surface, to form a groove corresponding to the dicing region and being shallower than a thickness of the substrate; a cleaning step of exposing the first surface of the substrate to a first plasma, to remove debris on the groove; and a dicing step of exposing the substrate at a bottom of the groove to a second plasma after the cleaning step, to dice the substrate into element chips including the element regions. The first plasma is generated from a process gas containing a carbon oxide gas.
    Type: Application
    Filed: March 5, 2020
    Publication date: September 17, 2020
    Inventors: Shogo OKITA, Atsushi HARIKAI, Akihiro ITOU
  • Patent number: 10763124
    Abstract: A manufacturing process of an element chip comprises steps of preparing a substrate including a plurality of dicing regions and element regions each containing a plurality of convex and concave portions, holding the substrate and a frame with a holding sheet, forming a protective film by applying a first mixture to form a coated film above the substrate and by drying the coated film to form the protective film along the convex and concave portions, the first mixture containing a first resin and an organic solvent having a vapor pressure higher than water, removing the protective film by irradiating a laser beam thereon to expose the substrate in the dicing regions, plasma-etching the substrate along the dicing regions while maintaining the protective film in the element regions to individualize the substrate, and removing the protective film by contacting the protective film with an aqueous rinse solution.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: September 1, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Noriyuki Matsubara, Shogo Okita, Hidehiko Karasaki
  • Patent number: 10714356
    Abstract: Provided is a plasma processing method which comprises steps of preparing a conveying carrier including a holding sheet and a frame provided on a peripheral region of the holding sheet, adhering the substrate on the holding sheet in an inner region inside the peripheral region to hold the substrate on the conveying carrier, sagging the holding sheet in the inner region, setting the conveying carrier on a stage provided within a plasma processing apparatus to contact the holding sheet on the stage so that the holding sheet in the inner region touches the stage before the holding sheet in the peripheral region does, and plasma processing the substrate.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: July 14, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shogo Okita, Atsushi Harikai, Akihiro Itou, Noriyuki Matsubara
  • Patent number: 10607846
    Abstract: Method of manufacturing an element chip which can suppress residual debris in plasma dicing. A back surface of a semiconductor wafer is held on a dicing tape. Then, a surface of the wafer is coated with a mask that includes a water-insoluble lower mask and a water-soluble upper mask. Subsequently, an opening is formed in the mask by irradiating the mask with laser light to expose a dividing region. Then, the semiconductor wafer is caused to come into contact with water to remove the upper mask covering each of the element regions while leaving the lower layer. After that, the wafer is exposed to plasma to perform etching on the dividing region exposed from the opening until the etching reaches the back surface, thereby dicing the semiconductor wafer into a plurality of element chips. Thereafter, the lower layer mask left on the front surface of the semiconductor chips is removed.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: March 31, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hidehiko Karasaki, Noriyuki Matsubara, Atsushi Harikai, Hidefumi Saeki
  • Publication number: 20200098636
    Abstract: An element chip manufacturing method including: a preparing step of preparing a first conveying carrier including a holding sheet and a frame, and a substrate held on the holding sheet, the holding sheet having a first surface and a second surface opposite the first surface, the frame attached to at least part of a peripheral edge of the holding sheet; a placing step of placing the first conveying carrier holding the substrate, on a second conveying carrier; a preprocessing step of preprocessing the substrate, after the placing step; a removing step of removing the second conveying carrier, after the preprocessing step; and a dicing step of subjecting the substrate held on the first conveying carrier to plasma exposure, after the removing step, to form a plurality of element chips from the substrate.
    Type: Application
    Filed: September 11, 2019
    Publication date: March 26, 2020
    Inventors: Atsushi HARIKAI, Shogo OKITA, Noriyuki MATSUBARA, Hidefumi SAEKI, Akihiro ITOU
  • Publication number: 20190371668
    Abstract: A substrate has first and second surfaces, and includes a plurality of element regions and dividing region defining the element regions. An method for manufacturing an element chip includes: a protective film formation step of applying a mixture containing a water-soluble resin and a solvent to the first surface, to form a protective film; a laser grooving step of irradiating, with laser light, portions of the protective film covering the dividing regions, to remove these portions, and expose the first surface in the dividing regions; a step of dicing the substrate into element chips by plasma etching the substrate in the dividing regions; and a step of removing the portions of the protective film. The resin has melting point of 250° C. or more, or decomposition temperature of 450° C. or more, and the protective film has absorption coefficient of 1 abs·L/g·cm?1 or more for wavelength of the laser light.
    Type: Application
    Filed: May 30, 2019
    Publication date: December 5, 2019
    Inventors: Hidehiko KARASAKI, Shogo OKITA, Noriyuki MATSUBARA, Atsushi HARIKAI
  • Patent number: 10497622
    Abstract: A semiconductor chip manufacturing method includes preparing a semiconductor wafer including a front surface on which a bump is exposed, a rear surface located at a side opposite to the front surface, a plurality of element regions in each of which the bump is formed, and a dividing region defining each of the element regions, forming a mask which covers the bump and has an opening exposing the dividing region on the surface of the semiconductor wafer by spraying liquid which contains raw material of the mask along the bump by a spray coating method, and singulating the semiconductor wafer by exposing the surface of the semiconductor wafer to first plasma and etching the dividing region, which is exposed to the opening, until the rear surface is reached in a state where the bump is covered by the mask.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: December 3, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shogo Okita, Mitsuru Hiroshima, Atsushi Harikai, Noriyuki Matsubara, Akihiro Itou
  • Patent number: 10475704
    Abstract: In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate having a plurality of element regions, the substrate is divided into element chips 10 by exposing the substrate to a first plasma. Therefore, element chips having a first surface, a second surface, and a side surface connecting the first surface and the second surface are held spaced from each other on a carrier. A protection film covering the element chip is formed only on the side surface and it is possible to suppress creep-up of a conductive material to the side surface in the mounting step by exposing the element chips to second plasma in which a mixed gas of fluorocarbon and helium is used as a raw material gas.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: November 12, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Shogo Okita, Noriyuki Matsubara, Mitsuru Hiroshima, Mitsuhiro Okune