Patents by Inventor Atsushi Harikai

Atsushi Harikai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170263461
    Abstract: A plasma processing method includes an attaching process of attaching a resin film to a first main surface of a substrate which is provided with the first main surface and a second main surface on an opposite side of the first main surface and a patterning process of forming a mask, which includes an opening exposing a region to be processed of the substrate, by patterning the resin film. The plasma processing method includes a first plasma process of generating first plasma of first gas in a depressurized atmosphere including the first gas, exposing the mask to the first plasma, and reducing a void between the mask and the first main surface. The plasma processing method includes a second plasma process of generating second plasma from second gas in atmosphere including the second gas, exposing the region to be processed exposed from the opening to the second plasma, and etching the region to be processed.
    Type: Application
    Filed: February 8, 2017
    Publication date: September 14, 2017
    Inventors: NORIYUKI MATSUBARA, ATSUSHI HARIKAI, AKIHIRO ITOU
  • Publication number: 20170263502
    Abstract: The method for manufacturing an element chip includes a mounting step and a plasma dicing step. In the mounting step, a semiconductor substrate with flexibility, which has a first main surface and a second main surface located at an opposite side of the first main surface, which has a plurality element regions and a dividing region for defining the element regions, and on which a mask for covering the first main surface in the element region and for exposing the first main surface in the dividing region is formed, is mounted on a stage. In the plasma dicing step, the semiconductor substrate is diced into a plurality of element chips including the element; region by exposing the first main surface side of the semiconductor substrate to plasma on the stage and etching from the first main surface side to the second main surface while forming a groove on the dividing region.
    Type: Application
    Filed: February 9, 2017
    Publication date: September 14, 2017
    Inventors: SHOGO OKITA, ATSUSHI HARIKAI, AKIHIRO ITOU, NORIYUKI MATSUBARA, BUNZI MIZUNO
  • Publication number: 20170263501
    Abstract: A method for manufacturing an element chip includes a laser dicing step of dividing the substrate to a plurality of element chips including the element region by irradiating the dividing region of the substrate with laser light, in a state of supported by a supporting member and forming a damaged region on an end surface of the element chip. Furthermore, the method for manufacturing an element chip includes a protection film stacking step of stacking a protection film on the first main surface and the end surface of the element chip, after the laser dicing step and a protection film etching step of removing the protection film stacked on the first main surface through etching the protection film anisotropically by exposing the element chip to plasma, after the protection film stacking, step and remaining the protection film for covering the damaged region.
    Type: Application
    Filed: February 8, 2017
    Publication date: September 14, 2017
    Inventors: BUNZI MIZUNO, SHOGO OKITA, NORIYUKI MATSUBARA, ATSUSHI HARIKAI, MITSURU HIROSHIMA
  • Publication number: 20170263524
    Abstract: A method for manufacturing an element chip includes a protection film stacking step of staking a protection film to the element region, and the dividing region, the part of the exposed second damaged region and a protection film etching step of removing a part of the protection film which is stacked on the dividing region and the protection film which is stacked on the element region by exposing the substrate to second plasma and remaining the protection film for covering the part of the second damaged region. Furthermore, the method for manufacturing an element chip includes a plasma dicing step of dividing the substrate to a plurality of element chips by exposing the substrate to third plasma in a state where the second main surface is supported by a supporting member.
    Type: Application
    Filed: February 7, 2017
    Publication date: September 14, 2017
    Inventors: BUNZI MIZUNO, MITSURU HIROSHIMA, SHOGO OKITA, NORIYUKI MATSUBARA, ATSUSHI HARIKAI
  • Publication number: 20170256412
    Abstract: The yield of a product is improved when a substrate held by a conveyance carrier is subjected to a plasma treatment. A plasma treatment method of the substrate held by the conveyance carrier includes preparing the conveyance carrier which includes a holding sheet and a frame disposed on the outer peripheral portion of the holding sheet; bonding the substrate to the holding sheet so that the substrate is held by the conveyance carrier; and increasing tensile strength of the holding sheet. The plasma treatment method further includes placing the conveyance carrier on the stage after the bonding of the substrate and bringing the substrate into contact with the stage through the holding sheet; and performing a plasma treatment on the substrate after the placing of the conveyance carrier.
    Type: Application
    Filed: February 7, 2017
    Publication date: September 7, 2017
    Inventors: SHOGO OKITA, ATSUSHI HARIKAI
  • Publication number: 20170229365
    Abstract: In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate having a plurality of element regions, the substrate is divided into element chips 10 by exposing the substrate to a first plasma. Therefore, element chips having a first surface, a second surface, and a side surface connecting the first surface and the second surface are held spaced from each other on a carrier. A protection film covering the element chip is formed only on the side surface and it is possible to suppress creep-up of a conductive material to the side surface in the mounting step by exposing the element chips to second plasma in which a mixed gas of fluorocarbon and helium is used as a raw material gas.
    Type: Application
    Filed: January 18, 2017
    Publication date: August 10, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA, MITSURU HIROSHIMA, MITSUHIRO OKUNE
  • Publication number: 20170229366
    Abstract: In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate having a plurality of element regions, the substrate is divided into the element chips by exposing the substrate to first plasma. Therefore, the element chips having a first surface, a second surface, and a side surface on which a plurality of convex portions are formed are held spaced from each other on a carrier. A protection film is formed on the side surface of the element chip by exposing the element chip to second plasma, at least convex portions formed on the side surface are covered by the protection film in the protection film formation, and creep-up of a conductive material to the side surface is suppressed in the mounting step.
    Type: Application
    Filed: January 18, 2017
    Publication date: August 10, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA, MITSURU HIROSHIMA, MITSUHIRO OKUNE
  • Publication number: 20170229385
    Abstract: To provide a method of manufacturing an element chip in which creep-up of a conductive material can be suppressed in a mounting step. In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate which has a plurality of element regions and of which an element surface is covered by an insulating film, the substrate is divided into the element chips by exposing the substrate to a first plasma, the element chips having a first surface, a second surface, and a side surface are held spaced from each other on a carrier, and the side surface and the insulating film are in a state of being exposed.
    Type: Application
    Filed: January 18, 2017
    Publication date: August 10, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA
  • Publication number: 20170229384
    Abstract: In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate which has a plurality of element regions and of which an element surface is covered by insulating film, the substrate is divided into element chips by exposing the substrate to a first plasma, element chips having first surface, second surface, and side surface are held spaced from each other on carrier, insulating film is in a state of being exposed, recessed portions are formed by retreating insulating film by exposing element chips to second plasma for ashing, and then recessed portions are covered by protection films by third plasma for formation of the protection film, thereby suppressing creep-up of the conductive material to side surface in the mounting step.
    Type: Application
    Filed: January 18, 2017
    Publication date: August 10, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA
  • Patent number: 9698052
    Abstract: In a method of manufacturing an element chip for manufacturing a plurality of element chips by dividing a substrate, where the protruding portions, which are exposed element electrodes, are formed on element regions, protection films made of fluorocarbon film are formed on a second surface and side surfaces of the element chip, and a first surface in a gap by exposing the element chip to second plasma after the substrate is divided by etching. Next, the protection films formed on the second surface and the side surfaces of the element chip are removed while leaving at least a part of the protection film formed in the gap by exposing the element chip to third plasma. Therefore, creep-up of a conductive material in a mounting step is suppressed by the left protection film.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: July 4, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Shogo Okita, Noriyuki Matsubara
  • Patent number: 9698073
    Abstract: In a plasma processing step in a method of manufacturing an element chip in which a plurality of element chips are manufactured by dividing a substrate, which has a plurality of element regions, the substrate is divided into element chips by exposing the substrate to first plasma. In a protection film forming step of forming a protection film covering a side surface and a second surface by exposing the element chips to second plasma of which raw material gas is mixed gas of carbon fluoride and helium, protection film forming conditions are set such that a thickness of a second protection film of the second surface is greater than a thickness of a first protection film of the side surface.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: July 4, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Shogo Okita, Noriyuki Matsubara, Mitsuru Hiroshima, Mitsuhiro Okune
  • Patent number: 9653334
    Abstract: A plasma processing apparatus includes a processing chamber, a plasma source that generates plasma within the processing chamber, a transfer carrier that has a holding sheet and a frame, the holding sheet holding a substrate, and the frame being attached to the holding sheet so as to surround the substrate, a stage that is provided within the processing chamber and has a gas supply hole formed in a mounting area of the stage for mounting the transfer carrier thereon, an electrostatic chucking part that is provided within the stage and electrostatically attracts the transfer carrier, and a gas supply part that supplies gas through the gas supply hole of the stage to assist separation of the transfer carrier from the stage.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: May 16, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Noriyuki Matsubara, Atsushi Harikai, Mitsuru Hiroshima
  • Publication number: 20170098590
    Abstract: In a method of manufacturing an element chip for manufacturing a plurality of element chips by dividing a substrate, where the protruding portions, which are exposed element electrodes, are formed on element regions, protection films made of fluorocarbon film are formed on a second surface and side surfaces of the element chip, and a first surface in a gap by exposing the element chip to second plasma after the substrate is divided by etching. Next, the protection films formed on the second surface and the side surfaces of the element chip are removed while leaving at least a part of the protection film formed in the gap by exposing the element chip to third plasma. Therefore, creep-up of a conductive material in a mounting step is suppressed by the left protection film.
    Type: Application
    Filed: September 15, 2016
    Publication date: April 6, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA
  • Publication number: 20170098591
    Abstract: In a plasma processing step in a method of manufacturing an element chip in which a plurality of element chips are manufactured by dividing a substrate, which has a plurality of element regions, the substrate is divided into element chips by exposing the substrate to first plasma. In a protection film forming step of forming a protection film covering a side surface and a second surface by exposing the element chips to second plasma of which raw material gas is mixed gas of carbon fluoride and helium, protection film forming conditions are set such that a thickness of a second protection film of the second surface is greater than a thickness of a first protection film of the side surface.
    Type: Application
    Filed: September 14, 2016
    Publication date: April 6, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA, MITSURU HIROSHIMA, MITSUHIRO OKUNE
  • Publication number: 20170092527
    Abstract: In a plasma processing process used for a method of manufacturing element chips by which a plurality of element chips are manufactured by dividing a substrate having a plurality of element regions, the substrate is exposed to first plasma, and thereby the substrate is divided into element chips, and the element chips having first surfaces, second surfaces, and side surfaces connecting the first surfaces to the second surfaces are held with an interval between the element chips on the carrier. The element chips are exposed to second plasma which uses a mixed gas of fluorocarbon and helium as a raw material gas, and thereby a protection film covering the side surfaces is formed, and a conductive material is prevented from creeping up to the side surfaces during a mounting process.
    Type: Application
    Filed: September 7, 2016
    Publication date: March 30, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA
  • Publication number: 20170069522
    Abstract: In a method of fabricating element chips, a method of forming a mask pattern, and a method of processing a substrate, a process sequence is set such that developing in which the exposure-ended protection film is patterned is performed, after grinding in which the substrate is thinned by grinding a second surface opposite to a first surface to which a photosensitive protection film is pasted. Thereby, it is possible to perform the grinding for thinning in a state where the protection film is stable without being patterned, and to prevent the substrate or the protection film on which a mask pattern of the substrate is formed from being damaged at the time of the grinding, even in a case where a thin substrate of a wafer shape becomes a target.
    Type: Application
    Filed: August 31, 2016
    Publication date: March 9, 2017
    Inventors: Mitsuru HIROSHIMA, Atsushi HARIKAI
  • Publication number: 20170069536
    Abstract: Provided is a plasma treatment method including: placing a substrate carrier holding a substrate on a stage; adjusting a distance between a cover and the stage to a first distance in which the cover covers a frame without coming into contact with the substrate carrier; performing a plasma treatment on the substrate placed on the stage after the adjusting of the distance; carrying the substrate together with the substrate carrier out from a reaction chamber after the performing of the plasma treatment; and removing an adhered substance adhered to the cover by generating plasma in the inside of the reaction chamber after the carrying of the substrate, in which the distance between the cover and the stage in the removing of the adhered substance is a second distance greater than the first distance.
    Type: Application
    Filed: August 23, 2016
    Publication date: March 9, 2017
    Inventors: ATSUSHI HARIKAI, NORIYUKI MATSUBARA, HIDEO KANOU, MITSURU HIROSHIMA, SYOUZOU WATANABE, TOSHIHIRO WADA
  • Patent number: 9583355
    Abstract: The plasma processing apparatus is provided with a chamber 11, a plasma source 13 which generates plasma inside the chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a holding sheet 6 and a frame 7 and has a window 33 which is formed on a central part thereof to penetrate the cover 31 in the thickness direction, and a drive mechanism 38 which changes the position of the cover 31 relative to the stage 16 between a first position which is away from the stage 16 and allows the carrier 5 to be placed on and removed from the stage 16 and a second position which allows the cover 31 to cover the holding sheet 6 and the frame 7 of the carrier 5 placed on the stage 16 and a substrate 2 held on the holding sheet 6 to be exposed through the window 33.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: February 28, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Nobuhiro Nishizaki, Atsushi Harikai, Tetsuhiro Iwai, Mitsuru Hiroshima
  • Patent number: 9570272
    Abstract: A plasma processing apparatus includes: a reaction chamber; a stage which is disposed inside the reaction chamber and on which a conveyance carrier is mountable; an electrostatic chuck mechanism including an electrode portion that is disposed inside the stage; a support portion which supports the conveyance carrier between a stage-mounted position on the stage and a transfer position that is distant from the stage upward; and an elevation mechanism which elevates and lowers the support portion relative to the stage. In a case in which the conveyance carrier is mounted on the stage by lowering the support portion, the electrostatic chuck mechanism starts applying a voltage to the electrode portion before contact of an outer circumferential portion of a holding sheet which holds the conveyance carrier to the stage.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: February 14, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shogo Okita, Atsushi Harikai, Noriyuki Matsubara
  • Publication number: 20160293456
    Abstract: A plasma processing apparatus includes: a reaction chamber; a plasma generation unit; a stage disposed inside the reaction chamber; an electrostatic chuck mechanism including an electrode portion inside the stage; a heater inside the stage; a support portion which supports a conveyance carrier between a stage-mounted position on the stage and a transfer position distant from the stage upward; and an elevation mechanism which elevates and lowers the support portion relative to the stage. In a case in which the conveyance carrier is mounted on the stage by lowering the support portion, application of voltage to the electrode portion is started in a state that the stage is being heated, and the plasma generation unit generates plasma after at least a part of an outer circumferential portion of a holding sheet holding the conveyance carrier contacts the stage and also after the heating of the stage is stopped.
    Type: Application
    Filed: January 19, 2016
    Publication date: October 6, 2016
    Inventors: Shogo Okita, Atsushi Harikai, Noriyuki Matsubara