Patents by Inventor Atsushi Shikata

Atsushi Shikata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7296097
    Abstract: Whether an initial command outputted from a host is ‘CMD1’ or ‘CMD55+CMD41’ is detected with an initial command detection portion 8, and the result of detection is set in an SD/MMC register 13. Reset process for hardware and that for firmware are carried out based on the result of detection set in the SD/MMC register 13. Thereafter, a microcomputer 7 sets data indicating in which mode, MultiMedia Card mode or SD mode, the firmware reset process was carried out, in a F/W process SD/MMC register 14. A H/W-F/W mode comparison circuit 15 compares data in the SD/MMC register 13 with data in the F/W process SD/MMC register 14. If these data agree with each other, busy state is released, and command wait state is established. If they disagree with each other, a disagreement occurrence detection signal is outputted to the microcomputer 7, and power-on reset processing is performed again.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: November 13, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Motoki Kanamori, Shigeo Kurakata, Chiaki Kumahara, Hidefumi Odate, Atsushi Shikata
  • Patent number: 7292480
    Abstract: A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: November 6, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Kozakai, Yuusuke Jono, Motoki Kanamori, Kazunori Furusawa, Atsushi Shikata, Yosuke Yukawa
  • Patent number: 7286435
    Abstract: A card device has a regulator (5), a first internal circuit (6) and a second internal circuit (7), and the regulator supplies, to the second internal circuit, an internal voltage generated by dropping an external voltage (VCC) when the external voltage is high, and exactly supplies the external voltage as the internal voltage to the second internal circuit when the external voltage is low, and the external voltage is supplied as an operating power source to the first internal circuit and a transition to a low consumed power state is carried out if a command is not input for a certain period. The card device stops the operation of the regulator and suppresses the supply of the internal voltage to the second internal circuit in the transition to the low consumed power state. In the low consumed power state, consequently, it is possible to suppress a power consumption in each of the regulator and the second internal circuit in the card device.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: October 23, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Hidefumi Odate, Atsushi Shikata, Chiaki Kumahara
  • Publication number: 20070233956
    Abstract: A controller 3 of a memory card is a provided with a command decoding circuit 6 for decoding commands issued by a host HT, a command enable register 8 in which the validity or invalidity of the received command, and a command detection signal generating circuit 7 for detecting a valid command on the basis of the result of decoding by the command decoding circuit 6 and a value set by the command enable register 8. If the command enable register 8 receives a validly set command, the command detection signal generating circuit 7 will supply a detection signal to a control unit 4 to execute processing prescribed for each command. the command enable register 8 receives an invalidly set command, no detection signal will be supplied, and the command will be ignored.
    Type: Application
    Filed: May 29, 2007
    Publication date: October 4, 2007
    Inventors: Atsushi Shikata, Kunihiro Katayama, Masato Matsumoto, Kazuto Izawa, Motoki Kanamori
  • Publication number: 20070136616
    Abstract: A memory card is provided in which power consumption is reduced by the pull-up resistor of an input terminal and a misoperation induced by the pull-down resistor of a host apparatus is prevented. The memory card has a select terminal connected to the pull-up resistor. When the mode of the memory card is determined based on an input from the select terminal, a relatively low resistance value is selected for the pull-up resistor of the select terminal before a determination timing and the pull-up resistor is restored to an initial resistance value after the mode determination. A relatively high resistance value reduces a leakage current consumed by the pull-up resistor of the select terminal. When a pull-down resistor is connected to the terminal of a memory card host to which the memory card is attached, if the resistance value of the pull-up resistor is excessively high, it is influenced by the drawing in of a current by the pull-down resistor.
    Type: Application
    Filed: February 8, 2007
    Publication date: June 14, 2007
    Inventors: Shigeo Kurakata, Kunihiro Katayama, Motoki Kanamori, Atsushi Shikata, Tetsuya Iida
  • Publication number: 20070108293
    Abstract: A card device has a regulator (5), a first internal circuit (6) and a second internal circuit (7), and the regulator supplies, to the second internal circuit, an internal voltage generated by dropping an external voltage (VCC) when the external voltage is high, and exactly supplies the external voltage as the internal voltage to the second internal circuit when the external voltage is low, and the external voltage is supplied as an operating power source to the first internal circuit and a transition to a low consumed power state is carried out if a command is not input for a certain period. The card device stops the operation of the regulator and suppresses the supply of the internal voltage to the second internal circuit in the transition to the low consumed power state. In the low consumed power state, consequently, it is possible to suppress a power consumption in each of the regulator and the second internal circuit in the card device.
    Type: Application
    Filed: December 21, 2004
    Publication date: May 17, 2007
    Inventors: Hidefumi Odate, Atsushi Shikata, Chiaki Kumahara
  • Patent number: 7188265
    Abstract: A memory card is provided in which power consumption is reduced by the pull-up resistor of an input terminal and a misoperation induced by the pull-down resistor of a host apparatus is prevented. The memory card has a select terminal connected to the pull-up resistor. When the mode of the memory card is determined based on an input from the select terminal, a relatively low resistance value is selected for the pull-up resistor of the select terminal before a determination timing and the pull-up resistor is restored to an initial resistance value after the mode determination. A relatively high resistance value reduces a leakage current consumed by the pull-up resistor of the select terminal. When a pull-down resistor is connected to the terminal of a memory card host to which the memory card is attached, if the resistance value of the pull-up resistor is excessively high, it is influenced by the drawing in of a current by the pull-down resistor.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: March 6, 2007
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Shigeo Kurakata, Kunihiro Katayama, Motoki Kanamori, Atsushi Shikata, Tetsuya Iida
  • Publication number: 20070033334
    Abstract: A memory card is provided with a transfer control circuit, a write control circuit and a judging circuit. The transfer control circuit outputs a transfer flag signal during the data transfer. The write control circuit outputs an internal busy signal during the data write operation. The judging circuit outputs a transfer interruption signal when a card selection signal of the host is negated during the input of the transfer flat signal and also outputs a suspension signal when the card selection signal is negated during the input of the internal busy signal. A CPU invalidates the data being transfer to interrupt the transfer process upon reception of the transfer interruption signal and completes, upon reception of the suspension signal, the process being executed and stays in the waiting condition.
    Type: Application
    Filed: October 3, 2006
    Publication date: February 8, 2007
    Inventors: Kunihiro Katayama, Motoki Kanamori, Atsushi Shikata, Hidefumi Oodate, Atsushi Shiraishi
  • Patent number: 7161834
    Abstract: A memory card and a microcomputer with nonvolatile memory wherein operation under two different types of power supply specifications achieved are provided. A MultiMediacard includes a flash memory and with the flash memory. When the controller judges the level of supply voltage supplied from host equipment, operates as follows: the controller judges whether detecting point corresponding to voltage level 1.8V system been exceeded. After the judgment of excess, the controller judges whether detecting point corresponding to the voltage level system has been exceeded. When the 1.8V system, flash memory to operate the controller causes the 1.8v-system operation mode without driving regulators voltage level shifters. When the supply voltage level 3.3V system, the controller drives the regulators and the level shifters convert the voltage level causes the flash memory operate the 3.3V-system operation mode.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: January 9, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Chiaki Kumahara, Atsushi Shikata, Yasuhiro Nakamura, Hideo Kasai, Hidefumi Odate
  • Patent number: 7133961
    Abstract: A memory card is provided with a transfer control circuit, a write control circuit and a judging circuit. The transfer control circuit outputs a transfer flag signal during the data transfer. The write control circuit outputs an internal busy signal during the data write operation. The judging circuit outputs a transfer interruption signal when a card selection signal of the host is negated during the input of the transfer flat signal and also outputs a suspension signal when the card selection signal is negated during the input of the internal busy signal. A CPU invalidates the data being transfer to interrupt the transfer process upon reception of the transfer interruption signal and completes, upon reception of the suspension signal, the process being executed and stays in the waiting condition.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: November 7, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Kunihiro Katayama, Motoki Kanamori, Atsushi Shikata, Hidefumi Oodate, Atsushi Shiraishi
  • Publication number: 20060248388
    Abstract: Whether an initial command outputted from a host is ‘CMD1’ or ‘CMD55+CMD41’ is detected with an initial command detection portion 8, and the result of detection is set in an SD/MMC register 13. Reset process for hardware and that for firmware are carried out based on the result of detection set in the SD/MMC register 13. Thereafter, a microcomputer 7 sets data indicating in which mode, MultiMedia Card mode or SD mode, the firmware reset process was carried out, in a F/W process SD/MMC register 14. A H/W-F/W mode comparison circuit 15 compares data in the SD/MMC register 13 with data in the F/W process SD/MMC register 14. If these data agree with each other, busy state is released, and command wait state is established. If they disagree with each other, a disagreement occurrence detection signal is outputted to the microcomputer 7, and power-on reset processing is performed again.
    Type: Application
    Filed: March 20, 2003
    Publication date: November 2, 2006
    Inventors: Motoki Kanamori, Shigeo Kurakata, Chiaki Kumahara, Hidefumi Odate, Atsushi Shikata
  • Publication number: 20060233032
    Abstract: When a non-volatile memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.
    Type: Application
    Filed: June 16, 2006
    Publication date: October 19, 2006
    Inventors: Motoki Kanamori, Kunihiro Katayama, Atsushi Shiraishi, Shigeo Kurakata, Atsushi Shikata
  • Patent number: 7116578
    Abstract: In a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory, data is transferred to the non-volatile memory from a bank that becomes full, a write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: October 3, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Takayuki Tamura, Kenji Kozakai, Atsushi Shikata, Shinsuke Asari
  • Publication number: 20060214009
    Abstract: A nonvolatile storage apparatus which is not deadlocked even if a data processing section gets out of control during a power-on reset is provided. The nonvolatile storage apparatus includes a first semiconductor device having a data processing section capable of executing instructions and an external interface section, and a second semiconductor device controlled by the first semiconductor device. The external interface section, upon detecting that an operating supply voltage supplied from outside the nonvolatile storage apparatus has reached or exceeded a prescribed voltage, responds to an initialization command supplied from outside the nonvolatile storage apparatus and makes the data processing section start reset exception processing. After the reset exception processing is completed, the external interface section does not respond to the initialization command.
    Type: Application
    Filed: March 27, 2006
    Publication date: September 28, 2006
    Inventors: Atsushi Shikata, Yasuhiro Nakamura, Chiaki Kumahara
  • Patent number: 7102943
    Abstract: When a non-volatile memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: September 5, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Kunihiro Katayama, Atsushi Shiraishi, Shigeo Kurakata, Atsushi Shikata
  • Publication number: 20060106973
    Abstract: The present invention provides a nonvolatile memory card in which a program is added, modified, changed, or the like by selecting arbitrary firmware on a flash memory from a plurality of pieces of firmware on flash memories. In a memory card, in addition to a program stored in a built-in ROM, firmware on flash memories as programs for adding, changing, modifying, or the like of a function such as a patch program are stored. Firmware on a flash memory which is desired to be made valid is set in a parameter sector or the like and is loaded into an external RAM, and the CPU of a control logic executes a process.
    Type: Application
    Filed: November 21, 2005
    Publication date: May 18, 2006
    Inventors: Makoto Mori, Seisuke Hirosawa, Atsushi Shikata
  • Publication number: 20060062052
    Abstract: A memory card and a microcomputer with nonvolatile memory wherein operation under two different types of power supply specifications is achieved are provided. A MultiMediaCard comprises a flash memory and a controller which controls the operation associated with the flash memory. When the controller judges the level of supply voltage supplied from host equipment, it operates as follows: the controller judges whether detecting point corresponding to the voltage level of 1.8V system has been exceeded. After the judgment of excess, the controller judges whether detecting point corresponding to the voltage level of 3.3V system has been exceeded. When the supply voltage is at the voltage level of 1.8V system, the controller causes the flash memory to operate in the 1.8V-system operation mode without driving regulators or level shifters. When the supply voltage is at the voltage level of 3.
    Type: Application
    Filed: November 14, 2005
    Publication date: March 23, 2006
    Inventors: Chiaki Kumahara, Atsushi Shikata, Yasuhiro Nakamura, Hideo Kasai, Hidefumi Odate
  • Patent number: 7002853
    Abstract: A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: February 21, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Kozakai, Yuusuke Jono, Motoki Kanamori, Kazunori Furusawa, Atsushi Shikata, Yosuke Yukawa
  • Patent number: 6996005
    Abstract: The present invention provides a nonvolatile memory card in which a program is added, modified, changed, or the like by selecting arbitrary firmware on a flash memory from a plurality of pieces of firmware on flash memories. In a memory card, in addition to a program stored in a built-in ROM, firmware on flash memories as programs for adding, changing, modifying, or the like of a function such as a patch program are stored. Firmware on a flash memory which is desired to be made valid is set in a parameter sector or the like and is loaded into an external RAM, and the CPU of a control logic executes a process.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: February 7, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Makoto Mori, Seisuke Hirosawa, Atsushi Shikata
  • Patent number: 6982919
    Abstract: A memory card and a microcomputer with nonvolatile memory wherein operation under two different types of power supply specifications is achieved are provided. A MultiMediaCard includes a flash memory and a controller which controls the operation associated with the flash memory. When the controller judges the level of supply voltage supplied from host equipment, it operates as follows: the controller judges whether detecting point corresponding to the voltage level of 1.8V system has been exceeded. After the judgment of excess, the controller judges whether detecting point corresponding to the voltage level of 3.3V system has been exceeded. When the supply voltage is at the voltage level of 1.8V system, the controller causes the flash memory to operate in the 1.8V-system operation mode without driving regulators or level shifters. When the supply voltage is at the voltage level of 3.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: January 3, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Chiaki Kumahara, Atsushi Shikata, Yasuhiro Nakamura, Hideo Kasai, Hidefumi Odate