Patents by Inventor Atsushi Shikata

Atsushi Shikata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6972979
    Abstract: There is provided a technology to realize high speed data transfer while compatibility of a card type storage device comprising a nonvolatile memory is ensured. Namely, in the card type storage device comprising the nonvolatile memory, a plurality of data terminals are provided and an interface unit is provided with a circuit for determining levels of data terminals. Some or all of the plurality of data terminals are connected with pull-up resistors for pulling up to a power source voltage. When the determination circuit determines that the data terminals connected with the pull-up resistors are in an open condition, the determination circuit switches a bus width (number of bits) of data.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: December 6, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Tetsuya Iida, Motoki Kanamori, Atsushi Shikata, Takayuki Tamura, Kunihiro Katayama
  • Publication number: 20050262292
    Abstract: A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
    Type: Application
    Filed: July 18, 2005
    Publication date: November 24, 2005
    Inventors: Kenji Kozakai, Yuusuke Jono, Motoki Kanamori, Kazunori Furusawa, Atsushi Shikata, Yosuke Yukawa
  • Publication number: 20050246574
    Abstract: When a non-volatile memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.
    Type: Application
    Filed: June 15, 2005
    Publication date: November 3, 2005
    Inventors: Motoki Kanamori, Kunihiro Katayama, Atsushi Shiraishi, Shigeo Kurakata, Atsushi Shikata
  • Publication number: 20050211786
    Abstract: There is provided a technology to realize high speed data transfer while compatibility of a card type storage device comprising a nonvolatile memory is ensured. Namely, in the card type storage device comprising the nonvolatile memory, a plurality of data terminals are provided and an interface unit is provided with a circuit for determining levels of data terminals. Some or all of the plurality of data terminals are connected with pull-up resistors for pulling up to a power source voltage. When the determination circuit determines that the data terminals connected with the pull-up resistors are in an open condition, the determination circuit switches a bus width (number of bits) of data.
    Type: Application
    Filed: May 18, 2005
    Publication date: September 29, 2005
    Inventors: Tetsuya Iida, Motoki Kanamori, Atsushi Shikata, Takayuki Tamura, Kunihiro Katayama
  • Publication number: 20050201177
    Abstract: The present invention is directed to suppress data loss caused by power shut-down during a rewriting process and to shorten time required to make a depletion check. A nonvolatile memory apparatus includes a rewritable nonvolatile memory and a card controller. The nonvolatile memory has a physical address area corresponding to a logical address and a save area. In response to a data rewrite instruction on a required logical address, the card controller stores data in a predetermined physical address area corresponding to the logical address to the save area and rewrites the data stored in the physical address area. When rewriting of the physical address area is incomplete, the card controller rewrites the data in the physical address area with the data stored in the save area. Thus, data loss caused by the power shut-down can be suppressed by data backup, and it is sufficient to make the depletion check in two places of the save area and the physical address area.
    Type: Application
    Filed: March 10, 2005
    Publication date: September 15, 2005
    Inventors: Atsushi Shiraishi, Atsushi Shikata, Yasuhiro Nakamura, Makoto Obata
  • Patent number: 6917547
    Abstract: When a non-volatile memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: July 12, 2005
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Kunihiro Katayama, Atsushi Shiraishi, Shigeo Kurakata, Atsushi Shikata
  • Publication number: 20050041509
    Abstract: A memory card and a microcomputer with nonvolatile memory wherein operation under two different types of power supply specifications is achieved are provided. A MultiMediaCard comprises a flash memory and a controller which controls the operation associated with the flash memory. When the controller judges the level of supply voltage supplied from host equipment, it operates as follows: the controller judges whether detecting point corresponding to the voltage level of 1.8V system has been exceeded. After the judgment of excess, the controller judges whether detecting point corresponding to the voltage level of 3.3V system has been exceeded. When the supply voltage is at the voltage level of 1.8V system, the controller causes the flash memory to operate in the 1.8V-system operation mode without driving regulators or level shifters. When the supply voltage is at the voltage level of 3.
    Type: Application
    Filed: July 15, 2004
    Publication date: February 24, 2005
    Inventors: Chiaki Kumahara, Atsushi Shikata, Yasuhiro Hakamura, Hideo Kasai, Hidefumi Odate
  • Publication number: 20040236910
    Abstract: A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
    Type: Application
    Filed: June 24, 2004
    Publication date: November 25, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Kenji Kozakai, Yuusuke Jono, Motoki Kanamori, Kazunori Furusawa, Atsushi Shikata, Yosuke Yukawa
  • Publication number: 20040236909
    Abstract: A controller 3 of a memory card is a provided with a command decoding circuit 6 for decoding commands issued by a host HT, a command enable register 8 in which the validity or invalidity of the received command, and a command detection signal generating circuit 7 for detecting a valid command on the basis of the result of decoding by the command decoding circuit 6 and a value set by the command enable register 8. If the command enable register 8 receives a validly set command, the command detection signal generating circuit 7 will supply a detection signal to a control unit 4 to execute processing prescribed for each command the command enable register 8 receives an invalidly set command, no detection signal will be supplied, and the command will be ignored.
    Type: Application
    Filed: February 12, 2004
    Publication date: November 25, 2004
    Inventors: Atsushi Shikata, Kunihiro Katayama, Masato Matsumoto, Kazuto Izawa, Motoki Kanamori
  • Publication number: 20040228161
    Abstract: The present invention provides a nonvolatile memory card in which a program is added, modified, changed, or the like by selecting arbitrary firmware on a flash memory from a plurality of pieces of firmware on flash memories. In a memory card, in addition to a program stored in a built-in ROM, firmware on flash memories as programs for adding, changing, modifying, or the like of a function such as a patch program are stored. Firmware on a flash memory which is desired to be made valid is set in a parameter sector or the like and is loaded into an external RAM, and the CPU of a control logic executes a process.
    Type: Application
    Filed: November 26, 2003
    Publication date: November 18, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Makoto Mori, Seisuke Hirosawa, Atsushi Shikata
  • Publication number: 20040174742
    Abstract: In a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory, data is transferred to the non-volatile memory from a bank that becomes full, a write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.
    Type: Application
    Filed: March 11, 2004
    Publication date: September 9, 2004
    Applicants: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Takayuki Tamura, Kenji Kozakai, Atsushi Shikata, Shinsuke Asari
  • Publication number: 20040156242
    Abstract: There is provided a technology to realize high speed data transfer while compatibility of a card type storage device comprising a nonvolatile memory is ensured. Namely, in the card type storage device comprising the nonvolatile memory, a plurality of data terminals are provided and an interface unit is provided with a circuit for determining levels of data terminals. Some or all of the plurality of data terminals are connected with pull-up resistors for pulling up to a power source voltage. When the determination circuit determines that the data terminals connected with the pull-up resistors are in an open condition, the determination circuit switches a bus width (number of bits) of data.
    Type: Application
    Filed: November 20, 2003
    Publication date: August 12, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Tetsuya Iida, Motoki Kanamori, Atsushi Shikata, Takayuki Tamura, Kunihiro Katayama
  • Publication number: 20040117553
    Abstract: A memory card is provided in which power consumption is reduced by the pull-up resistor of an input terminal and a misoperation induced by the pull-down resistor of a host apparatus is prevented. The memory card has a select terminal connected to the pull-up resistor. When the mode of the memory card is determined based on an input from the select terminal, a relatively low resistance value is selected for the pull-up resistor of the select terminal before a determination timing and the pull-up resistor is restored to an initial resistance value after the mode determination. A relatively high resistance value reduces a leakage current consumed by the pull-up resistor of the select terminal. When a pull-down resistor is connected to the terminal of a memory card host to which the memory card is attached, if the resistance value of the pull-up resistor is excessively high, it is influenced by the drawing in of a current by the pull-down resistor.
    Type: Application
    Filed: November 20, 2003
    Publication date: June 17, 2004
    Applicants: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Shigeo Kurakata, Kunihiro Katayama, Motoki Kanamori, Atsushi Shikata, Tetsuya Iida
  • Patent number: 6751123
    Abstract: A semiconductor storage device that determines the cause of an error at the time of the error correction of data read out from a non-volatile semiconductor memory, on the basis of a previously recorded error correction count, and selects a data refresh processing or a substitute processing to perform. When the error is detected, the corrected data is rewritten back for preventing reoccurrence of error due to accidental cause. If it is determined that the reoccurrence frequency of the error is high and the error is due to degradation of the storage medium, based on the error correction count, the substitute processing is performed.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: June 15, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Kunihiro Katayama, Takayuki Tamura, Yusuke Jono, Motoki Kanamori, Atsushi Shikata
  • Patent number: 6731537
    Abstract: In a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory, data is transferred to the non-volatile memory from a bank that becomes full, a write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: May 4, 2004
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Takayuki Tamura, Kenji Kozakai, Atsushi Shikata, Shinsuke Asari
  • Publication number: 20040057299
    Abstract: A memory card (1) including an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data, wherein the interface control circuit includes command control means for decoding a first command supplied externally and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
    Type: Application
    Filed: September 5, 2003
    Publication date: March 25, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Kenji Kozakai, Yuusuke Jono, Motoki Kanamori, Kazunori Furusawa, Atsushi Shikata, Yosuke Yukawa
  • Publication number: 20040008554
    Abstract: When a non-volatile memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.
    Type: Application
    Filed: July 11, 2003
    Publication date: January 15, 2004
    Applicants: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Kunihiro Katayama, Atsushi Shiraishi, Shigeo Kurakata, Atsushi Shikata
  • Publication number: 20030206460
    Abstract: In the conventional nonvolatile memory, it is not possible to determine the cause of the error is accidental or due to the degradation when the error is detect at the time of data read. Therefore, unnecessary substitute processing is performed, resulting in the exhaustion of the substitute area to shorten the life of the storage device.
    Type: Application
    Filed: May 7, 2003
    Publication date: November 6, 2003
    Inventors: Kunihiro Katayama, Takayuki Tamura, Yusuke Jono, Motoki Kanamori, Atsushi Shikata
  • Patent number: 6643725
    Abstract: A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: November 4, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Kozakai, Yuusuke Jono, Motoki Kanamori, Kazunori Furusawa, Atsushi Shikata, Yosuke Yukawa
  • Patent number: 6608784
    Abstract: When a non-volatile memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: August 19, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Kunihiro Katayama, Atsushi Shiraishi, Shigeo Kurakata, Atsushi Shikata