Patents by Inventor Atul Gupta

Atul Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130347089
    Abstract: In an embodiment a single user authentication event, performed between a trusted path hardware module and a service provider via an out of band communication, can enable a user to transparently access multiple service providers using strong credentials that are specific to each service provider. The authentication event may be based on multifactor authentication that is indicative of a user's actual physical presence. Thus, for example, a user would not need to enter a different retinal scan to gain access to each of the service providers. Other embodiments are described herein.
    Type: Application
    Filed: September 30, 2011
    Publication date: December 26, 2013
    Inventors: Abdul M. Bailey, Ned M. Smith, Atul Gupta
  • Patent number: 8598547
    Abstract: Glitches during ion implantation of a workpiece, such as a solar cell, can be compensated for. In one instance, a workpiece is implanted during a first pass at a first speed. This first pass results in a region of uneven dose in the workpiece. The workpiece is then implanted during a second pass at a second speed. This second speed is different from the first speed. The second speed may correspond to the entire workpiece or just the region of uneven dose in the workpiece.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: December 3, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Russell J. Low, Atul Gupta, William T. Weaver
  • Publication number: 20130262521
    Abstract: A method is presented for use in correctional facilities to manage resources. Particularly, the method includes using a scheduling engine capable of receiving scheduling requests from other systems or direct entry of scheduling data and which is equipped to provide reports that inform the facility of the schedules of all inmates, transportation requirements, and space accommodations. The method may be employed for evaluating the needs for transportation and space and may also be used to generate reports that show relationships between inmates based on activities, locations, and time.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 3, 2013
    Inventors: Atul Gupta, Rahul Kapoor
  • Patent number: 8546157
    Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: October 1, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Atul Gupta, Nicholas P. T. Bateman
  • Publication number: 20130247981
    Abstract: Solar cells, solar modules, and methods for their manufacture are disclosed. An example method may comprise forming a dielectric layer on at least one or more edges of a substrate, and then introducing dopant to at least one surface of the substrate. The substrate may be subjected to a heating process to at least drive the dopant to a predefined depth, thereby forming at least one of an emitter layer and a surface field layer. In the example method, the dielectric layer may not be removed during a subsequent manufacturing process. Associated solar cells and solar modules are also provided.
    Type: Application
    Filed: March 21, 2012
    Publication date: September 26, 2013
    Applicant: SUNIVA, INC.
    Inventors: VIJAY YELUNDUR, ATUL GUPTA, JASEN MOFFITT
  • Patent number: 8461032
    Abstract: A method of tailoring the dopant profile of a substrate by utilizing two different dopants, each having a different diffusivity is disclosed. The substrate may be, for example, a solar cell. By introducing two different dopants, such as by ion implantation, furnace diffusion, or paste, it is possible to create the desired dopant profile. In addition, the dopants may be introduced simultaneously, partially simultaneously, or sequentially. Dopant pairs preferably consist of one lighter species and one heavier species, where the lighter species has a greater diffusivity. For example, dopant pairs such as boron and gallium, boron and indium, phosphorus and arsenic, and phosphorus and antimony, can be utilized.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: June 11, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Nicholas Bateman, Atul Gupta, Christopher Hatem, Deepak Ramappa
  • Patent number: 8461553
    Abstract: An improved method of producing solar cells utilizes a mask which is fixed relative to an ion beam in an ion implanter. The ion beam is directed through a plurality of apertures in the mask toward a substrate. The substrate is moved at different speeds such that the substrate is exposed to an ion dose rate when the substrate is moved at a first scan rate and to a second ion dose rate when the substrate is moved at a second scan rate. By modifying the scan rate, various dose rates may be implanted on the substrate at corresponding substrate locations. This allows ion implantation to be used to provide precise doping profiles advantageous for manufacturing solar cells.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: June 11, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Nicholas P. T. Bateman, Steven M. Anella, Benjamin B. Riordon, Atul Gupta
  • Patent number: 8461030
    Abstract: A plasma processing apparatus comprises a plasma source configured to produce a plasma in a plasma chamber, such that the plasma contains ions for implantation into a workpiece. The apparatus also includes a focusing plate arrangement having an aperture arrangement configured to modify a shape of a plasma sheath of the plasma proximate the focusing plate such that ions exiting an aperture of the aperture arrangement define focused ions. The apparatus further includes a processing chamber containing a workpiece spaced from the focusing plate such that a stationary implant region of the focused ions at the workpiece is substantially narrower that the aperture. The apparatus is configured to create a plurality of patterned areas in the workpiece by scanning the workpiece during ion implantation.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: June 11, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Anthony Renau, Ludovic Godet, Timothy J. Miller, Joseph C. Olson, Vikram Singh, James Buonodono, Deepak A. Ramappa, Russell J. Low, Atul Gupta, Kevin M. Daniels
  • Patent number: 8407509
    Abstract: A method for compensating for variations in timing of data sent to a processor on data bit lines relative to a strobe clock sent to the processor on a strobe clock line that can be used in a dual data rate (DDR) memory identifies discrete minimum and maximum time offset values for test data in selected data bit patterns for the data bit lines. The discrete minimum time offset value is the minimum timing adjustment required to allow the processor to receive the data in a steady-state condition during a data valid window of the strobe clock and the discrete maximum time offset value is a maximum timing adjustment required to allow the processor to receive the data in a steady-state condition during a data valid window of the strobe clock. The discrete minimum and maximum time offset values identify a valid range when the data bit lines supply data in a steady-state condition for latching into the processor by the strobe clock.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: March 26, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Rajeev Sharma, Ajay Kumar, Naresh Dhamija, Atul Gupta, Ajay K. Gaite, Llamparidhi l
  • Patent number: 8372737
    Abstract: An improved method of implanting a solar cell is disclosed. A substrate is coated with a soft mask material. A shadow mask is used to perform a pattern ion implant and to set the soft mask material. After the soft mask material is set, the mask is removed and a blanket implant is performed.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: February 12, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Nicholas P. T. Bateman, Benjamin B. Riordon, Atul Gupta
  • Publication number: 20120244692
    Abstract: An improved, lower cost method of processing substrates, such as to create solar cells is disclosed. In addition, a modified substrate carrier is disclosed. The carriers typically used to carry the substrates are modified so as to serve as shadow masks for a patterned implant. In some embodiments, various patterns can be created using the carriers such that different process steps can be performed on the substrate by changing the carrier or the position with the carrier. In addition, since the alignment of the substrate to the carrier is critical, the carrier may contain alignment features to insure that the substrate is positioned properly on the carrier. In some embodiments, gravity is used to hold the substrate on the carrier, and therefore, the ions are directed so that the ion beam travels upward toward the bottom side of the carrier.
    Type: Application
    Filed: June 5, 2012
    Publication date: September 27, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Nicholas Bateman, Kevin Daniels, Atul Gupta, Russell Low, Benjamin Riordon, Robert Mitchell, Steven Anella
  • Publication number: 20120238046
    Abstract: A method of LED manufacturing is disclosed. A coating is applied to a mesa. This coating may have different thicknesses on the sidewalls of the mesa compared to the top of the mesa. Ion implantation into the mesa will form implanted regions in the sidewalls in one embodiment. These implanted regions may be used for LED isolation or passivation.
    Type: Application
    Filed: February 2, 2012
    Publication date: September 20, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: San Yu, Atul Gupta
  • Publication number: 20120214273
    Abstract: An improved method of tilting a mask to perform a pattern implant of a substrate is disclosed. The mask has a plurality of apertures, and is placed between the ion source and the substrate. The mask and substrate are tilted at a first angle relative to the incoming ion beam. After the substrate is exposed to the ion beam, the mask and substrate are tilted at a second angle relative to the ion beam and a subsequent implant step is performed. Through the selection of the aperture size and shape, the cross-section of the mask, the distance between the mask and the substrate and the number of implant steps, a variety of implant patterns may be created. In some embodiments, the implant pattern includes heavily doped horizontal stripes with lighter doped regions between the stripes. In some embodiments, the implant pattern includes a grid of heavily doped regions.
    Type: Application
    Filed: February 17, 2011
    Publication date: August 23, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Benjamin Riordon, Nicholas Bateman, Atul Gupta
  • Publication number: 20120202317
    Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.
    Type: Application
    Filed: March 7, 2012
    Publication date: August 9, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Atul Gupta, Nicholas P.T. Bateman
  • Patent number: 8216923
    Abstract: An improved, lower cost method of processing substrates, such as to create solar cells is disclosed. In addition, a modified substrate carrier is disclosed. The carriers typically used to carry the substrates are modified so as to serve as shadow masks for a patterned implant. In some embodiments, various patterns can be created using the carriers such that different process steps can be performed on the substrate by changing the carrier or the position with the carrier. In addition, since the alignment of the substrate to the carrier is critical, the carrier may contain alignment features to insure that the substrate is positioned properly on the carrier. In some embodiments, gravity is used to hold the substrate on the carrier, and therefore, the ions are directed so that the ion beam travels upward toward the bottom side of the carrier.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: July 10, 2012
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Nicholas Bateman, Kevin Daniels, Atul Gupta, Russell Low, Benjamin Riordon, Robert Mitchell, Steven Anella
  • Publication number: 20120089857
    Abstract: A method for compensating for variations in timing of data sent to a processor on data bit lines relative to a strobe clock sent to the processor on a strobe clock line that can be used in a dual data rate (DDR) memory identifies discrete minimum and maximum time offset values for test data in selected data bit patterns for the data bit lines. The discrete minimum time offset value is the minimum timing adjustment required to allow the processor to receive the data in a steady-state condition during a data valid window of the strobe clock and the discrete maximum time offset value is a maximum timing adjustment required to allow the processor to receive the data in a steady-state condition during a data valid window of the strobe clock. The discrete minimum and maximum time offset values identify a valid range when the data bit lines supply data in a steady-state condition for latching into the processor by the strobe clock.
    Type: Application
    Filed: October 11, 2010
    Publication date: April 12, 2012
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Rajeev Sharma, Ajay Kumar, Naresh Dhamija, Atul Gupta, Ajay K. Gaite, IIamparidhi I
  • Patent number: 8153456
    Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: April 10, 2012
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Atul Gupta, Nicholas P. T. Bateman
  • Publication number: 20120083102
    Abstract: An improved, lower cost method of processing substrates, such as to create solar cells is disclosed. In addition, a modified substrate carrier is disclosed. The carriers typically used to carry the substrates are modified so as to serve as shadow masks for a patterned implant. In some embodiments, various patterns can be created using the carriers such that different process steps can be performed on the substrate by changing the carrier or the position with the carrier. In addition, since the alignment of the substrate to the carrier is critical, the carrier may contain alignment features to insure that the substrate is positioned properly on the carrier. In some embodiments, gravity is used to hold the substrate on the carrier, and therefore, the ions are directed so that the ion beam travels upward toward the bottom side of the carrier.
    Type: Application
    Filed: October 1, 2010
    Publication date: April 5, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Nicholas Bateman, Kevin Daniels, Atul Gupta, Russell Low, Benjamin Riordon, Robert Mitchell, Steven Anella
  • Publication number: 20120064661
    Abstract: An improved, lower cost method of processing substrates, such as to create solar cells, is disclosed. The doped regions are created on the substrate, using a mask or without the use of lithography or masks. After the implantation is complete, visual recognition is used to determine the exact region that was implanted. This information can then be used by subsequent process steps to crate a suitable metallization layer and provide alignment information. These techniques can also be used in other ion implanter applications. In another aspect, a dot pattern selective emitter is created, and imaging is used to determine the appropriate metallization layer.
    Type: Application
    Filed: November 18, 2011
    Publication date: March 15, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Benjamin Riordon, Russel Low, Atul Gupta, William Weaver
  • Publication number: 20120036987
    Abstract: The present invention relates to launching system, more particularly relates to mobile launching system for missiles. The mobile missile launch system comprising a vehicle (14) having a chassis structure adapted to carry the launch system; a mounting frame (16) comprising predetermined truss framework mounted onto the chassis structure; plurality of sliding mechanisms mounted at rear end of the mounting frame (16); plurality of canisters (43) mounted onto said beam (22) and plurality of missiles (11) ensconced within the canisters (43); plurality of containers (42) enclosing said canisters (43) and are connected to the saddles (32, 34) for linear movement; plurality of resting units (27) abutting to rear end of the canisters (43) and are adapted to move linearly to transfer reaction forces from said missiles (11) to ground.
    Type: Application
    Filed: January 11, 2010
    Publication date: February 16, 2012
    Applicant: Director General, Deffence Research & Development Organisation
    Inventors: Siddalingappa Guruprasad, Shreedhar Aravind Katti, Alasani Prasad Goud, Vikas Narayan Waghmare, Sanjay Kumar, Atul Gupta, Ravindra Sudhakar Khire, Tushar Kant Santosh, Bimal Gautam, Paras Ram