Abstract: The present disclosure describes a front-end module (FEM) and a process for making the same. In the disclosed FEM, a thinned flip-chip die, which includes a device region with a metal layer, resides over a module carrier. A mold compound resides over the module carrier, surrounds the thinned flip-chip die, and extends beyond a top surface of the thinned flip-chip die to define an opening over the top surface of the thinned flip-chip die and within the mold compound. A ferrimagnetic portion resides over the top surface of the thinned flip-chip die and within the opening, and a permanent magnetic portion resides over the ferrimagnetic portion and within the opening. Herein, the permanent magnetic portion, the ferrimagnetic portion, and the metal layer of the device region are vertically aligned, and form a circulator vertically stacked with the thinned flip-chip die.

Abstract: Systems and methods for providing a direct current-to-direct current (DC-DC) converter with programmable compensation are disclosed. In one aspect, a power management chip having a DC-DC converter measures process, voltage, and temperature (PVT) variations and provides a dynamic compensation circuit (e.g., using programmable digital-to-analog converters (DACs)) to offset such PVT variations. Further, changes in frequency may be detected, and additional compensation values provided. Providing compensation in this manner allows the DC-DC converter's performance to be more efficient, resulting in better performance and power savings.

Abstract: A power amplifier with feedback ballast resistance is disclosed. In one aspect, a power amplifier cell may receive a bias signal from a bias circuit where the bias circuit includes a feedback loop having an impedance that, from the perspective of the bias signal is relatively low impedance, but from a ballast thermal control perspective provides sufficient resistance to avoid thermal runaway. In exemplary aspects, this feedback loop may be extended to operate with multiple power amplifier cells and provide differential mode thermal control optimized for individual cell bias signal control and common mode thermal control optimized for thermal control of the collective power amplifier cells of the power amplifier.

Abstract: An analog predistortion (APD) circuit is disclosed. In one aspect, the power amplifier is in a front-end module (FEM) of a radio frequency transceiver. An APD circuit operates within an amplifier chain to normalize the distortion of the amplifier chain. A baseband processor (BBP) performs digital predistortion (DPD) on signals being sent from the BBP to the FEM. As a result of the APD, the DPD may assume a normalized profile for the FEM, allowing for simplification of the DPD despite many possible distortions introduced by the amplifier chain.

Abstract: A Doherty amplifier system is disclosed. The Doherty amplifier system includes a carrier amplifier having a carrier input and a carrier output, and a peaking amplifier having a peaking input coupled to the carrier input and a peaking output coupled to the carrier output. Analog pre-distortion circuitry is configured to linearize the carrier amplifier and linearize the peaking amplifier by compensating for base-to-collector capacitance loading of the carrier amplifier and the peaking amplifier during operation.

Abstract: Systems and methods for dynamic current limits for direct current-to-direct current (DC-DC) converters are disclosed. In one aspect, a DC-DC converter (e.g., a buck-boost converter) having dual current and voltage feedback loops is provided. Information from the voltage feedback loop may be used to set a reference level for the current feedback loop. This information may be further based on information from a ramp compensation circuit and a current limiting circuit. The accumulated information may then be combined with another output from the ramp compensation circuit to control the DC-DC converter. The combination of feedback and elements provides an opportunity to sculpt a voltage output of the DC-DC converter to avoid over and undershooting a target output.

Abstract: Power protection loops for amplifier chain elements are disclosed. In one aspect, an amplifier chain may have a power detection circuit detect power within the amplifier chain. When the power exceeds a threshold, a control circuit limits amplification provided by amplifier element(s) within the amplifier chain to throttle or lower power levels within the amplifier chain, thereby protecting elements within the amplifier chain. In this fashion, not only may the amplifier element(s) be protected, but also acoustic filter elements may be protected. The threshold used to throttle or lower the power levels may be based on one or more of: a supply voltage, a sensed temperature, and a mode (e.g., 2G, 3G, 4G, 5G). By protecting these elements, these elements survive power surges instead of failing.

Abstract: Systems and methods for impedance shifting between filters and amplifiers are disclosed. In one aspect, an active inductor that might otherwise be placed between a filter and a low noise amplifier (LNA) may be replaced with a passive impedance-boosting circuit. The impedance-boosting circuit may, for example, be a passive voltage gain circuit and may, by way of further example, be implemented with a coupled resonator filter (CRF) structure. Using such a passive voltage gain structure in receive circuits where the input noise is dominated by a noise voltage component means that any passive voltage gain in front of the active amplifier will result in a reduction of the overall receive path noise figure and may, potentially, save space that would otherwise be devoted to large inductor circuits.

Abstract: Systems and methods for improving efficiency in a power management circuit are disclosed. In one aspect, a ping-pong sample and hold circuit smooth transitions from buck to boost (and vice versa) modes of operation for a direct current-to-direct current (DC-DC) converter in the power management circuit. The ping-pong sample and hold circuit provide a ramp compensation for each clock cycle, where transitions are smoothed by holding the last value used from the previous mode of operation. In a second aspect, a current sensor is used that integrates a current value to provide a base feedback loop for the DC-DC converter and may use various compensation factors to provide a proper ramp signal for the DC-DC converter.

Abstract: A protection circuit for an acoustic filter and/or a power amplifier is disclosed. In one aspect, the protection circuit includes a bidirectional coupler that helps secure a measurement of power at an antenna. The power measurement is compared to a threshold by a detector, and if the power measurement is above the threshold, a signal is sent that causes debiasing of a power amplifier stage, which reduces power levels of signals being amplified by the power amplifier stage and correspondingly lowers the power level going through a filter associated with the power amplifier stage. By lowering the power level going through the power amplifier stage and the filter, both elements are protected against overpower conditions, allowing functionality to be maintained.

Abstract: A broadband low noise amplifier (LNA) structure (10) includes a main LNA (12), an offset LNA (14), an input splitter (16), and an output combiner (18). The input splitter (16) is configured to split a radio frequency (RF) input signal into a first RF input signal and a second RF input signal with difference phases, which are fed to the main LNA (12) and the offset LNA (14), respectively. Based on the first RF input signal, the main LNA (12) is configured to provide a first RF output signal, and based on the second RF input signal, the offset LNA (14) is configured to provide a second RF output signal. The output combiner (18) is configured to realign the first RF output signal and the second RF output signal, and configured to combine the first and second RF output signals to provide a combined RF output signal.

Abstract: Current-accelerated voltage transition in a wireless communication circuit is disclosed. The wireless communication circuit includes a power management integrated circuit (PMIC) configured to generate a voltage, such as an average power tracking (APT) voltage, for amplifying a radio frequency (RF) signal in multiple continuous voltage modulation intervals. In a non-limiting example, each of the voltage modulation intervals can be an orthogonal frequency division multiplexing (OFDM) symbol or a timeslot with multiple OFDM symbols. According to embodiments disclosed herein, the PMIC can generate an acceleration current with an appropriate polarity to accelerate a transition of the voltage quickly between consecutive voltage modulation intervals. By supporting the current-accelerated voltage transition, the wireless transmission circuit can enable fast voltage adaptation to thereby improve operating efficiency of a power amplifier circuit.

Abstract: Power protection loops for amplifier chain elements are disclosed. In one aspect, an amplifier chain may have a power detection circuit detect power within the amplifier chain. When the power exceeds a threshold, a control circuit limits amplification provided by amplifier element(s) within the amplifier chain to throttle or lower power levels within the amplifier chain, thereby protecting elements within the amplifier chain. In this fashion, not only may the amplifier element(s) be protected, but also acoustic filter elements may be protected. The threshold used to throttle or lower the power levels may be based on one or more of: a supply voltage, a sensed temperature, and a mode (e.g., 2G, 3G, 4G, 5G). By protecting these elements, these elements survive power surges instead of failing.

Abstract: Calibration systems and methods for power management systems are disclosed. In one aspect, a power management circuit may include a direct current (DC) to DC converter that operates with external surface-mounted components provided by third parties. Exemplary aspects of the present disclosure provide systems and methods to measure the inductance, capacitance, and effective impedance of these external components. Based on the measurements, adjustments to a feedback loop may be made to provide desired operation. In a specific aspect, switches may be used along with an injected current to measure inductance, capacitance, and impedance independently (orthogonally). By providing the flexibility to interoperate with components from different vendors or components that may have loose design tolerances, greater flexibility is provided to original equipment manufacturers of mobile computing devices.

Abstract: Systems and methods for ripple reduction for direct current-to-direct current (DC-DC) converters are disclosed. In one aspect, ripple is reduced by measuring a load current proxy and providing a fast-acting feedback loop to the DC-DC converter to adjust current levels to a desired level. In particular, a change in voltage at and output may be measured, and its derivative (dV/dt) calculated and multiplied by a capacitance to determine the load current. In a second aspect, two DC-DC converters are used, where low-frequency current changes are handled by a first DC-DC converter, mid-frequency current changes are handled by the second DC-DC converter, and fast-frequency current changes are handled by the capacitor associated with the capacitance of the first aspect.

Abstract: Amplitude modulation-phase modulation (AM-PM) linearization in a power amplifier using bias circuitry, which fixes a bias of a cascode transistor within a power amplifier is disclosed. In particular, the cascode transistor may switch between operation in a saturation mode and a triode mode. The bias is set such that the cascode transistor operates at a fixed duty cycle in the triode mode relative to the saturation mode for a wide range of signal levels from small-signal to large-signal. An exemplary duty cycle is fifty percent (50%), although other duty cycles may be used. This bias will result in a constant capacitance contributed by the cascode device to the power amplifier over a wide signal level range.

Abstract: Systems and methods for analog predistortion (APD) in power amplifiers are disclosed. In one aspect, APD may be provided in a front-end module (FEM) of a transmitter. More specifically, the APD may include different predistortions based on where within a frequency band the signal to be distorted is operating (i.e., sub-band APD). The APD in the FEM may further be based on operating conditions such as temperature within the FEM. Still further, the FEM may be configured to apply different APD based on whether or not a baseband processor (BBP) applies digital predistortion (DPD). At a minimum, the provision of the APD may make the operation of a power amplifier in FEM more linear. Further, where DPD is present, the use of the APD may simplify the requirements for the DPD provided in the BBP.

Abstract: The present disclosure pertains to a power amplifier system that promotes enhanced signal linearity and overall system efficiency. The system includes a power amplifier with an amplification path for a radio frequency (RF) signal, and detector circuitry operationally linked to sample locations along this path. The detector circuitry captures and transmits signal characteristics of the RF signal. A voltage standing wave ratio (VSWR) quadrant data generator in communication with the detector circuitry generates VSWR quadrant data based on the detected signal characteristics. The baseband circuitry, comprised of a memory unit preconfigured with digital pre-distortion (DPD) coefficients and a DPD processor, controls the shaping of pre-distortion applied to the RF signal based on the VSWR data, thereby enhancing signal linearity. The components of the system interconnect and collaboratively function to optimize the performance and efficiency of the power amplifier system.

Abstract: Improving power amplifier efficiency and linearity in a wireless transmission circuit is disclosed. Like conventional Doherty power amplifiers, a power amplifier circuit disclosed herein amplifies a signal using a carrier path and a peaking path. Contrary to activating the peaking path based on a conventional feedback-based activation scheme, the power amplifier circuit is configured to activate the peaking path based on a feedforward activation scheme. Specifically, the power amplifier circuit is configured to receive an envelope signal that is time-aligned with a time-variant power envelope of the signal to be amplified therein. Herein, the power amplifier circuit is configured to process the envelope signal to ensure that activation of the peaking path tracks compression of the carrier path under various local environmental conditions.

Abstract: A power amplifier with clamp and feedback protection circuitry is disclosed. In one aspect, the power amplifier is initially protected by a fast-acting clamp circuit whose overall size is relatively limited. Subsequent operation allows a comparatively slowly acting feedback loop to dominate the protection of the power amplifier. By providing the two protection circuits, each optimized for a particular phase of protection, the overall size of associated protection circuitry may be diminished while still protecting the power amplifier from failure inducing conditions.