Abstract: Systems and method for bidirectional communication for front end modules (FEM) are disclosed. In one aspect, a bidirectional communication path tunneling through an existing communication bus between a FEM and a baseband processor is created. In a particular aspect, a driver may be hosted by an external processor and communicate with the baseband processor to effectuate the desired tunneled communication through the bus between the baseband processor and the FEM. The bidirectional communication may allow the FEM to adjust settings to optimize performance based on the information provided by the baseband processor. Likewise, information from the FEM may be used to adjust operation of the baseband processor.

Abstract: The present disclosure relates to an amplifier system having an output amplifier stage with a signal input and output, and a varactor with a capacitive output that is coupled to the signal input for adjusting input capacitance. The amplifier system also includes push varactor bias circuitry with a bias level output that is coupled to a tuning input, and a bias control input. The push varactor bias circuitry is configured to adjust bias voltage at the tuning input and thereby adjust the capacitance at the signal input by way of the varactor and reduce signal distortion at the signal output in response to a distortion compensation signal received at the bias control input.

Abstract: An acoustic transformer in a transmitter chain is disclosed. In one aspect, a differential power amplifier may produce a differential signal that is provided to an acoustic transformer coupled to an acoustic filter. The acoustic transformer provides a single-ended output signal for use by the acoustic filter. To facilitate operation in multiple bands, multiple acoustic transformer-acoustic filter pairs may be provided with a switching network used to route the amplified signal to the appropriate transformer-filter pair.

Abstract: A power amplifier using multi-path common-mode feedback loops for radio frequency linearization is disclosed. In one aspect, a complementary metal oxide semiconductor (CMOS) power amplifier containing cascoded n-type field effect transistors (NFETs) and cascoded p-type FETs (PFETs) may have a common-mode feedback network and provides bias voltages that are dynamically varying with the signal power to keep the output common-mode fixed around a half-supply level, while the small-signal and large-signal transconductances of the FET's are kept balanced. A further feedback network may be associated with the supply voltage to assist in providing a symmetrical supply signal. The symmetrical supply signal allows for supply variations without introducing distortion for the power amplifier stage.

Abstract: Hybrid predistortion in a wireless transmission circuit is provided. The wireless transmission circuit includes a transceiver circuit that generates a radio frequency (RF) signal and a power amplifier circuit than amplifies the RF signal for transmission. In aspects disclosed herein, the transceiver circuit is configured to perform a digital predistortion(s) (DPD) on a digital version of the RF signal and the power amplifier circuit is configured to perform an analog predistortion(s) (APD) on the RF signal to collectively cancel varies types of distortions in the RF signal. By concurrently performing a combination of DPD and APD (a.k.a. hybrid predistortion) across the transceiver circuit and the power amplifier circuit, it is possible to effectively restore linearity in the RF signal and improve overall performance of the wireless transmission circuit with reduced footprint, cost, and computational complexity.

Abstract: A power amplifier system having a power amplifier stage with dynamic bias circuitry is disclosed. Also included is bias control circuitry having a compression sensor having a sensor input coupled to a RF signal output and a sensor output, wherein the compression sensor is configured to generate a gain deviation signal in response to a sensed deviation from a flat gain profile of the power amplifier stage. Further included is a bias driver that is configured to drive dynamic bias circuitry to adjust bias to the power amplifier stage to maintain the flat gain profile in response to the gain deviation signal.

Abstract: A power amplifier system is disclosed having a first amplifier with a high-power input and a high-power output. A second amplifier has a low-power input and a low-power output. A reconfigurable mode switch network has a first series switch branch coupled between the high-power output and an RF output, a first shunt branch is coupled between the RF output and a fixed voltage node, and a second series switch branch is coupled between the low-power output and a shared node of the first shunt branch. The shared node separates the first shunt branch into a first shared section that is between the RF output and the shared node and a second shared section that is between the shared node and the fixed voltage node.

Abstract: Systems and methods for front-end linearization using information from a baseband circuit are disclosed. In one aspect, a baseband circuit provides information to a front-end module that uses the information to adjust operating parameter settings such as how an analog predistortion (APD) circuit or power management integrated circuit behaves to provide more linear operation of the front-end module across the frequencies of interest. In exemplary aspects, the front-end module may receive raw information from which the front-end module determines what changes should be made. In alternate exemplary aspects, the baseband circuit provides instructions or coefficients that are then used by the front-end module to make the changes. In either event, the front-end module may optimize operation to reduce power consumption and provide more linear operation so that the transceiver may better operate within the parameters of a given wireless protocol.

Abstract: A bias circuit (3300) for a power amplifier (3310) is disclosed. The bias circuit (3300) may select between different power sources based on a power need for the power amplifier (3310). As voltage levels between the different power sources may differ at the moment of transition, additional circuitry is provided to smooth the transition between the differing power levels. Further, the bias circuit (3300) may provide bias signals to multiple stacked transistors in the power amplifier (3310) in such a manner so as to avoid collapsing any of the transistors. One such approach is a piecewise linear bias signal. Still further, the bias circuit (3300) may interoperate with predistortion circuitry to assist in linear operation of the power amplifier (3310). Still further, the bias circuit (3300) may interoperate with protection circuitry to prevent over current, over voltage, or over power conditions that may damage the power amplifier (3310).

Abstract: A power amplifier includes an over-current protection loop and/or an over-voltage protection loop to assist in preventing operation outside a safe operating zone. In particular, a trigger threshold for the protection loop may dynamically change as a function of another parameter associated with the transmission. Exemplary parameters include, but are not necessarily limited to: supply voltage, temperature, frequency, modulation, voltage standing wave ratio (VSWR), or combinations thereof. In still further exemplary aspects, the over-voltage protection loop may operate independently of the over-current protection current loop, or the over-voltage protection loop contribute to an over-current protection signal.

Abstract: A power amplifier system having a power amplifier stage with dynamic bias circuitry is disclosed. Also included is bias control circuitry having a compression sensor having a sensor input coupled to a RF signal output and a sensor output, wherein the compression sensor is configured to generate a gain deviation signal in response to a sensed deviation from a flat gain profile of the power amplifier stage. Further included is a bias driver that is configured to drive dynamic bias circuitry to adjust bias to the power amplifier stage to maintain the flat gain profile in response to the gain deviation signal.

Abstract: A power amplifier includes an over-current protection loop and/or an over-voltage protection loop to assist in preventing operation outside a safe operation zone. In a further exemplary aspect, triggering of the over-current protection loop adjusts a threshold voltage for the over-voltage protection loop. In further exemplary aspects, the over-current protection loop may adjust not only a bias regulator, but also provide an auxiliary control signal that further limits signals reaching the power amplifier. In still further exemplary aspects, the over-voltage protection loop may operate independently of the over-current protection current loop or the over-voltage protection loop contribute to an over-current protection signal.

Abstract: A multigenerational front-end module (FEM) is disclosed. In particular, a FEM having a single transmission path may include a single power amplifier with supporting elements such as for example, bias levels, load modulation, supply voltages, or the like, that may be reconfigured and tuned so as to allow the single power amplifier to adapt effectively and work with different generations of wireless protocols. The use of such an adaptive, reconfigurable, tunable transmission path allows smaller and more cost-effective FEMs to be provided. Settings for the various changes may be stored in a look-up table (LUT) or the like.

Abstract: A multigenerational front-end module (FEM) with 2G Vramp capabilities is disclosed. In particular, a FEM having a single transmission path may include a single power amplifier with supporting elements such as for example, bias levels, load modulation, supply voltages, or the like, that may be reconfigured and tuned so as to allow the single power amplifier to adapt effectively and work with different generations of wireless protocols. Further, this multigenerational FEM is able to accommodate a 2G Vramp mode with a multistage power amplifier, each with its own gate or base control signal instead of a collector signal control. This control is further effectuated by efficient power detection.

Abstract: A power amplifier system is disclosed having a first amplifier with a high-power input and a high-power output. A second amplifier has a low-power input and a low-power output. A reconfigurable mode switch network has a first series switch branch coupled between the high-power output and an RF output, a first shunt branch is coupled between the RF output and a fixed voltage node, and a second series switch branch is coupled between the low-power output and a shared node of the first shunt branch. The shared node separates the first shunt branch into a first shared section that is between the RF output and the shared node and a second shared section that is between the shared node and the fixed voltage node.

Abstract: A power amplifier with analog predistortion is disclosed. In one aspect, a signal in the transmission chain is sampled to determine if a phase distortion (delay or advancement) is present. Information about the sampled signal is provided to a control circuit, which uses an analog predistortion circuit to inject a correction signal into the transmission chain so as to offset or compensate for the phase distortion. In an exemplary aspect, the analog predistortion circuit may use a variable capacitor to generate the correction signal that is injected. This detection and adjustment may be done in the front end of the transmission chain so as to avoid reliance on a baseband processor. Use of such analog predistortion helps maintain desired linear operation over the large bandwidths of emerging wireless communication standards.

Abstract: A power amplification circuit includes an amplifier circuit (800) comprising cascode transistors coupled in series between an output node (816) and a reference voltage node. A bias control circuit includes an on-state bias control circuit (806), a first off-state bias control circuit, and a second off-state bias control circuit to provide bias voltages to control terminals of the plurality of cascode transistors. The on-state bias control circuit (806) controls the bias voltages during operation. In a first off-state, an electrostatic charge may cause a destructive voltage on the output node (816). The first off-state bias circuit (808) generates bias voltages based on the electrostatic charge. A second off-state condition occurs in an inactive amplifier circuit coupled to an output node on which a voltage is generated by a parallel active amplifier circuit coupled to the output node (816).

Abstract: A power amplification circuit (600) includes an amplifier circuit (100) and a circuit (602) protecting the amplifier circuit (100) from destructive voltage. The amplifier circuit includes a first cascode transistor (104(1)) coupled to an output node, a last cascode transistor (104(5)) coupled to a reference voltage node (GND), and one or more cascode transistors (104(2)-104(4)) coupled between the first cascode transistor (104(1)) and the last cascode transistor (104(5)). Circuit protecting the amplifier circuit (100) may include a protection circuit (602) to provide a feedback signal to a bias circuit (606) to reduce the bias voltage on the last cascode transistor (104(5)) and/or a stress control circuit (604) coupled to a control terminal of the first cascode transistor (104(1)) to increase the bias voltage on a control terminal of the first cascode transistor (104(1)) to avoid a destructive voltage.

Abstract: A power amplifier with analog predistortion is disclosed. In one aspect, a signal in the transmission chain is sampled to determine if an amplitude distortion (expansion or compression) is present. Information about the sampled signal is provided to a control circuit, which uses an analog predistortion circuit to inject a correction signal into the transmission chain so as to offset or compensate for the amplitude distortion. In an exemplary aspect, the analog predistortion circuit adjusts a bias signal provided to the power amplifier. This detection and adjustment may be done in the front end of the transmission chain so as to avoid reliance on a baseband processor. Use of such analog predistortion helps maintain desired linear operation over the large bandwidths of emerging wireless communication standards.

Abstract: Disclosed is a power amplifier having an output stage (12) having a radio frequency (RF) output (14) and an RF input (16) and a driver stage (18) having a driver input (20) coupled to the RF input (16), a control input (22), and a driver output (24), wherein the driver stage (18) is configured to have a controllable soft compression characteristic that substantially neutralizes a gain expansion characteristic of the output stage (12). Also included is a controller (26) having a control output (28) coupled to the control input (22) of the driver stage (18), wherein the controller (26) is configured to generate a control signal at the control output (28) that controls the soft compression characteristic of the driver stage (18).