Patents by Inventor Baker Scott

Baker Scott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230246601
    Abstract: A protection circuit for an acoustic filter and/or a power amplifier is disclosed. In one aspect, the protection circuit includes a bidirectional coupler that helps secure a measurement of power at an antenna. The power measurement is compared to a threshold by a detector, and if the power measurement is above the threshold, a signal is sent that causes debiasing of a power amplifier stage, which reduces power levels of signals being amplified by the power amplifier stage and correspondingly lowers the power level going through a filter associated with the power amplifier stage. By lowering the power level going through the power amplifier stage and the filter, both elements are protected against over power conditions allowing functionality to be maintained.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 3, 2023
    Inventors: Baker Scott, George Maxim, Stephen James Franck, Hui Liu, Jungmin Park
  • Publication number: 20230246611
    Abstract: A driving amplifier with low output impedance is disclosed. In one aspect, a driving amplifier stage that does not need an inter-stage impedance matching network between the driving amplifier stage and an output amplifier stage in a transmission chain may be achieved by providing stacking transconductance devices within the driving amplifier stage and reusing a supply current to provide an intermediate signal with high current but moderated voltage swing to drive the output amplifier stage, in specifically contemplated aspects, the stacked transconductance devices may be complementary metal oxide semiconductor (CMOS) field effect transistors (FETs).
    Type: Application
    Filed: January 31, 2022
    Publication date: August 3, 2023
    Inventors: Baker Scott, George Maxim, Marcus Granger-Jones
  • Patent number: 11699978
    Abstract: Doherty radio frequency (RF) amplifier circuitry includes an input node, an output node, a main amplifier path, and a peaking amplifier path. The main amplifier path is coupled between the input node and the output node and includes a main amplifier. The peaking amplifier path is coupled in parallel with the main amplifier path between the input node and the output node, and includes a peaking amplifier and a peaking variable gain preamplifier between the input node and the peaking amplifier. The peaking variable gain preamplifier is configured to adjust a current provided to the peaking amplifier.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: July 11, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, George Maxim, Dirk Robert Walter Leipold
  • Publication number: 20230170858
    Abstract: A power amplifier system having a power amplifier stage with dynamic bias circuitry is disclosed. Also included is bias control circuitry having a compression sensor having a sensor input coupled to a RF signal output and a sensor output, wherein the compression sensor is configured to generate a gain deviation signal in response to a sensed deviation from a flat gain profile of the power amplifier stage. Further included is a bias driver that is configured to drive dynamic bias circuitry to adjust bias to the power amplifier stage to maintain the flat gain profile in response to the gain deviation signal.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 1, 2023
    Inventors: Baker Scott, Chong Woo, George Maxim
  • Patent number: 11626892
    Abstract: A multi-band radio frequency (RF) front-end circuit is provided. The multi-band RF front-circuit includes multiple RF circuits configured to amplify RF signals received and/or to be transmitted in multiple RF bands and/or polarizations via an antenna circuit. The antenna circuit includes multiple antenna tap points each coupled to a respective one of the RF circuits. Since each of the RF circuits has a respective impedance that can vary based on the RF bands, the antenna tap points are so positioned on the antenna circuit to each present a respective drive impedance that matches the respective impedance of a coupled RF circuit. Further, the antenna tap points are also positioned on the antenna circuit to cause desired RF isolations between the RF bands and/or the polarizations. Consequently, the multi-band RF front-end circuit can achieve optimal RF performance across a wide range of RF bands with reduced footprint and insertion losses.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: April 11, 2023
    Assignee: Qorvo US, Inc.
    Inventors: George Maxim, Baker Scott, Ali Tombak
  • Publication number: 20230094883
    Abstract: A power amplifier includes an over-current protection loop and/or an over-voltage protection loop to assist in preventing operation outside a safe operation zone. In a further exemplary aspect, triggering of the over-current protection loop adjusts a threshold voltage for the over-voltage protection loop. In further exemplary aspects, the over-current protection loop may adjust not only a bias regulator, but also provide an auxiliary control signal that further limits signals reaching the power amplifier. In still further exemplary aspects, the over-voltage protection loop may operate independently of the over-current protection current loop or the over-voltage protection loop contribute to an over-current protection signal.
    Type: Application
    Filed: September 29, 2021
    Publication date: March 30, 2023
    Inventors: Baker Scott, Stephen James Franck, George Maxim, Chong Woo
  • Publication number: 20230096011
    Abstract: A power amplifier includes an over-current protection loop and/or an over-voltage protection loop to assist in preventing operation outside a safe operation zone. In a further exemplary aspect, triggering of the over-current protection loop adjusts a threshold voltage for the over-voltage protection loop. In further exemplary aspects, the over-current protection loop may adjust not only a bias regulator, but also provide an auxiliary control signal that further limits signals reaching the power amplifier. In still further exemplary aspects, the over-voltage protection loop may operate independently of the over-current protection current loop or the over-voltage protection loop contribute to an over-current protection signal.
    Type: Application
    Filed: September 29, 2021
    Publication date: March 30, 2023
    Inventors: Baker Scott, Chong Woo, George Maxim
  • Patent number: 11342889
    Abstract: A power amplifier system is disclosed that includes a power amplifier having a first signal input, a first signal output, second signal input, and a second signal output. The power amplifier system further includes cross-coupled bias circuitry having a first transistor with a first collector coupled to the first signal input, a first base coupled to the second signal input, and a first emitter coupled to a fixed voltage node, a second transistor with a second collector coupled to the second signal input, a second base coupled to the first signal input, and a second emitter coupled to the fixed voltage node.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: May 24, 2022
    Assignee: QORVO US, INC.
    Inventors: George Maxim, Stephen James Franck, Michael F. Zybura, Baker Scott
  • Publication number: 20220076869
    Abstract: Embodiments of an apparatus that includes a substrate and an inductor residing in the substrate are disclosed. In one embodiment, the inductor is formed as a conductive path that extends from a first terminal to a second terminal. The conductive path has a shape corresponding to a two-dimensional (2D) lobe laid over a three-dimensional (3D) volume. Since the shape of the conductive path corresponds to the 2D lobe laid over a 3D volume, the magnetic field generated by the inductor has magnetic field lines that are predominately destructive outside the inductor and magnetic field lines that are predominately constructive inside the inductor. In this manner, the inductor can maintain a high quality (Q) factor while being placed close to other components.
    Type: Application
    Filed: November 16, 2021
    Publication date: March 10, 2022
    Inventors: George Maxim, Dirk Robert Walter Leipold, Baker Scott
  • Patent number: 11244786
    Abstract: This disclosure relates generally to substrates having three dimensional (3D) inductors and methods of manufacturing the same. In one embodiment, the 3D inductor is a solenoid inductor where the exterior edge contour of the winding ends is substantially the same and substantially aligned with the exterior edge contour of the exterior edge contour of conductive vias that connect the windings. In this manner, there is no overhang between the windings and the conductive vias. In another embodiment of the 3D inductor, via columns connect connector plates. The via column attachment surfaces of each of the conductive vias in each of the columns is the same and substantially aligned. In this manner, carrier pads are not needed and there is no overhand between the conductive vias.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: February 8, 2022
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, George Maxim, John August Orlowski, Baker Scott
  • Patent number: 11233485
    Abstract: A power amplifier linearization circuit and related apparatus is provided. In examples disclosed herein, the power amplifier linearization circuit includes an analog pre-distortion (APD) circuit coupled to an input of a power amplifier. Notably, the power amplifier can exhibit linearity response deviation, namely linearity amplitude response deviation and linearity phase response deviation, when amplifying a radio frequency (RF) signal under a compression condition. As such, the APD circuit is configured to receive a control signal corresponding to the linearity response deviation and pre-process the RF signal based on the control signal before providing the RF signal to the power amplifier. As a result, it may be possible to reduce the linearity response deviation in the power amplifier, thus helping to improve linearity and RF performance of the power amplifier.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: January 25, 2022
    Assignee: Qorvo US, Inc.
    Inventors: Michael F. Zybura, Toshiaki Moriuchi, Baker Scott, Mikyung Cho, Edward T. Spears
  • Patent number: 11196392
    Abstract: A device having device function circuitry configured to receive a device signal and output a modified device signal is disclosed. The device includes a device temperature sensor configured to generate a device temperature signal that is proportional to a temperature of the device function circuitry. The device function circuitry is further configured to maintain power dissipation of the device function circuitry to below a predetermined safe power dissipation level in response to a control signal that is generated based upon the device temperature signal.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: December 7, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, George Maxim, Chong Woo
  • Patent number: 11190149
    Abstract: Radio frequency (RF) filters configured to filter undesired signal components (e.g., noise and harmonics) from RF signals are disclosed. In one embodiment, an RF filter includes a first inductor coil having a first winding and a second inductor coil having a second winding and a third winding. The second winding of the second inductor coil is configured to have a first mutual magnetic coupling with the first winding, while the third winding of the second inductor coil is configured to have a second mutual magnetic coupling with the first winding. The second winding is connected to the third winding such that the first mutual magnetic coupling and the second mutual magnetic coupling are in opposition. In this manner, the first inductor coil and the second inductor coil may be provided in a compact arrangement while providing weak mutual magnetic coupling between the first inductor coil and the second inductor coil.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: November 30, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, George Maxim, Baker Scott, Danny W. Chang
  • Patent number: 11177064
    Abstract: Embodiments of an apparatus that includes a substrate and an inductor residing in the substrate are disclosed. In one embodiment, the inductor is formed as a conductive path that extends from a first terminal to a second terminal. The conductive path has a shape corresponding to a two-dimensional (2D) lobe laid over a three-dimensional (3D) volume. Since the shape of the conductive path corresponds to the 2D lobe laid over a 3D volume, the magnetic field generated by the inductor has magnetic field lines that are predominately destructive outside the inductor and magnetic field lines that are predominately constructive inside the inductor. In this manner, the inductor can maintain a high quality (Q) factor while being placed close to other components.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: November 16, 2021
    Assignee: Qorvo US, Inc.
    Inventors: George Maxim, Dirk Robert Walter Leipold, Baker Scott
  • Patent number: 11159128
    Abstract: A device having device function circuitry configured to receive a device signal and output a modified device signal is disclosed. The device includes a device temperature sensor configured to generate a device temperature signal that is proportional to a temperature of the device function circuitry. The device function circuitry is further configured to maintain power dissipation of the device function circuitry to below a predetermined safe power dissipation level in response to a control signal that is generated based upon the device temperature signal.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: October 26, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, George Maxim, Chong Woo
  • Patent number: 11152363
    Abstract: The present disclosure relates to a bulk complementary-metal-oxide-semiconductor (CMOS) device including a device substrate, a thinned device die with a device region over the device substrate, a first mold compound, and a second mold compound. The device region includes a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion. The first mold compound resides over the device substrate, surrounds the thinned device die, and extends vertically beyond the thinned device die to define an opening over the thinned device die and within the first mold compound. The second mold compound fills the opening and directly connects the thinned device die. Herein, a silicon material with a resistivity between 5 Ohm-cm and 30000 Ohm-cm does not exist between the second mold compound and the thinned device die.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: October 19, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Michael Carroll, Dirk Robert Walter Leipold, George Maxim, Baker Scott
  • Patent number: 11152895
    Abstract: A Doherty amplifier is disclosed with a main amplifier having a main input in communication with a radio frequency (RF) signal input and a main output in communication with a RF signal output. Also included is a peaking amplifier having a peak input in communication with the RF signal input and a peak output in communication with the RF signal input. Further included is main neutralization circuitry having a main neutralization input in communication with the peak input and a main neutralization output in communication with the main input, wherein the main neutralization circuitry is configured to inject a main neutralization signal into the main input such that the main neutralization signal is 180°±10% out of phase and equal in amplitude to within ±10% of a main parasitic feedback signal passed from the main output to the main input by way of a main parasitic feedback capacitance.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: October 19, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, George Maxim, Dirk Robert Walter Leipold
  • Patent number: 11139238
    Abstract: A three-dimensional (3-D) inductor is incorporated in a substrate. The 3-D inductor has a first connector plate, a second connector plate, a third connector plate, a first terminal plate, and a second terminal plate. Four multi-via walls connect the various plates, wherein each multi-via wall includes a first group of at least three individual via columns, each of which connects two plates together.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: October 5, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, George Maxim, Baker Scott, Toshiaki Moriuchi
  • Publication number: 20210305942
    Abstract: Doherty radio frequency (RF) amplifier circuitry includes an input node, an output node, a main amplifier path, and a peaking amplifier path. The main amplifier path is coupled between the input node and the output node and includes a main amplifier. The peaking amplifier path is coupled in parallel with the main amplifier path between the input node and the output node, and includes a peaking amplifier and a peaking variable gain preamplifier between the input node and the peaking amplifier. The peaking variable gain preamplifier is configured to adjust a current provided to the peaking amplifier.
    Type: Application
    Filed: April 12, 2021
    Publication date: September 30, 2021
    Inventors: Baker Scott, George Maxim, Dirk Robert Walter Leipold
  • Publication number: 20210305944
    Abstract: A device having device function circuitry configured to receive a device signal and output a modified device signal is disclosed. The device includes a device temperature sensor configured to generate a device temperature signal that is proportional to a temperature of the device function circuitry. The device function circuitry is further configured to maintain power dissipation of the device function circuitry to below a predetermined safe power dissipation level in response to a control signal that is generated based upon the device temperature signal.
    Type: Application
    Filed: March 30, 2020
    Publication date: September 30, 2021
    Inventors: Baker Scott, George Maxim, Chong Woo