Abstract: A structure includes a metal layer and a plurality of interconnected unit cells forming a lattice contained at least partly within the metal layer, including at least a first unit cell formed of first interconnected graphene tubes, and a second unit cell formed of second interconnected graphene tubes, wherein the metal layer protrudes through holes within the lattice.

Abstract: A microelectronic device is formed by dispensing discrete amounts of a mixture of photoresist resin and solvents from droplet-on-demand sites onto a wafer to form a first photoresist sublayer, while the wafer is at a first temperature which allows the photoresist resin to attain less than 10 percent thickness non-uniformity. The wafer moves under the droplet-on-demand sites in a first direction to form the first photoresist sublayer. A portion of the solvents in the first photoresist sublayer is removed. A second photoresist sublayer is formed on the first photoresist sublayer using the droplet-on-demand sites while the wafer is at a second temperature to attain less than 10 percent thickness non-uniformity in the combined first and second photoresist sublayers. The wafer moves under the droplet-on-demand sites in a second direction for the second photoresist sublayer, opposite from the first direction.

Abstract: A method includes measuring a first signal from a set of pyroelectric devices at a first temperature and measuring a second signal from a set of piezoelectric devices at a first acceleration. The method also includes measuring a third signal from the set of pyroelectric devices at a second temperature and measuring a fourth signal from the set of piezoelectric devices at a second acceleration. The method further includes adjusting a piezoelectric calibration using the first, second, third, and fourth signals.

Abstract: A system includes a substrate; a bond pad; a wire spanning above the substrate, having a first end bonded to the bond pad and a second end extending from the bond pad to terminate in a second end thereof; and a support structure disposed on the substrate, the support structure comprising at least a side wall and extending from the substrate to terminate in an end portion spaced from the substrate to support the wire.

Abstract: In an integrated circuit, a metal-insulator-metal (MIM) diode includes: a first metallization structure level having a first metal layer; a first dielectric layer over the first metal layer; a metal contact or via on the first metal layer and extending through a portion of the first dielectric layer; and a second metallization structure level having a second metal layer; and a second dielectric layer over the second metal layer. The diode has a first electrode on the metal contact or via, a multilayer dielectric structure on the first electrode, and a second electrode between the multilayer dielectric structure and the second metal layer.

Abstract: In described examples an integrated circuit (IC) has multiple layers of dielectric material overlying at least a portion of a surface of a substrate. A trench is etched through the layers of dielectric material to expose a portion the substrate to form a trench floor, the trench being surrounded by a trench wall formed by the layers of dielectric material. A metal perimeter band surrounds the trench adjacent the trench wall, the perimeter band being embedded in one of the layers of the dielectric material.

Abstract: In described examples, a microelectronic device includes a microelectronic die with a die attach surface. The microelectronic device further includes a nanoparticle layer coupled to the die attach surface. The nanoparticle layer may be in direct contact with the die attach surface, or may be coupled to the die attach surface through an intermediate layer, such as an adhesion layer or a contact metal layer. The nanoparticle layer includes nanoparticles having adjacent nanoparticles adhered to each other. The microelectronic die is attached to a package substrate by a die attach material. The die attach material extends into the nanoparticle layer and contacts at least a portion of the nanoparticles.

Abstract: An apparatus includes a mass detection circuit coupled to a surface covered with a plurality of electrodes. The mass detection circuit is configured to detect a mass of a first droplet present on the surface. The apparatus further includes a transducer circuit coupled to a transducer, which is coupled to the surface and form a lens unit. The transducer circuit configured to excite a first vibration of the surface at a resonant frequency to form a high displacement region on the surface. The apparatus also includes a voltage excitation circuit coupled to the plurality of electrodes. In response to the detection of the mass of the first droplet, the voltage excitation circuit is configured to apply a sequence of differential voltages on one or more consecutive electrodes which moves the first droplet to the high displacement region.

Abstract: In described examples, a method for fabricating a semiconductor device and a three dimensional structure, and packaging them together, includes: fabricating the integrated circuit on a substrate, immersing the substrate in a liquid encapsulation material, and illuminating the liquid encapsulation material to polymerize the liquid encapsulation material. Immersing the semiconductor device is performed to cover a layer of a platform in the liquid encapsulation material. The platform is a lead frame, a packaging substrate, or the substrate. The illuminating step targets locations of the liquid encapsulation material covering the layer. Illuminated encapsulation material forms solid encapsulation material that is fixedly coupled to contiguous portions of the semiconductor device and of the solid encapsulation material. The immersing and illuminating steps are repeated until a three dimensional structure is formed. The integrated circuit and the three dimensional structure are encapsulated in a single package.

Abstract: An encapsulated integrated circuit includes an integrated circuit (IC) die. An encapsulation material encapsulates the IC die. Within the encapsulation material, a phononic bandgap structure is configured to have a phononic bandgap with a frequency range approximately equal to a range of frequencies of thermal phonons produced by the IC die when the IC die is operating.

Abstract: A layer of additive material is formed in a circular printing area on a substrate using additive sources distributed across a printing zone. The additive sources form predetermined discrete amounts of the additive material. The substrate and the additive sources are rotated with respect to each other around a center of rotation, so that a pattern of the additive material is formed in a circular printing area on the substrate. Each additive source receives actuation waveforms at an actuation frequency that is proportional to a distance of the additive source from the center of rotation. The actuation waveforms include formation signals, with a maximum of one formation signal in each cycle of the actuation frequency. The formation signals result in the additive sources forming the predetermined discrete amounts of the additive material on the substrate.

Abstract: A multi-die module includes a first die with a first electronic device and a second die with a second electronic device. The multi-die module also includes a contactless coupler configured to convey signals between the first electronic device and the second electronic device. The multi-die module also includes a coupling loss reduction structure.

Abstract: A packaged electronic device includes an integrated circuit and an electrically non-conductive encapsulation material in contact with the integrated circuit. A thermal conduit extends from an exterior of the package, through the encapsulation material, to the integrated circuit. The thermal conduit has a thermal conductivity higher than the encapsulation material contacting the thermal conduit. The thermal conduit includes a cohered nanoparticle film. The cohered nanoparticle film is formed by a method which includes an additive process.

Abstract: A semiconductor device includes a metal substrate including a through-hole aperture having a multi-size cavity including a larger area first cavity portion above a smaller area second cavity portion that defines a first ring around the second cavity portion, where the first cavity portion is sized with area dimensions to receive a semiconductor die having a top side with circuitry coupled to bond pads thereon and a back side with a metal (BSM) layer thereon. The semiconductor die is mounted top side up with the BSM layer on the first ring. A metal die attach layer directly contacts the BSM layer, sidewalls of the bottom cavity portion, and a bottom side of the metal substrate.

Abstract: An integrated circuit has a substrate that includes a semiconductor material, and an interconnect region disposed on the substrate. The integrated circuit includes a thermal routing trench in the substrate. The thermal routing trench includes a cohered nanoparticle film in which adjacent nanoparticles are cohered to each other. The thermal routing trench has a thermal conductivity higher than the semiconductor material contacting the thermal routing trench. The cohered nanoparticle film is formed by an additive process.

Abstract: A pressure sensor apparatus is disclosed. The pressure sensor apparatus includes a bulk acoustic wave (BAW) die having a die interface side and a pressure contact side, a sensor BAW resonator and a reference BAW resonator disposed on the die interface side of the BAW die, a control circuit die coupled to the die interface side of the BAW die via an attachment layer, and an extended opening on the pressure contact side that extends into a depth of the BAW die and is generally aligned with the sensor BAW resonator, the extended opening being configured to translate an external pressure on the pressure contact side onto the sensor BAW resonator.

Abstract: In described examples, a physics cell includes: a laser source configured to emit light towards an atomic chamber containing an atomic gas; a photodetector configured to receive emissions from the atomic chamber; and a field coil for generating a magnetic field in the atomic chamber. An electronics circuit includes: a controller circuit coupled to the photodetector output and having control outputs to a digital to analog converter circuit; the digital to analog converter circuit having a coil current output to adjust the magnetic field, a modulation control output to control a modulation of the light, and having an output to control a voltage controlled oscillator; and a radio-frequency output circuit having a voltage controlled oscillator coupled to the output of the digital to analog converter circuit outputting a radio frequency signal to the laser source in the physics cell.

Abstract: In described examples of a CMOS IC, an ultrasonic transducer having terminals is formed on a substrate of the IC. CMOS circuitry having ultrasonic signal terminals is formed on the substrate. At least one metal interconnect layer overlies the ultrasonic transducer and the CMOS circuitry. The at least one metal interconnect layer connects the CMOS circuitry ultrasonic signal terminals to the terminals of the ultrasonic transducer.

Abstract: In described examples, a circuit (e.g., an integrated circuit) includes a semiconductor substrate that includes a frontside surface and a backside surface. A circuit element is included at the frontside surface. An optional electrical insulator layer can be included adjacent to the backside surface. A distributor layer is included adjacent to the backside surface. In some examples, the distributor layer includes a distributor material that includes a matrix of cohered nanoparticles and metallic particles embedded by the cohered nanoparticles.

Abstract: In described examples, a method for encapsulating a semiconductor device includes the steps of immersing a layer of the semiconductor device in a liquid encapsulation material, irradiating portions of the liquid encapsulation material to polymerize the liquid encapsulation material, and moving the semiconductor device further from a surface of the liquid encapsulation material proximate to the layer. Immersing the semiconductor device is performed to cover a layer of the device in the liquid encapsulation material. Targeted locations of the liquid encapsulation material covering the layer are irradiated to form solid encapsulation material. The semiconductor device is moved from a surface of the liquid encapsulation material so that a new layer of the semiconductor device and/or of the solid encapsulation material can be covered by the liquid encapsulation material.