Abstract: In described examples, a method for encapsulating a semiconductor device includes the steps of immersing a layer of the semiconductor device in a liquid encapsulation material, irradiating portions of the liquid encapsulation material to polymerize the liquid encapsulation material, and moving the semiconductor device further from a surface of the liquid encapsulation material proximate to the layer. Immersing the semiconductor device is performed to cover a layer of the device in the liquid encapsulation material. Targeted locations of the liquid encapsulation material covering the layer are irradiated to form solid encapsulation material. The semiconductor device is moved from a surface of the liquid encapsulation material so that a new layer of the semiconductor device and/or of the solid encapsulation material can be covered by the liquid encapsulation material.

Abstract: A floating die package including a cavity formed through sublimation of a sacrificial die encapsulant and sublimation or separation of die attach materials after molding assembly. A pinhole vent in the molding structure is provided as a sublimation path to allow gases to escape, whereby the die or die stack is released from the substrate and suspended in the cavity by the bond wires only.

Abstract: A packaged semiconductor device includes a metal substrate having a first and second through-hole aperture having an outer ring, and metal pads around the apertures on dielectric pads. A first and second semiconductor die have a back side metal (BSM) layer on its bottom side are mounted top side up on a top portion of the apertures. A metal die attach layer is directly between the BSM layer and walls of the metal substrate bounding the apertures to provide a die attachment for the first and the second semiconductor die that fills a bottom portion of the apertures. Leads contact the metal pads, wherein the leads include a distal portion that extends beyond the metal substrate. Bondwires are between the metal pads and bond pads on the first and second semiconductor die, and a mold compound provides encapsulation for the packaged semiconductor device.

Abstract: A structure includes a substrate which includes a surface. The structure also includes a horizontal-type Hall sensor positioned within the substrate and below the surface of the substrate. The structure further includes a protective overcoat layer positioned above the surface of the substrate, and a sphere-shaped magnetic concentrator positioned above the protective overcoat layer. Instead of or in addition to the sphere-shaped magnetic concentrator, the structure may include an embedded magnetic concentrator positioned within the substrate and below the horizontal-type Hall sensor.

Abstract: In a described example, a structure includes a substrate having a surface with multiple sides. A sensor is positioned within the substrate and a seed layer is over at least four sides of the surface of the substrate. A magnetic shield layer is over the seed layer for the at least four sides of the surface of the substrate.

Abstract: A multi-die module includes a first die with a first device and a second die with a second device. The multi-die module also includes a contactless coupler configured to convey signals between the first device and the second device. The multi-die module also includes a coupling loss reduction structure.

Abstract: An electronic device includes a package substrate, a circuit assembly, and a housing. The circuit assembly is mounted on the package substrate. The circuit assembly includes a first sealed cavity formed in a device substrate. The housing is mounted on the package substrate to form a second sealed cavity about the circuit assembly.

Abstract: In described examples, a method for fabricating a semiconductor device and a three dimensional structure, and packaging them together, includes: fabricating the integrated circuit on a substrate, immersing the substrate in a liquid encapsulation material, and illuminating the liquid encapsulation material to polymerize the liquid encapsulation material. Immersing the semiconductor device is performed to cover a layer of a platform in the liquid encapsulation material. The platform is a lead frame, a packaging substrate, or the substrate. The illuminating step targets locations of the liquid encapsulation material covering the layer. Illuminated encapsulation material forms solid encapsulation material that is fixedly coupled to contiguous portions of the semiconductor device and of the solid encapsulation material. The immersing and illuminating steps are repeated until a three dimensional structure is formed. The integrated circuit and the three dimensional structure are encapsulated in a single package.

Abstract: An apparatus includes a mass detection circuit coupled to a surface covered with a plurality of electrodes. The mass detection circuit is configured to detect a mass of a first droplet present on the surface. The apparatus further includes a transducer circuit coupled to a transducer, which is coupled to the surface and form a lens unit. The transducer circuit configured to excite a first vibration of the surface at a resonant frequency to form a high displacement region on the surface. The apparatus also includes a voltage excitation circuit coupled to the plurality of electrodes. In response to the detection of the mass of the first droplet, the voltage excitation circuit is configured to apply a sequence of differential voltages on one or more consecutive electrodes which moves the first droplet to the high displacement region.

Abstract: A structure includes a substrate which includes a surface. The structure also includes a horizontal-type Hall sensor positioned within the substrate and below the surface of the substrate. The structure further includes a patterned magnetic concentrator positioned above the surface of the substrate, and a protective overcoat layer positioned above the magnetic concentrator.

Abstract: A leadless packaged semiconductor device includes a metal substrate having at least a first through-hole aperture having a first outer ring and a plurality of cuts through the metal substrate to define spaced apart metal pads on at least two sides of the first through-hole aperture. A semiconductor die that has a back side metal (BSM) layer on its bottom side and a top side with circuitry coupled to bond pads is mounted top side up on the first outer ring. A metal die attach layer is directly between the BSM layer and walls of the metal substrate bounding the first through-hole aperture that provides a die attachment that fills a bottom portion of the first through-hole aperture. Bond wires are between metal pads and the bond pads. A mold compound is also provided including between adjacent ones of the metal pads.

Abstract: A semiconductor device includes a metal substrate including a through-hole aperture having a multi-size cavity including a larger area first cavity portion above a smaller area second cavity portion that defines a first ring around the second cavity portion, where the first cavity portion is sized with area dimensions to receive a semiconductor die having a top side with circuitry coupled to bond pads thereon and a back side with a metal (BSM) layer thereon. The semiconductor die is mounted top side up with the BSM layer on the first ring. A metal die attach layer directly contacts the BSM layer, sidewalls of the bottom cavity portion, and a bottom side of the metal substrate.

Abstract: An integrated circuit die may be fabricating to have a plurality of contacts. A metal post may be formed on each of the plurality of contacts. A plurality of bumps may be formed on a plurality of contact regions of a leadframe or on the posts, in which the plurality of bumps are formed with a material that includes metal nanoparticles. The IC die may be attached to the leadframe by aligning the metal posts to the leadframe and sintering the metal nanoparticles in the plurality of bumps to form a sintered metal bond between each metal post and corresponding contact region of the leadframe.

Abstract: An encapsulated integrated circuit is provided that includes an integrated circuit (IC) die. An encapsulation material encapsulates the IC die. A phononic bandgap structure is included within the encapsulation material that is configured to have a phononic bandgap with a frequency range approximately equal to a range of frequencies of thermal phonons produced by the IC die when the IC die is operating.

Abstract: For surface wetting control, an apparatus can expel fluid from a droplet on a surface using a transducer mechanically coupled to the surface. A first area of the surface can have a first wettability for the fluid, and a second area of the surface can have a second wettability for the fluid. The first wettability of the first area of the surface can be greater than the second wettability of the second area of the surface. The first area and the second area can have a patterned arrangement.

Abstract: A semiconductor package includes a lead frame, a semiconductor device, a liquid metal conductor, and an encapsulation material. The semiconductor device is affixed to the lead frame. The liquid metal conductor couples the semiconductor device to the lead frame. The encapsulation material encases the semiconductor device, the liquid metal conductor, and at least a portion of the lead frame.

Abstract: A multi-die module includes a first die with a first substrate and a first device formed over the first substrate, wherein the first substrate includes a cavity on a side opposite the first device. The multi-die module also includes a second die with a second substrate and a second device formed over the second substrate, wherein the second die is positioned at least partially in the cavity. The multi-die module also includes a coupler configured to convey signals between the first device and the second device.

Abstract: In described examples, a method for encapsulating a semiconductor device includes the steps of immersing a layer of the semiconductor device in a liquid encapsulation material, irradiating portions of the liquid encapsulation material to polymerize the liquid encapsulation material, and moving the semiconductor device further from a surface of the liquid encapsulation material proximate to the layer. Immersing the semiconductor device is performed to cover a layer of the device in the liquid encapsulation material. Targeted locations of the liquid encapsulation material covering the layer are irradiated to form solid encapsulation material. The semiconductor device is moved from a surface of the liquid encapsulation material so that a new layer of the semiconductor device and/or of the solid encapsulation material can be covered by the liquid encapsulation material.

Abstract: A floating die package including a cavity formed through sublimation of a sacrificial die encapsulant and sublimation or separation of die attach materials after molding assembly. A pinhole vent in the molding structure is provided as a sublimation path to allow gases to escape, whereby the die or die stack is released from the substrate and suspended in the cavity by the bond wires only.

Abstract: An integrated circuit has a substrate which includes a semiconductor material, and an interconnect region disposed on the substrate. The integrated circuit includes a thermal routing trench in the substrate. The thermal routing trench includes a cohered nanoparticle film in which adjacent nanoparticles are cohered to each other. The thermal routing trench has a thermal conductivity higher than the semiconductor material contacting the thermal routing trench. The cohered nanoparticle film is formed by an additive process.