Abstract: Disclosed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a display region and a bonding region, wherein the display region includes M pixel rows arranged sequentially, at least one pixel row includes a scan signal line and a plurality of sub-pixels arranged sequentially along an extension direction of the scan signal line, at least one sub-pixel includes a pixel drive circuit connected with the scan signal line, the pixel drive circuit at least includes a storage capacitor and a first transistor as a first initialization transistor, and the scan signal line at least includes a second scan signal line that controls the first transistor to be turned on or off, and in the at least one pixel row, the second scan signal line is arranged on a side of the storage capacitor close to a display region boundary.

Abstract: A display substrate and a display apparatus are provided, wherein the display substrate includes: a base substrate and a drive structure layer provided on the base substrate, the drive structure layer includes pixel circuits arranged in an array, the pixel circuits arranged in an array includes a plurality of power supply lines; the pixel circuit further includes a capacitor, the capacitor includes a first electrode plate and a second electrode plate; the plurality of power supply lines include a plurality of first power connection lines disposed in a first conductive layer and a plurality of second power connection lines disposed in a second conductive layer, the second conductive layer is located on a side of the first conductive layer away from the base substrate, the first power connection line and the second power connection line extend in a first direction.

Abstract: An array substrate includes a plurality of pixel driving circuits, and each pixel driving circuit at least includes a compensation transistor. The array substrate includes a substrate, an active layer, a first gate layer and a second gate layer. The active layer includes an active layer pattern of the compensation transistor, which includes two channel areas and a conductive area therebetween. The first gate layer includes a first gate signal line, and an orthographic projection of the first gate signal line on the substrate is overlapped with orthographic projections of the two channel areas on the substrate. The second gate layer includes a voltage stabilization pattern, which is configured to receive a power supply voltage signal, and an orthographic projection of the voltage stabilization pattern on the substrate is overlapped with an orthographic projection of the conductive area on the substrate.

Abstract: A display substrate and a display device are provided. The display substrate includes a display area and a peripheral area. The display substrate includes: a plurality of subpixels located on the base substrate, at least part of the subpixels located in the display area includes a light-emitting element and a pixel circuit, the light-emitting element includes a light-emitting functional layer and a first electrode and a second electrode on both sides of the light-emitting functional layer in a direction perpendicular to the base substrate, the first electrode is located between the light-emitting functional layer and the base substrate. The pixel circuit includes a driving transistor and a light-emitting control transistor, and the first electrode of the light-emitting element is electrically connected to the light-emitting control transistor. The display substrate further includes a bonding area in the peripheral area and on a first side of the display area.

Abstract: A display substrate and a display device are provided. The display substrate includes first voltage lines in multiple columns, and multiple rows and multiple columns of pixel driving circuits arranged on a base substrate; the pixel driving circuit includes a driving transistor and a compensation transistor; an orthographic projection of the first voltage line on the base substrate at least partially overlaps an orthographic projection of a gate electrode of the driving transistor on the base substrate; the gate electrode of the driving transistor is coupled to a first electrode of the compensation transistor through a first conductive connection portion; a second electrode of the compensation transistor is coupled to a first electrode of the driving transistor; an orthographic projection of the first voltage line on the base substrate at least partially overlaps an orthographic projection of the first conductive connection portion on the base substrate.

Abstract: A display panel includes: a pixel driving circuit, a base substrate, a second conductive layer, a third conductive layer. The second conductive layer is disposed on a side of the base substrate, includes first signal lines, orthographic projections of the first signal lines extend in a first direction and spaced apart in a second direction, the first direction and the second direction intersect; the third conductive layer is disposed on a side of the second conductive layer away from the base substrate and includes second signal lines, orthographic projections of the second signal lines extend in the second direction and spaced apart in the first direction; the first signal lines and the second signal lines are configured to provide the same first signal to the pixel driving circuit, part of the first signal lines and the second signal lines are coupled through via holes.

Abstract: Described are a display panel and a display device. The display panel includes a base substrate provided with a first display region and a second display region; a plurality of first pixel circuit groups arrayed in the second display region, wherein each of the first pixel circuit groups includes one first pixel circuit and at most six second pixel circuits, and the first pixel circuit and the at most six second pixel circuits arranges along a row direction of the display panel; a plurality of first light-emitting elements disposed in the first display region; a plurality of second light-emitting elements disposed in the second display region; and a plurality of connection traces extending along the row direction.

Abstract: A display substrate is provided, and the display substrate includes a first display region, a second display region and a transitional display region; the first display region includes a plurality of first sub-pixels, each first sub-pixel (P1) includes a first light-emitting device; the second display region includes a plurality of first pixel driving circuit and a plurality of first transition pixel driving circuits, the plurality of first pixel driving circuits are electrically connected to first light-emitting devices respectively through a plurality of first wires; the transition display region is between the first display region and the second display region, including a first transition sub-region and a second transition sub-region, a plurality of first transition light-emitting devices in the first transition sub-region are electrically connected to the plurality of first pixel driving circuits respectively through a plurality of second wires, the second transition sub-region includes a plurality of se

Abstract: A display substrate and a display device are provided. The display substrate has a display side and includes a base substrate, a drive circuit layer, a first electrode layer, and a pixel definition layer. The drive circuit layer includes a plurality of first gaps to allow light from the display side to transmit therethrough. The first electrode layer includes a plurality of first electrode patterns and a plurality of light-blocking patterns. The pixel definition layer includes a plurality of sub-pixel openings exposing the plurality of first electrode patterns, respectively. In a direction perpendicular to the base substrate, at least a portion of the plurality of light-blocking patterns do not overlap with the plurality of sub-pixel openings, and correspond to and at least partially overlapped with at least a portion of the plurality of first gaps, respectively.

Abstract: A display substrate and a display device are provided. The display substrate includes a first power signal line and a pixel defining layer. The first power signal line includes first power signal sub-lines extending along a first direction and second power signal sub-lines extending along a second direction. The pixel defining layer includes a plurality of openings to define effective light-emitting regions of a plurality of sub-pixels, the plurality of sub-pixels include a sub-pixel pair including two sub-pixels arranged along the second direction, and the sub-pixel pair includes two effective light-emitting sub-regions with an interval therebetween. In a plan view, the first power signal sub-line passes through the interval between the two effective light-emitting sub-regions, at least one second power signal sub-line includes a fracture, and the two effective light-emitting sub-regions are located at the fracture.

Abstract: A display substrate and a manufacturing method thereof, and a display device are disclosed. The display substrate includes a base substrate, a plurality of sub-pixels, at least one group of contact pads, and a first insulation layer. The base substrate includes a display region and a bonding region located at one side of the display region. At least one group of contact pads includes a plurality of contact pads, at least one of the plurality of contact pads includes a first contact pad metal layer and a second contact pad metal layer, the second contact pad metal layer covers an edge of the first contact pad metal layer. The first insulation layer is located in gaps between the plurality of contact pads and covers edges of the plurality of contact pads, and is configured to expose surfaces of the plurality of contact pads facing away from the base substrate.

Abstract: A display panel includes: a base substrate, a third conductive layer, and a fourth conductive layer. The third conductive layer is located on one side of the base substrate and includes multiple first signal lines, where orthographic projections of the first signal lines on the base substrate are spaced apart in a first direction and extend along a second direction, and the first direction intersects with the second direction. The fourth conductive layer is located on the side of the third conductive layer away from the base substrate and includes multiple connection line segments, where orthographic projections of the connection line segments on the base substrate extend along the first direction, and a same connection line segment is respectively connected to a plurality of first signal lines through via holes.

Abstract: An array substrate is provided. The array substrate includes a node connecting line in a same layer as a respective voltage supply line, connected to a first capacitor electrode and a semiconductor material layer. An orthographic projection of a first anode on a base substrate at least partially overlaps with an orthographic projection of a node connecting line in a respective first subpixel. An orthographic projection of a second anode on the base substrate at least partially overlaps with an orthographic projection of the node connecting line in a respective second subpixel. An orthographic projection of a third anode on the base substrate at least partially overlaps with an orthographic projection of the node connecting line in a respective third subpixel. An orthographic projection of a fourth anode on the base substrate at least partially overlaps with an orthographic projection of the node connecting line in a respective fourth subpixel.

Abstract: Provided are a pixel circuit, a driving method and a display apparatus, including: a light emitting device; a driving transistor, configured to produce a current for driving the light emitting device to emit light according to a data voltage; a voltage control circuit, coupled to the driving transistor, wherein the voltage control circuit is configured to reset the driving transistor (MO) and input the data voltage in response to a loaded signal; and a light emitting control circuit, coupled to the driving transistor and the light emitting device, wherein the light emitting control circuit is configured to provide the current produced by the driving transistor to the light emitting device; wherein a frequency of resetting the driving transistor is not less than a frequency of inputting the data voltage.

Abstract: A display substrate and a display device. The display substrate includes: a first pixel structure including a first sub-pixel and a second sub-pixel; and a pixel defining layer including first openings and second openings, where the first sub-pixel includes the first opening, and the second sub-pixel includes the second opening. In the first pixel structure, a pattern of an orthographic projection of the first opening of the at least one first sub-pixel on the base substrate has a maximum size in the first direction, a pattern of an orthographic projection of the second opening of the at least one second sub-pixel on the base substrate has a maximum size in the second direction, an angle is formed between the second direction and the first direction, and a ratio of the maximum size of the first opening to the maximum size of the second opening ranges from 0.2 to 2.

Abstract: Exemplary processing methods may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature within the substrate. The methods may include forming plasma effluents of the silicon-containing precursor and the carbon-containing precursor. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber, forming plasma effluents of the hydrogen-containing precursor, and etching the silicon-and-carbon-containing material from a sidewall of the feature within the substrate.

Abstract: A display panel includes a substrate, a circuit structure layer, a first electrode layer and a pixel definition layer. The circuit structure layer includes a plurality of pixel driving circuits, and the first electrode layer includes a plurality of first electrodes; the pixel definition layer has a plurality of pixel openings therein. An orthographic projection of a first electrode of at least one first electrode on the substrate at least partially overlaps with both of an orthographic projection, on the substrate, of a gate of a data compensation transistor in a pixel driving circuit corresponding to the first electrode of the at least one first electrode and an orthographic projection, on the substrate, of a gate of a data compensation transistor in at least one pixel driving circuit adjacent to the pixel driving circuit corresponding to the first electrode of the at least one first electrode.

Abstract: An array substrate is provided. The array substrate includes K number of reset signal lines respectively configured to provide reset signals to reset transistors in K columns pixel driving circuits of the array substrate. The K number of reset signal lines includes a plurality of third reset signal lines in (2k?1)-th columns of K columns, K and k being positive integers, 1?k?(K/2), and a plurality of fourth reset signal lines in (2k)-th columns of the K columns. A respective third reset signal line and a respective fourth reset signal line have different line patterns.

Abstract: A display substrate and a display apparatus are provided. The display substrate includes a plurality of sub-pixels, and pixel driving circuits of sub-pixels form M pixel rows and N pixel columns; the display substrate includes a first initialization signal line and a second initialization signal line; the pixel driving circuits include a plurality of transistors and a light-emitting device, and the transistors include driving transistors; the light-emitting device includes a first electrode, wherein the first initialization signal line is respectively electrically connected with the mth row of sub-pixels, and is configured to transmit a first initialization signal to a control electrode of a driving transistor of the mth row of sub-pixels; the second initialization signal line is respectively electrically connected with the (m?1)th row of sub-pixels, and is configured to transmit a second initialization signal to a first electrode of a light-emitting device of the (m?1)th row of sub-pixels.