Abstract: A grid and skin assembly for use in a composite laminate structure is described. The assembly includes a metallic grid having a plurality of intersecting ribs oriented in at least two distinct rib directions offset at a grid angle relative to one another and defining respective intersection points; and a composite laminate skin having a plurality of ply layers comprising a plurality of tapes oriented in at least two distinct tape directions offset at a ply angle relative to one another. The grid angle is at least 25 degrees, the intersection points define glueless joints of the metallic grid, and the grid is a non-aluminum-based material. A grid and method of manufacturing the grid and skin assembly is also described. The method includes a water jet cutting procedure and glueless joint formation due to differing thermal expansion characteristics of the grid and skin.

Abstract: An embodiment of a method of integration of a non-volatile memory device into a logic MOS flow is described. Generally, the method includes: forming a pad dielectric layer of a MOS device above a first region of a substrate; forming a channel of the memory device from a thin film of semiconducting material overlying a surface above a second region of the substrate, the channel connecting a source and drain of the memory device; forming a patterned dielectric stack overlying the channel above the second region, the patterned dielectric stack comprising a tunnel layer, a charge-trapping layer, and a sacrificial top layer; simultaneously removing the sacrificial top layer from the second region of the substrate, and the pad dielectric layer from the first region of the substrate; and simultaneously forming a gate dielectric layer above the first region of the substrate and a blocking dielectric layer above the charge-trapping layer.

Abstract: Described herein are coil wound heat exchangers (CWHEs), and methods of cooling and/or liquefying streams of fluid using said CWHEs, in which one or more tube layers of the tube bundle are provided with a non-uniform tube winding angle and tube pitch in order to facilitate the equalization of radial pressure imbalances on the shell side of the CWHE, thereby reducing radial maldistribution of fluid on the shell side and improving the heat transfer efficiency of the CWHE.

Abstract: The invention relates to a low molecular weight sulfate chondroitin and a preparation method thereof. A low molecular weight chondroitin sulfate with the average molecular weight of less than 1000 Dalton can be obtained by a production process of chondroitin sulfate lyase degradation, deproteinization, filtration and sterilization and drying using macromolecular sulfate chondroitin as a raw material. The low molecular weight Chondroitin sulfate has a narrow molecular weight distribution range, the ratio of chondroitin sulfate disaccharide is 43˜60% and the ratio of chondroitin sulfate tetrasaccharide is 30˜45%, the sum of chondroitin sulfate disaccharide and chondroitin sulfate tetrasaccharide is more than 87%, the total oligosaccharide content of low molecular weight chondroitin sulfate is more than 97% and the protein content is less than 0.

Abstract: An embodiment of a method of integration of a non-volatile memory device into a logic MOS flow is described. Generally, the method includes: forming a pad dielectric layer of a MOS device above a first region of a substrate; forming a channel of the memory device from a thin film of semiconducting material overlying a surface above a second region of the substrate, the channel connecting a source and drain of the memory device; forming a patterned dielectric stack overlying the channel above the second region, the patterned dielectric stack comprising a tunnel layer, a charge-trapping layer, and a sacrificial top layer; simultaneously removing the sacrificial top layer from the second region of the substrate, and the pad dielectric layer from the first region of the substrate; and simultaneously forming a gate dielectric layer above the first region of the substrate and a blocking dielectric layer above the charge-trapping layer.