Patents by Inventor Bo Rong

Bo Rong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220075600
    Abstract: A memory device and an operation method thereof are provided. The memory device includes: a memory array including a plurality of memory cells for storing a plurality of weights; a multiplication circuit for performing bitwise multiplication on a plurality of input data and the weights to generate a plurality of multiplication results, wherein in performing bitwise multiplication, the memory cells generate a plurality of memory cell currents; a digital accumulating circuit for performing a digital accumulating on the multiplication results; an analog accumulating circuit for performing an analog accumulating on the memory cell currents to generate a first MAC operation result; and a decision unit for deciding whether to perform the analog accumulating; the digital accumulating or a hybrid accumulating, wherein in performing the hybrid accumulating, whether the digital accumulating circuit is triggered is based on the first MAC operation result.
    Type: Application
    Filed: July 14, 2021
    Publication date: March 10, 2022
    Inventors: Han-Wen HU, Yung-Chun LEE, Bo-Rong LIN, Huai-Mu WANG
  • Publication number: 20220075599
    Abstract: A memory device and an operation method thereof are provided. The memory device includes: a memory array including a plurality of memory cells for storing a plurality of weights; a multiplication circuit coupled to the memory array, for performing bitwise multiplication on a plurality of input data and the weights to generate a plurality of multiplication results; a counting unit coupled to the multiplication circuit, for performing bitwise counting on the multiplication results to generate a MAC (multiplication and accumulation) operation result.
    Type: Application
    Filed: July 1, 2021
    Publication date: March 10, 2022
    Inventors: Han-Wen HU, Yung-Chun LEE, Bo-Rong LIN, Huai-Mu WANG
  • Patent number: 11264492
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: March 1, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20220014281
    Abstract: An echo estimation system includes a transceiver circuitry and a processor circuitry. The processor circuitry is coupled to the transceiver circuitry. The processor circuitry is configured to calculate linear echo power and non-linear echo power based on a signal under test in the transceiver circuitry. The linear echo power and the non-linear echo power are utilized to determine a quality of the transceiver circuitry or utilized to determine component parameters of the transceiver circuitry.
    Type: Application
    Filed: May 28, 2021
    Publication date: January 13, 2022
    Inventors: Bo-Rong HUANG, Cheng-Hsien LI, Tsung-En WU, Yu-Tung LIAO
  • Publication number: 20210288149
    Abstract: A method for forming a high-electron mobility transistor is disclosed. A substrate is provided. A buffer layer is formed over the substrate. A GaN channel layer is formed over the buffer layer. An AlGaN layer is formed over the GaN channel layer. A GaN source layer and a GaN drain layer are formed on the AlGaN layer within a source region and a drain region, respectively. A gate recess is formed in the AlGaN layer between the source region and the drain region. A p-GaN gate layer is then formed in and on the gate recess.
    Type: Application
    Filed: June 3, 2021
    Publication date: September 16, 2021
    Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20210288150
    Abstract: A high-electron mobility transistor includes a substrate, a GaN channel layer over the substrate, an AlGaN layer over the GaN channel layer, a gate recess in the AlGaN layer, a source region and a drain region on opposite sides of the gate recess, a GaN source layer and a GaN drain layer grown on the AlGaN layer within the source region and the drain region, respectively, a p-GaN gate layer in and on the gate recess; and a re-grown AlGaN film on the AlGaN layer, on the GaN source layer and the GaN drain layer, and on interior surface of the gate recess.
    Type: Application
    Filed: June 3, 2021
    Publication date: September 16, 2021
    Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20210247430
    Abstract: A capacitance-type sensing system for indirect contact includes a capacitance-type sensor and a grounding conductor. The capacitance-type sensor includes a sensing electrode and a driving circuit electrically connected to the sensing electrode. The driving circuit has a grounding terminal. The grounding conductor is electrically connected to the grounding terminal and configured to contact a grounding surface. A contact area of the grounding conductor is greater than or equal to 3000 mm2.
    Type: Application
    Filed: May 21, 2020
    Publication date: August 12, 2021
    Inventors: Hua-Yueh HSIEH, Hsuan-Yun LEE, Ching-Lin LI, Yen-Heng HUANG, Teng-Chi CHANG, Bo-Rong LIN
  • Patent number: 11063124
    Abstract: A high-electron mobility transistor includes a substrate; a buffer layer over the substrate; a GaN channel layer over the buffer layer; a AlGaN layer over the GaN channel layer; a gate recess in the AlGaN layer; a source region and a drain region on opposite sides of the gate recess; a GaN source layer and a GaN drain layer grown on the AlGaN layer within the source region and the drain region, respectively; and a p-GaN gate layer in and on the gate recess.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: July 13, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20210175343
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.
    Type: Application
    Filed: December 31, 2019
    Publication date: June 10, 2021
    Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20210143257
    Abstract: A high-electron mobility transistor includes a substrate; a buffer layer over the substrate; a GaN channel layer over the buffer layer; a AlGaN layer over the GaN channel layer; a gate recess in the AlGaN layer; a source region and a drain region on opposite sides of the gate recess; a GaN source layer and a GaN drain layer grown on the AlGaN layer within the source region and the drain region, respectively; and a p-GaN gate layer in and on the gate recess.
    Type: Application
    Filed: November 22, 2019
    Publication date: May 13, 2021
    Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Patent number: 11004952
    Abstract: A high-electron mobility transistor includes a substrate; a buffer layer on the substrate; a AlGaN layer on the buffer layer; a passivation layer on the AlGaN layer; a source region and a drain region on the AlGaN layer; a source layer and a drain layer on the AlGaN layer within the source region and the drain region, respectively; a gate on the AlGaN layer between the source region and a drain region; and a field plate on the gate and the passivation layer. The field plate includes an extension portion that laterally extends to an area between the gate and the drain region. The extension portion has a wave-shaped bottom surface.
    Type: Grant
    Filed: December 1, 2019
    Date of Patent: May 11, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Tung Yeh, Shin-Chuan Huang, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20210134978
    Abstract: A high-electron mobility transistor includes a substrate; a buffer layer on the substrate; a AlGaN layer on the buffer layer; a passivation layer on the AlGaN layer; a source region and a drain region on the AlGaN layer; a source layer and a drain layer on the AlGaN layer within the source region and the drain region, respectively; a gate on the AlGaN layer between the source region and a drain region; and a field plate on the gate and the passivation layer. The field plate includes an extension portion that laterally extends to an area between the gate and the drain region. The extension portion has a wave-shaped bottom surface.
    Type: Application
    Filed: December 1, 2019
    Publication date: May 6, 2021
    Inventors: Chih-Tung Yeh, Shin-Chuan Huang, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20210066484
    Abstract: An enhancement mode high electron mobility transistor (HEMT) includes a group III-V semiconductor body, a group III-V barrier layer and a gate structure. The group III-V barrier layer is disposed on the group III-V semiconductor body, and the gate structure is a stacked structure disposed on the group III-V barrier layer. The gate structure includes a gate dielectric and a group III-V gate layer disposed on the gate dielectric, and the thickness of the gate dielectric is between 15 nm to 25 nm.
    Type: Application
    Filed: October 8, 2019
    Publication date: March 4, 2021
    Inventors: Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20210013334
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.
    Type: Application
    Filed: August 7, 2019
    Publication date: January 14, 2021
    Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20210009597
    Abstract: Disclosed are compounds of formula (I) below and tautomers, stereoisomers, isotopologues, or pharmaceutically acceptable salts thereof: in which each of variables R1, ring A, L, W, V, and G is defined herein. Also disclosed are a method for treating disease or disorder mediated by Tyro3, Axl, and/or Mer kinase with a compound of formula (I) or a tautomer, stereoisomer, isotopologue, or salt thereof and a pharmaceutical composition containing same.
    Type: Application
    Filed: December 26, 2018
    Publication date: January 14, 2021
    Applicant: Development Center for Biotechnology
    Inventors: Shih-Chieh YEN, Chu-Bin LIAO, Hui-Chen WANG, Po-Ting CHEN, Yu-Chih PAN, Tsung-Hui LI, Bo-Rong CHEN, Shian-Yi CHIOU
  • Patent number: 10860149
    Abstract: A touch panel with electromagnetic induction function comprising a light-emitting diode backlight layer, an electromagnetic antenna, a display panel layer, a touch panel layer and a protective layer. The light emitting diode backlight layer has a plurality of light emitting diode units. The electromagnetic antenna is disposed on the backlight layer for emitting an alternating electromagnetic field and receiving a resonance signal. The display panel layer is disposed on the backlight layer. The touch panel layer is disposed on the display panel layer for capacitive touch. The protective layer is disposed on the touch panel layer to protect the touch panel layer. An electromagnetic pen for electromagnetic touch is configured to receive the alternating electromagnetic field and then emit the resonance signal.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: December 8, 2020
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Bo-Rong Lin, Hsuan-Yun Lee, Ching-Lin Li
  • Patent number: 10841877
    Abstract: A management nodal point of a wireless sensor network (WSN) receives a plurality of tasks and stores the tasks in a buffer. Each of the tasks would be assigned to and executed by a corresponding one of execution nodal points of the WSN. The management nodal point records a status of each execution nodal point as an executable status or a non-executable status. Before the management nodal point assigns a first task, the management nodal point obtains the status of a first execution nodal point corresponding to the first task. If the first execution nodal point is at the executable status, the management nodal point assigns the first task to the first execution nodal point according to a predetermined rule.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: November 17, 2020
    Assignee: PEGATRON CORPORATION
    Inventors: Bo-Rong Chen, Tzu-Min Yang, Wen-Pin Li
  • Publication number: 20200341567
    Abstract: A touch panel with electromagnetic induction function comprising a light-emitting diode backlight layer, an electromagnetic antenna, a display panel layer, a touch panel layer and a protective layer. The light emitting diode backlight layer has a plurality of light emitting diode units. The electromagnetic antenna is disposed on the backlight layer for emitting an alternating electromagnetic field and receiving a resonance signal. The display panel layer is disposed on the backlight layer. The touch panel layer is disposed on the display panel layer for capacitive touch. The protective layer is disposed on the touch panel layer to protect the touch panel layer. An electromagnetic pen for electromagnetic touch is configured to receive the alternating electromagnetic field and then emit the resonance signal.
    Type: Application
    Filed: May 30, 2019
    Publication date: October 29, 2020
    Inventors: BO-RONG LIN, HSUAN-YUN LEE, CHING-LIN LI
  • Patent number: 10768726
    Abstract: A touch device in spherical or other curved form includes a hollow spherical casing and at least one touch sensing layer. The spherical casing includes an inner surface and an outer surface, the touch sensing layer is attached to the inner surface of the spherical casing, the touch sensing layer includes a core portion and a touch portion. The touch portion extends and diverges outwardly from the core portion. The touch portion comprises a plurality of sub-touch portions, an area of each sub-touch portion is greater than an area of the core portion. The disclosure also includes a curved non-spherical touch device.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: September 8, 2020
    Assignees: Interface Technology (ChengDu) Co., Ltd., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Bo-Rong Lin, Hua-Yueh Hsieh, Hsuan-Yun Lee, Ching-Lin Li
  • Patent number: D930621
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: September 14, 2021
    Assignee: Shenzhen NearbyExpress Technology Development Company Limited
    Inventors: Bo Rong, Yu-Zhao Liu