Patents by Inventor Bo Zheng

Bo Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150093891
    Abstract: Methods for depositing a metal layer in a feature definition of a semiconductor device are provided. In one implementation, a method for depositing a metal layer for forming a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a metal layer on a substrate and annealing the metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the metal layer on the substrate, exposing the portion of the metal layer to either a plasma treatment process or hydrogen annealing process and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the metal layer to either a plasma treatment process or hydrogen annealing process until a predetermined thickness of the metal layer is achieved.
    Type: Application
    Filed: September 10, 2014
    Publication date: April 2, 2015
    Inventors: Bhushan N. ZOPE, Avgerinos V. GELATOS, Bo ZHENG, Yu LEI, Xinyu FU, Srinivas GANDIKOTA, Sang Ho YU, Mathew ABRAHAM
  • Publication number: 20150085586
    Abstract: A memory device having an array of memory cells connected to a core voltage level, and access circuitry used to perform a write operation in order to write data into a plurality of addressed memory cells. At least one bit line associated with at least each column in the array containing an addressed memory cell is precharged to the peripheral voltage level prior to the write operation being performed. Word line driver circuitry is then configured to assert a word line signal at the core voltage level on the word line associated with the row of the array containing the addressed memory cells. Write multiplexing driver circuitry asserts a mux control signal to write multiplexing circuitry which then couples the bit line of each addressed memory cell to the write driver circuitry in dependence on the mux control signal identifying which column contains the addressed memory cells.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 26, 2015
    Applicant: ARM LIMITED
    Inventors: Bo ZHENG, Jungtae KWON, Gus YEUNG, Yew Keong CHONG
  • Patent number: 8971133
    Abstract: A memory device having an array of memory cells connected to a core voltage level, and access circuitry used to perform a write operation in order to write data into a plurality of addressed memory cells. At least one bit line associated with at least each column in the array containing an addressed memory cell is precharged to the peripheral voltage level prior to the write operation being performed. Word line driver circuitry is then configured to assert a word line signal at the core voltage level on the word line associated with the row of the array containing the addressed memory cells. Write multiplexing driver circuitry asserts a mux control signal to write multiplexing circuitry which then couples the bit line of each addressed memory cell to the write driver circuitry in dependence on the mux control signal identifying which column contains the addressed memory cells.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: March 3, 2015
    Assignee: ARM Limited
    Inventors: Bo Zheng, Jungtae Kwon, Gus Yeung, Yew Keong Chong
  • Patent number: 8951913
    Abstract: Native oxides and associated residue are removed from surfaces of a substrate by sequentially performing two plasma cleaning processes on the substrate in a single processing chamber. The first plasma cleaning process removes native oxide formed on a substrate surface by generating a cleaning plasma from a mixture of ammonia (NH3) and nitrogen trifluoride (NF3) gases, condensing products of the cleaning plasma on the native oxide to form a thin film that contains ammonium hexafluorosilicate ((NH4)2SiF6), and subliming the thin film off of the substrate surface. The second plasma cleaning process removes remaining residues of the thin film by generating a second cleaning plasma from nitrogen trifluoride gas. Products of the second cleaning plasma react with a few angstroms of the bare silicon present on the surface, forming silicon tetrafluoride (SiF4) and lifting off residues of the thin film.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: February 10, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Bo Zheng, Arvind Sundarrajan, Xinyu Fu
  • Publication number: 20150038364
    Abstract: A microarray substrate including a piece of fluoropolymer whose surface is modified with polydopamine, in which the polydopamine forms an array of microspots on the surface of the fluoropolymer piece, and allows immobilization of molecules or cells. A microarray including the substrate, a microfluidic system designed for dispensing reagents onto selected locations on the surface of substrates, and a method for preparing the substrate and the microarray, in which a dopamine solution is dispensed onto the fluoropolymer piece using the microfluidic system, and forms an array of polydopamine microspots serving as the reaction sites for microarray analysis.
    Type: Application
    Filed: July 29, 2014
    Publication date: February 5, 2015
    Inventors: Bo Zheng, Hui Feng
  • Publication number: 20150030771
    Abstract: Electronic device processing systems including cobalt deposition are described. One system includes a mainframe having a transfer chamber and at least two facets, and one or more process chambers adapted to carry out a metal reduction or metal oxide reduction process and possibly an annealing processes on substrates, and one or more deposition process chambers adapted to carry out a cobalt deposition process. Other systems includes a transfer chamber, one or more load lock process chambers coupled to the transfer chamber that are adapted to carry out a metal reduction or metal oxide reduction process. Additional methods and systems for cobalt deposition processing of substrates are described, as are numerous other aspects.
    Type: Application
    Filed: July 22, 2014
    Publication date: January 29, 2015
    Inventors: Avgerinos V. Gelatos, Bhushan Zope, Bo Zheng
  • Patent number: 8912096
    Abstract: Methods for precleaning native oxides or other contaminants from a surface of a substrate prior to forming a metal silicide layer on the substrate. In one embodiment, a method for removing native oxides from a substrate includes transferring a substrate having an oxide layer disposed thereon into a processing chamber, performing a pretreatment process on the substrate by supplying a pretreatment gas mixture into the processing chamber, performing an oxide removal process on the substrate by supplying a cleaning gas mixture into the processing chamber, wherein the cleaning gas mixture includes at least an ammonium gas and a nitrogen trifluoride, and performing a post treatment process on the cleaned substrate by supplying a post treatment gas mixture into the processing chamber.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: December 16, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Bo Zheng, Arvind Sundarrajan, Manish Hamkar
  • Publication number: 20140348432
    Abstract: There is provided an image processing apparatus which calculates a feature value of an image. The apparatus comprises first obtaining means for obtaining an image; calculation means for calculating a set of numerical values formed from degrees of contributions of each of a plurality of order, wherein the degree of contributions of each order indicate contributions of monomials of the order for intensity values which are calculated using an approximation polynomial, and wherein the approximation polynomial provides a relationship between a pixel position of the image and an intensity value at the pixel position and is formed from a plurality of the monomials each having an order out of the plurality of orders; and first output means for outputting the set of the calculated numerical values as the feature value of the image.
    Type: Application
    Filed: September 26, 2012
    Publication date: November 27, 2014
    Inventors: Ryo Ishikawa, Kiyohide Satoh, Katsushi Ikeuchi, Bo Zheng, Yonggi Sun
  • Publication number: 20140326276
    Abstract: Implementations described herein generally relate to methods and apparatus for in-situ removal of unwanted deposition buildup from one or more interior surfaces of a semiconductor substrate processing chamber. In one implementation, a method for removing cobalt or cobalt containing deposits from one or more interior surfaces of a substrate processing chamber after processing a substrate disposed in the substrate processing chamber is provided. The method comprises forming a reactive species from the fluorine containing cleaning gas mixture, permitting the reactive species to react with the cobalt and/or the cobalt containing deposits to form cobalt fluoride in a gaseous state and purging the cobalt fluoride in gaseous state out of the substrate processing chamber.
    Type: Application
    Filed: April 17, 2014
    Publication date: November 6, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Kai WU, Bo ZHENG, Sang Ho YU, Avgerinos V. GELATOS, Bhushan N. ZOPE, Jeffrey ANTHIS, Benjamin SCHMIEGE
  • Publication number: 20140295665
    Abstract: Native oxides and associated residue are removed from surfaces of a substrate by sequentially performing two plasma cleaning processes on the substrate in a single processing chamber. The first plasma cleaning process removes native oxide formed on a substrate surface by generating a cleaning plasma from a mixture of ammonia (NH3) and nitrogen trifluoride (NF3) gases, condensing products of the cleaning plasma on the native oxide to form a thin film that contains ammonium hexafluorosilicate ((NH4)2SiF6), and subliming the thin film off of the substrate surface. The second plasma cleaning process removes remaining residues of the thin film by generating a second cleaning plasma from nitrogen trifluoride gas. Products of the second cleaning plasma react with a few angstroms of the bare silicon present on the surface, forming silicon tetrafluoride (SiF4) and lifting off residues of the thin film.
    Type: Application
    Filed: June 12, 2014
    Publication date: October 2, 2014
    Inventors: Bo ZHENG, Arvind SUNDARRAJAN, Xinyu FU
  • Publication number: 20140269091
    Abstract: A memory device includes an array of memory cells arranged as a plurality of rows and columns, each row being coupled to an associated read word line, and each column forming at least one column group, where the memory cells of each column group are coupled to an associated read bit line. Each column has an active mode of operation where a read operation may be performed on an activated memory cell within that column group, and a non-active mode of operation where the read operation is not performable. Precharge circuitry is used, for each column group, to precharge the associated read bit line to a first voltage level prior to the read operation. Each memory cell includes coupling circuitry connected between the associated read bit line and a reference line associated with the column group containing that memory cell.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventors: Bo ZHENG, Gus Yeung, Fakhruddin ali Bohra
  • Publication number: 20140273515
    Abstract: Embodiments of an integrated platform for fabricating n-type metal oxide semiconductor (NMOS) devices are provided herein. In some embodiments, an integrated platform for fabricating n-type metal oxide semiconductor (NMOS) devices may include a first deposition chamber configured to deposit a first layer atop the substrate, the first layer comprising titanium oxide (TiO2) or selenium (Se); a second deposition chamber configured to deposit a second layer atop the first layer, the second layer comprising titanium; a third deposition chamber configured to deposit a third layer atop the second layer, the third layer comprising one of titanium nitride (TiN) or tungsten nitride (WN).
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: Applied Materials, Inc.
    Inventors: AVGERINOS V. GELATOS, SRINIVAS GANDIKOTA, SESHADRI GANGULI, XINYU FU, BO ZHENG, YU LEI
  • Patent number: 8832116
    Abstract: Business information about business entities are received from a plurality of aggregate information sources such as business directories. Mobile application logs about user activities are received from a plurality of mobile devices. Business entities related to the user activities are identified based on the mobile application logs. Scored attributes about the related business entities are acquired by applying data analysis rules to the mobile application logs. Accuracy scores are determined for attribute values in the business information based on the acquired scored attributes. Updated business information for the business entities is generated based on the accuracy scores and outputted to users upon request.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: September 9, 2014
    Assignee: Google Inc.
    Inventors: Fang Chu, Bo Zheng, Gang Feng, Dylan Myers
  • Publication number: 20140250278
    Abstract: An integrated level shifting latch circuit receives an input signal in a first voltage domain and generates an output signal in a second voltage domain. Data retention circuitry operates in a transparent phase where a data value is subjected to a level shifting function and is written into the data retention circuitry dependent on the input signal. Control circuitry controls the data retention circuitry to operate in the transparent phase during a first phase of the clock signal and to operate in the latching phase during a second phase of the clock signal. Writing circuitry writes the data value into the data retention circuitry. Contention mitigation circuitry, during the transparent phase, reduces a voltage drop across at least one component within the data retention circuitry.
    Type: Application
    Filed: March 1, 2013
    Publication date: September 4, 2014
    Applicant: ARM LIMITED
    Inventors: Gus YEUNG, Bo ZHENG, Frank GUO
  • Patent number: 8822148
    Abstract: The present invention provides microfabricated substrates and methods of conducting reactions within these substrates. The reactions occur in plugs transported in the flow of a carrier-fluid.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: September 2, 2014
    Assignee: The University of Chicago
    Inventors: Rustem F. Ismagliov, Joshua David Tice, Cory John Gerdts, Bo Zheng
  • Publication number: 20140202546
    Abstract: The present invention provides microfluidic technology enabling rapid and economical manipulation of reactions on the femtoliter to microliter scale.
    Type: Application
    Filed: February 19, 2014
    Publication date: July 24, 2014
    Applicant: The University of Chicago
    Inventors: Rustem F. Ismagilov, Bo Zheng, Cory John Gerdts
  • Patent number: 8772162
    Abstract: Native oxides and associated residue are removed from surfaces of a substrate by sequentially performing two plasma cleaning processes on the substrate in a single processing chamber. The first plasma cleaning process removes native oxide formed on a substrate surface by generating a cleaning plasma from a mixture of ammonia (NH3) and nitrogen trifluoride (NF3) gases, condensing products of the cleaning plasma on the native oxide to form a thin film that contains ammonium hexafluorosilicate ((NH4)2SiF6), and subliming the thin film off of the substrate surface. The second plasma cleaning process removes remaining residues of the thin film by generating a second cleaning plasma from nitrogen trifluoride gas. Products of the second cleaning plasma react with a few angstroms of the bare silicon present on the surface, forming silicon tetrafluoride (SiF4) and lifting off residues of the thin film.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: July 8, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Bo Zheng, Arvind Sundarrajan, Xinyu Fu
  • Patent number: 8747686
    Abstract: Methods and substrate processing systems for analyzing an end point of a process are provided. By-products of the process are detected and monitored to determine the completion of various types of reaction processes within a substrate processing chamber. The methods provide real time process monitoring, thereby reducing the need to rigidly constrain other substrate processing parameters, increasing chamber cleaning efficiency, and/or increasing substrate processing throughput.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: June 10, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Bo Zheng, Mei Chang, Arvind Sundarrajan
  • Patent number: 8747556
    Abstract: Embodiments of the invention provide apparatuses and methods for atomic layer deposition (ALD), such as plasma-enhanced ALD (PE-ALD). In some embodiments, a PE-ALD chamber is provided which includes a chamber lid assembly coupled with a chamber body having a substrate support therein. In one embodiment, the chamber lid assembly has an inlet manifold assembly containing an annular channel encompassing a centralized channel, wherein the centralized channel extends through the inlet manifold assembly, and the inlet manifold assembly further contains injection holes extending from the annular channel, through a sidewall of the centralized channel, and to the centralized channel.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: June 10, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Hyman W. H. Lam, Bo Zheng, Hua Ai, Michael Jackson, Xiaoxiong Yuan, Hougong Wang, Salvador P. Umotoy, Sang Ho Yu
  • Publication number: 20140087091
    Abstract: Embodiments of the invention provide apparatuses and methods for atomic layer deposition (ALD), such as plasma-enhanced ALD (PE-ALD). In some embodiments, a PE-ALD chamber is provided which includes a chamber lid assembly coupled with a chamber body having a substrate support therein. In one embodiment, the chamber lid assembly has an inlet manifold assembly containing an annular channel encompassing a centralized channel, wherein the centralized channel extends through the inlet manifold assembly, and the inlet manifold assembly further contains injection holes extending from the annular channel, through a sidewall of the centralized channel, and to the centralized channel.
    Type: Application
    Filed: September 24, 2012
    Publication date: March 27, 2014
    Applicant: Applied Materials, Inc.
    Inventors: Hyman W.H. Lam, Bo Zheng, Hua Ai, Michael Jackson, Xiaoxiong Yuan, Hougong Wang, Salvador P. Umotoy, San H. Yu