Patents by Inventor Bret K. Street

Bret K. Street has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170179045
    Abstract: Wafer-level methods of processing semiconductor devices may involve forming grooves partially through a molding material, the molding material located in streets and at least surrounding stacks of semiconductor dice located on a wafer. Wafer-level methods of preparing semiconductor devices may involve attaching a wafer to a carrier substrate and forming stacks of laterally spaced semiconductor dice on die locations of the wafer. Molding material may be disposed over the die stacks on a surface of the wafer to at least surround the stacks of semiconductor dice with the molding material. Grooves may be formed in the molding material by partially cutting through the molding material between at least some of the stacks of semiconductor dice along streets between the die stacks. The resulting wafer-level assembly may then, when exposed to elevated temperatures during, for example, debonding the wafer from a carrier, exhibit reduced propensity for warping.
    Type: Application
    Filed: March 1, 2017
    Publication date: June 22, 2017
    Inventors: Aibin Yu, Wei Zhou, Zhaohui Ma, Bret K. Street
  • Patent number: 9589933
    Abstract: Wafer-level methods of processing semiconductor devices may involve forming grooves partially through a molding material, the molding material located in streets and at least surrounding stacks of semiconductor dice located on a wafer. Wafer-level methods of preparing semiconductor devices may involve attaching a wafer to a carrier substrate and forming stacks of laterally spaced semiconductor dice on die locations of the wafer. Molding material may be disposed over the die stacks on a surface of the wafer to at least surround the stacks of semiconductor dice with the molding material. Grooves may be formed in the molding material by partially cutting through the molding material between at least some of the stacks of semiconductor dice along streets between the die stacks. The resulting wafer-level assembly may then, when exposed to elevated temperatures during, for example, debonding the wafer from a carrier, exhibit reduced propensity for warping.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: March 7, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Aibin Yu, Wei Zhou, Zhaohui Ma, Bret K. Street
  • Publication number: 20160358898
    Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.
    Type: Application
    Filed: June 4, 2015
    Publication date: December 8, 2016
    Inventors: Wei Zhou, Aibin Yu, Zhaohui Ma, Sony Varghese, Jonathan S. Hacker, Bret K. Street, Shijian Luo
  • Publication number: 20150371969
    Abstract: Wafer-level methods of processing semiconductor devices may involve forming grooves partially through a molding material, the molding material located in streets and at least surrounding stacks of semiconductor dice located on a wafer. Wafer-level methods of preparing semiconductor devices may involve attaching a wafer to a carrier substrate and forming stacks of laterally spaced semiconductor dice on die locations of the wafer. Molding material may be disposed over the die stacks on a surface of the wafer to at least surround the stacks of semiconductor dice with the molding material. Grooves may be formed in the molding material by partially cutting through the molding material between at least some of the stacks of semiconductor dice along streets between the die stacks. The resulting wafer-level assembly may then, when exposed to elevated temperatures during, for example, debonding the wafer from a carrier, exhibit reduced propensity for warping.
    Type: Application
    Filed: June 23, 2014
    Publication date: December 24, 2015
    Inventors: Aibin Yu, Wei Zhou, Zhaohui Ma, Bret K. Street
  • Patent number: 7858420
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes forming a plurality of stand-offs on corresponding imaging dies before and/or after the imaging dies are singulated and electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member. The individual stand-offs include a portion between adjacent external contacts.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: December 28, 2010
    Assignee: Micron Technology, Inc.
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
  • Patent number: 7786574
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes providing a plurality of imaging dies on a microfeature workpiece. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes attaching a plurality of covers to corresponding imaging dies, cutting the microfeature workpiece to singulate the imaging dies, and coupling the singulated dies to a support member. The covers can be attached to the imaging dies before or after the workpiece is cut.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: August 31, 2010
    Assignee: Aptina Imaging Corp.
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
  • Patent number: 7691660
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes providing a plurality of imaging dies on a microfeature workpiece. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes attaching a plurality of covers to corresponding imaging dies, cutting the microfeature workpiece to singulate the imaging dies, and coupling the singulated dies to a support member. The covers can be attached to the imaging dies before or after the workpiece is cut.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: April 6, 2010
    Assignee: Aptina Imaging Corporation
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
  • Patent number: 7655507
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes forming a plurality of stand-offs on corresponding imaging dies before and/or after the imaging dies are singulated and electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member. The individual stand-offs include a portion between adjacent external contacts.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: February 2, 2010
    Assignee: Micron Technology Inc.
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
  • Patent number: 7557452
    Abstract: A conductive structure configured to connect a contact pad of a semiconductor device with a corresponding contact pad of a substrate. The conductive structure includes two interconnectable members, one securable to each of the corresponding contact pads. Each member includes a dielectric jacket having an aperture that laterally confines conductive material of a conductive center thereof over the contact pad to which the member is secured. The conductive center of a female member of the conductive structure only partially fills the aperture of the jacket thereof so as to form a receptacle for an end of the male member of the conductive structure. One or both of the male and female members may also be configured to limit the insertion of the male member into the receptacle of the female member. The members of the conductive structure may be preformed structures which are attached to a surface of a semiconductor device or other substrate.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: July 7, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Vernon M. Williams, Ford B. Grigg, Bret K. Street
  • Publication number: 20090148969
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes providing a plurality of imaging dies on a microfeature workpiece. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes attaching a plurality of covers to corresponding imaging dies, cutting the microfeature workpiece to singulate the imaging dies, and coupling the singulated dies to a support member. The covers can be attached to the imaging dies before or after the workpiece is cut.
    Type: Application
    Filed: February 12, 2009
    Publication date: June 11, 2009
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
  • Patent number: 7511374
    Abstract: Microelectronic imaging units having covered image sensors are disclosed herein. In one embodiment, the microelectronic imaging units have an image sensor, an integrated circuit, a cover located over the image sensor, at least one dam, and a fill material between adjacent imaging units. The covers may be located on discrete adhesive portions inboard of external contacts that are operably coupled to the integrated circuits.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: March 31, 2009
    Assignee: Aptina Imaging Corporation
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
  • Patent number: 7498606
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method for manufacturing a plurality of microelectronic imaging units includes placing a plurality of singulated imaging dies on a support member. The individual imaging dies include a first height, an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member and forming a base on the support member between adjacent imaging dies. The base has a second height less than or approximately equal to the first height of the dies. The method further includes attaching a plurality of covers to the base so that the covers are positioned over corresponding image sensors.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: March 3, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Bret K. Street, Frank L. Hall, James M. Derderian
  • Patent number: 7491570
    Abstract: A die package having an adhesive flow restriction area. In a first embodiment, the adhesive flow restriction area is formed as a trench in a transparent element. A second embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches that extend from one edge of the transparent element to the other edge. A third embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches. A fourth embodiment has a transparent element with an adhesive flow restriction area formed as a protuberance. A fifth embodiment comprises a trench in the die. A sixth embodiment has a die with a plurality of trenches in the die as an adhesive flow restriction area. A seventh embodiment has a die with a protuberance.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: February 17, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Bret K. Street, James M. Derderian, Jeremy E. Minnich
  • Patent number: 7476955
    Abstract: A die package having an adhesive flow restriction area. In a first embodiment, the adhesive flow restriction area is formed as a trench in a transparent element. A second embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches that extend from one edge of the transparent element to the other edge. A third embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches. A fourth embodiment has a transparent element with an adhesive flow restriction area formed as a protuberance. A fifth embodiment comprises a trench in the die. A sixth embodiment has a die with a plurality of trenches in the die as an adhesive flow restriction area. A seventh embodiment has a die with a protuberance.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: January 13, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Bret K. Street, James M. Derderian, Jeremy E. Minnich
  • Publication number: 20080268563
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes forming a plurality of stand-offs on corresponding imaging dies before and/or after the imaging dies are singulated and electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member. The individual stand-offs include a portion between adjacent external contacts.
    Type: Application
    Filed: July 2, 2008
    Publication date: October 30, 2008
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
  • Patent number: 7439598
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes forming a plurality of stand-offs on corresponding imaging dies before and/or after the imaging dies are singulated and electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member. The individual stand-offs include a portion between adjacent external contacts.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: October 21, 2008
    Assignee: Micron Technology, Inc.
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
  • Publication number: 20080241985
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes forming a plurality of stand-offs on corresponding imaging dies before and/or after the imaging dies are singulated and electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member. The individual stand-offs include a portion between adjacent external contacts.
    Type: Application
    Filed: April 9, 2008
    Publication date: October 2, 2008
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller
  • Patent number: 7417294
    Abstract: Microelectronic imaging units and methods for manufacturing microelectronic imaging units are disclosed herein. In one embodiment, a method includes placing a plurality of singulated imaging dies on a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes disposing a plurality of discrete stand-offs on the support member. The discrete stand-offs are arranged in arrays relative to corresponding imaging dies. The method further includes electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member, and attaching a plurality of covers to corresponding stand-off arrays so that the covers are positioned over the image sensors.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: August 26, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Frank L. Hall, William J. Reeder, Bret K. Street, James M. Derderian
  • Patent number: 7416913
    Abstract: Microelectronic imaging units and methods for manufacturing microelectronic imaging units are disclosed herein. In one embodiment, a method includes placing a plurality of singulated imaging dies on a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes disposing a plurality of discrete stand-offs on the support member. The discrete stand-offs are arranged in arrays relative to corresponding imaging dies. The method further includes electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member, and attaching a plurality of covers to corresponding stand-off arrays so that the covers are positioned over the image sensors.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: August 26, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Frank L. Hall, William J. Reeder, Bret K. Street, James M. Derderian
  • Patent number: 7402453
    Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes forming a plurality of stand-offs on corresponding imaging dies before and/or after the imaging dies are singulated and electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member. The individual stand-offs include a portion between adjacent external contacts.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: July 22, 2008
    Assignee: Micron Technology, Inc.
    Inventors: James M. Derderian, Bret K. Street, Eric T. Mueller