Abstract: An exemplary circuit for implementing conditional statements in self-timed logic circuits includes first and second logic circuits, an input circuit, an output circuit, and a pipelined routing path. The first and second logic circuits each have a self-timed input and a self-timed output. The input circuit is coupled to provide a self-timed input signal to the self-timed input of a selected one of the first or second logic circuits based on the value of a control signal, and is further coupled to output a self-timed select signal. The output circuit is coupled to receive the self-timed output from the first logic circuit and the self-timed output from the second logic circuit, and to output a selected one of the self-timed outputs based on a value of the self-timed select signal. The pipelined routing path routes the self-timed select signal from the input circuit to the output circuit.

Abstract: A selection circuit, such as a multiplexer circuit, programmable to hold the output signal at a constant logic level or select 1 of n input signals as the output signal is disclosed. A first bank of transistors receives the n input signals and is controlled by a first set of memory cells. A second bank of transistors is controlled by a second set of memory cells. At least two transistors of the second bank have gates are coupled to a complemented output of one of the second set of memory cells. Each transistor in the second bank is coupled to a subset of transistors of the first bank. An output stage is coupled to the second bank of transistors. A pair of serially coupled transistors has gates coupled to two memory cells of the second set that control the at least two transistors of the second bank. The output stage outputs the constant logic level signal when the serially coupled transistors are conducting, and outputs the selected input signal when the serially coupled transistors are not conducting.